Allow userspace to modify guest visible value for HCX in
ID_AA64MMFR1_EL1.

Signed-off-by: Jinqian Yang <yangjinqian1@huawei.com>
---
 arch/arm64/kvm/sys_regs.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index 82430c1e1dd0..b105f156bdf6 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -2666,7 +2666,6 @@ static const struct sys_reg_desc sys_reg_descs[] = {
 					ID_AA64MMFR0_EL1_TGRAN16_2 |
 					ID_AA64MMFR0_EL1_ASIDBITS)),
 	ID_WRITABLE(ID_AA64MMFR1_EL1, ~(ID_AA64MMFR1_EL1_RES0 |
-					ID_AA64MMFR1_EL1_HCX |
 					ID_AA64MMFR1_EL1_TWED |
 					ID_AA64MMFR1_EL1_XNX |
 					ID_AA64MMFR1_EL1_VH |
-- 
2.33.0

Hi Jinqian,

On Tue, Mar 25, 2025 at 08:11:26PM +0800, Jinqian Yang wrote:
> Allow userspace to modify guest visible value for HCX in
> ID_AA64MMFR1_EL1.
> 
> Signed-off-by: Jinqian Yang <yangjinqian1@huawei.com>

This is fine, but I would rather we handle all the features like FEAT_HCX
instead of a trickle of one-off patches.

So, could you please:

 - Identify all of the features that describe an *EL2* feature which
   we've exposed to non-nested VMs
 
 - Implement patch(es) to make those fields writable (i.e. allow them to
   be downgraded)

 - Add corresponding test cases to the set_id_regs selftest

Thanks,
Oliver

> ---
>  arch/arm64/kvm/sys_regs.c | 1 -
>  1 file changed, 1 deletion(-)
> 
> diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
> index 82430c1e1dd0..b105f156bdf6 100644
> --- a/arch/arm64/kvm/sys_regs.c
> +++ b/arch/arm64/kvm/sys_regs.c
> @@ -2666,7 +2666,6 @@ static const struct sys_reg_desc sys_reg_descs[] = {
>  					ID_AA64MMFR0_EL1_TGRAN16_2 |
>  					ID_AA64MMFR0_EL1_ASIDBITS)),
>  	ID_WRITABLE(ID_AA64MMFR1_EL1, ~(ID_AA64MMFR1_EL1_RES0 |
> -					ID_AA64MMFR1_EL1_HCX |
>  					ID_AA64MMFR1_EL1_TWED |
>  					ID_AA64MMFR1_EL1_XNX |
>  					ID_AA64MMFR1_EL1_VH |
> -- 
> 2.33.0
>

> Hi Jinqian,
>
> On Tue, Mar 25, 2025 at 08:11:26PM +0800, Jinqian Yang wrote:
>> Allow userspace to modify guest visible value for HCX in
>> ID_AA64MMFR1_EL1.
>>
>> Signed-off-by: Jinqian Yang <yangjinqian1@huawei.com>
>
> This is fine, but I would rather we handle all the features like FEAT_HCX
> instead of a trickle of one-off patches.
>
> So, could you please:
>
> - Identify all of the features that describe an *EL2* feature which
>   we've exposed to non-nested VMs
>
> - Implement patch(es) to make those fields writable (i.e. allow them to
>   be downgraded)
>
> - Add corresponding test cases to the set_id_regs selftest
>
> Thanks,
> Oliver
>
Hi Oliver，

Thanks for the detailed explantation!

During our testing of cross-generation live migration, we encountered
an issue that requires applying the patch. The problem arises when two
chips have inconsistent FEAT_HCX. To ensure consistent virtual machine
behavior before and after migration, we need to make FEAT_HCX writable,
thereby aligning the feature flags across source and destination hosts.


Above is the context of this patch. I will revise this patch following your
suggestions, but I need to confirm: does the term *EL2* feature specifically
refer to capabilities related to ​​HCRX_EL2​​ and ​​HCR_EL2​​?

Jinqian


>> ---
>>  arch/arm64/kvm/sys_regs.c | 1 -
>>  1 file changed, 1 deletion(-)
>>
>> diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
>> index 82430c1e1dd0..b105f156bdf6 100644
>> --- a/arch/arm64/kvm/sys_regs.c
>> +++ b/arch/arm64/kvm/sys_regs.c
>> @@ -2666,7 +2666,6 @@ static const struct sys_reg_desc 
>> sys_reg_descs[] = {
>>                      ID_AA64MMFR0_EL1_TGRAN16_2 |
>>                      ID_AA64MMFR0_EL1_ASIDBITS)),
>>      ID_WRITABLE(ID_AA64MMFR1_EL1, ~(ID_AA64MMFR1_EL1_RES0 |
>> -                    ID_AA64MMFR1_EL1_HCX |
>>                      ID_AA64MMFR1_EL1_TWED |
>>                      ID_AA64MMFR1_EL1_XNX |
>>                      ID_AA64MMFR1_EL1_VH |
>> -- 
>> 2.33.0
>>
>