drivers/net/wireless/ath/ath12k/mhi.c | 2 +- drivers/net/wireless/ath/ath12k/pci.c | 12 ++++-------- drivers/net/wireless/ath/ath12k/pci.h | 1 + 3 files changed, 6 insertions(+), 9 deletions(-)
Extend the DMA mask to 36 bits to avoid using bounce buffers on machines
without an iommu (under OS control) similar to what was done for ath11k
in commit dbd73acb22d8 ("wifi: ath11k: enable 36 bit mask for stream
DMA").
This specifically avoids using bounce buffers on Qualcomm Snapdragon X
Elite machines like the Lenovo ThinkPad T14s when running at EL1.
Note that the mask could possibly be extended further but unresolved DMA
issues with 64 GiB X Elite machines currently prevents that from being
tested.
Also note that the driver is limited to 32 bits for coherent
allocations and that there is no need to check for errors when setting
masks larger than 32 bits.
Tested-on: WCN7850 hw2.0 WLAN.HMT.1.0.c5-00481-QCAHMTSWPL_V1.0_V2.0_SILICONZ-3
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
---
drivers/net/wireless/ath/ath12k/mhi.c | 2 +-
drivers/net/wireless/ath/ath12k/pci.c | 12 ++++--------
drivers/net/wireless/ath/ath12k/pci.h | 1 +
3 files changed, 6 insertions(+), 9 deletions(-)
diff --git a/drivers/net/wireless/ath/ath12k/mhi.c b/drivers/net/wireless/ath/ath12k/mhi.c
index 2f6d14382ed7..9c929c4ad8a8 100644
--- a/drivers/net/wireless/ath/ath12k/mhi.c
+++ b/drivers/net/wireless/ath/ath12k/mhi.c
@@ -379,7 +379,7 @@ int ath12k_mhi_register(struct ath12k_pci *ab_pci)
mhi_ctrl->irq_flags = IRQF_SHARED | IRQF_NOBALANCING;
mhi_ctrl->iova_start = 0;
- mhi_ctrl->iova_stop = 0xffffffff;
+ mhi_ctrl->iova_stop = ab_pci->dma_mask;
mhi_ctrl->sbl_size = SZ_512K;
mhi_ctrl->seg_len = SZ_512K;
mhi_ctrl->fbc_download = true;
diff --git a/drivers/net/wireless/ath/ath12k/pci.c b/drivers/net/wireless/ath/ath12k/pci.c
index 06cff3849ab8..e77c50fc48ca 100644
--- a/drivers/net/wireless/ath/ath12k/pci.c
+++ b/drivers/net/wireless/ath/ath12k/pci.c
@@ -17,7 +17,7 @@
#include "debug.h"
#define ATH12K_PCI_BAR_NUM 0
-#define ATH12K_PCI_DMA_MASK 32
+#define ATH12K_PCI_DMA_MASK 36
#define ATH12K_PCI_IRQ_CE0_OFFSET 3
@@ -874,13 +874,9 @@ static int ath12k_pci_claim(struct ath12k_pci *ab_pci, struct pci_dev *pdev)
goto disable_device;
}
- ret = dma_set_mask_and_coherent(&pdev->dev,
- DMA_BIT_MASK(ATH12K_PCI_DMA_MASK));
- if (ret) {
- ath12k_err(ab, "failed to set pci dma mask to %d: %d\n",
- ATH12K_PCI_DMA_MASK, ret);
- goto release_region;
- }
+ ab_pci->dma_mask = DMA_BIT_MASK(ATH12K_PCI_DMA_MASK);
+ dma_set_mask(&pdev->dev, ab_pci->dma_mask);
+ dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
pci_set_master(pdev);
diff --git a/drivers/net/wireless/ath/ath12k/pci.h b/drivers/net/wireless/ath/ath12k/pci.h
index 31584a7ad80e..9e89b64b3545 100644
--- a/drivers/net/wireless/ath/ath12k/pci.h
+++ b/drivers/net/wireless/ath/ath12k/pci.h
@@ -116,6 +116,7 @@ struct ath12k_pci {
unsigned long irq_flags;
const struct ath12k_pci_ops *pci_ops;
u32 qmi_instance;
+ u64 dma_mask;
};
static inline struct ath12k_pci *ath12k_pci_priv(struct ath12k_base *ab)
--
2.48.1
On Fri, 21 Mar 2025 17:23:31 +0100, Johan Hovold wrote:
> Extend the DMA mask to 36 bits to avoid using bounce buffers on machines
> without an iommu (under OS control) similar to what was done for ath11k
> in commit dbd73acb22d8 ("wifi: ath11k: enable 36 bit mask for stream
> DMA").
>
> This specifically avoids using bounce buffers on Qualcomm Snapdragon X
> Elite machines like the Lenovo ThinkPad T14s when running at EL1.
>
> [...]
Applied, thanks!
[1/1] wifi: ath12k: extend dma mask to 36 bits
commit: 79ce49513222a89338e78bc7c7cb4a0fb4d6cb23
Best regards,
--
Jeff Johnson <jeff.johnson@oss.qualcomm.com>
On 3/21/2025 9:23 AM, Johan Hovold wrote:
> Extend the DMA mask to 36 bits to avoid using bounce buffers on machines
> without an iommu (under OS control) similar to what was done for ath11k
> in commit dbd73acb22d8 ("wifi: ath11k: enable 36 bit mask for stream
> DMA").
>
> This specifically avoids using bounce buffers on Qualcomm Snapdragon X
> Elite machines like the Lenovo ThinkPad T14s when running at EL1.
>
> Note that the mask could possibly be extended further but unresolved DMA
> issues with 64 GiB X Elite machines currently prevents that from being
> tested.
>
> Also note that the driver is limited to 32 bits for coherent
> allocations and that there is no need to check for errors when setting
> masks larger than 32 bits.
>
> Tested-on: WCN7850 hw2.0 WLAN.HMT.1.0.c5-00481-QCAHMTSWPL_V1.0_V2.0_SILICONZ-3
>
> Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
> ---
Please make sure to include linux-wireless for all ath.git patches so that
they are processed by patchwork.kernel.org
/jeff
On Wed, Mar 26, 2025 at 08:11:11AM -0700, Jeff Johnson wrote:
> On 3/21/2025 9:23 AM, Johan Hovold wrote:
> > Extend the DMA mask to 36 bits to avoid using bounce buffers on machines
> > without an iommu (under OS control) similar to what was done for ath11k
> > in commit dbd73acb22d8 ("wifi: ath11k: enable 36 bit mask for stream
> > DMA").
> >
> > This specifically avoids using bounce buffers on Qualcomm Snapdragon X
> > Elite machines like the Lenovo ThinkPad T14s when running at EL1.
> >
> > Note that the mask could possibly be extended further but unresolved DMA
> > issues with 64 GiB X Elite machines currently prevents that from being
> > tested.
> >
> > Also note that the driver is limited to 32 bits for coherent
> > allocations and that there is no need to check for errors when setting
> > masks larger than 32 bits.
> >
> > Tested-on: WCN7850 hw2.0 WLAN.HMT.1.0.c5-00481-QCAHMTSWPL_V1.0_V2.0_SILICONZ-3
> >
> > Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
> > ---
>
> Please make sure to include linux-wireless for all ath.git patches so that
> they are processed by patchwork.kernel.org
Ok, I'll try to remember that, but it seems you need to update
MAINTAINERS to include that list:
$ scripts/get_maintainer.pl 0001-wifi-ath12k-extend-dma-mask-to-36-bits.patch
Jeff Johnson <jjohnson@kernel.org> (supporter:QUALCOMM ATH12K WIRELESS DRIVER)
ath12k@lists.infradead.org (open list:QUALCOMM ATH12K WIRELESS DRIVER)
linux-kernel@vger.kernel.org (open list)
Do you want me to resend?
Johan
On 3/26/2025 8:16 AM, Johan Hovold wrote:
> On Wed, Mar 26, 2025 at 08:11:11AM -0700, Jeff Johnson wrote:
>> On 3/21/2025 9:23 AM, Johan Hovold wrote:
>>> Extend the DMA mask to 36 bits to avoid using bounce buffers on machines
>>> without an iommu (under OS control) similar to what was done for ath11k
>>> in commit dbd73acb22d8 ("wifi: ath11k: enable 36 bit mask for stream
>>> DMA").
>>>
>>> This specifically avoids using bounce buffers on Qualcomm Snapdragon X
>>> Elite machines like the Lenovo ThinkPad T14s when running at EL1.
>>>
>>> Note that the mask could possibly be extended further but unresolved DMA
>>> issues with 64 GiB X Elite machines currently prevents that from being
>>> tested.
>>>
>>> Also note that the driver is limited to 32 bits for coherent
>>> allocations and that there is no need to check for errors when setting
>>> masks larger than 32 bits.
>>>
>>> Tested-on: WCN7850 hw2.0 WLAN.HMT.1.0.c5-00481-QCAHMTSWPL_V1.0_V2.0_SILICONZ-3
>>>
>>> Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
>>> ---
>>
>> Please make sure to include linux-wireless for all ath.git patches so that
>> they are processed by patchwork.kernel.org
>
> Ok, I'll try to remember that, but it seems you need to update
> MAINTAINERS to include that list:
>
> $ scripts/get_maintainer.pl 0001-wifi-ath12k-extend-dma-mask-to-36-bits.patch
> Jeff Johnson <jjohnson@kernel.org> (supporter:QUALCOMM ATH12K WIRELESS DRIVER)
> ath12k@lists.infradead.org (open list:QUALCOMM ATH12K WIRELESS DRIVER)
> linux-kernel@vger.kernel.org (open list)
>
> Do you want me to resend?
no need to resend -- I already picked it up in my 'pending' branch
Let me open a separate thread on the MAINTAINERS issue.
/jeff
On 3/22/2025 12:23 AM, Johan Hovold wrote:
> Extend the DMA mask to 36 bits to avoid using bounce buffers on machines
> without an iommu (under OS control) similar to what was done for ath11k
> in commit dbd73acb22d8 ("wifi: ath11k: enable 36 bit mask for stream
> DMA").
>
> This specifically avoids using bounce buffers on Qualcomm Snapdragon X
> Elite machines like the Lenovo ThinkPad T14s when running at EL1.
>
> Note that the mask could possibly be extended further but unresolved DMA
> issues with 64 GiB X Elite machines currently prevents that from being
> tested.
>
> Also note that the driver is limited to 32 bits for coherent
> allocations and that there is no need to check for errors when setting
> masks larger than 32 bits.
>
> Tested-on: WCN7850 hw2.0 WLAN.HMT.1.0.c5-00481-QCAHMTSWPL_V1.0_V2.0_SILICONZ-3
>
> Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
> ---
> drivers/net/wireless/ath/ath12k/mhi.c | 2 +-
> drivers/net/wireless/ath/ath12k/pci.c | 12 ++++--------
> drivers/net/wireless/ath/ath12k/pci.h | 1 +
> 3 files changed, 6 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/net/wireless/ath/ath12k/mhi.c b/drivers/net/wireless/ath/ath12k/mhi.c
> index 2f6d14382ed7..9c929c4ad8a8 100644
> --- a/drivers/net/wireless/ath/ath12k/mhi.c
> +++ b/drivers/net/wireless/ath/ath12k/mhi.c
> @@ -379,7 +379,7 @@ int ath12k_mhi_register(struct ath12k_pci *ab_pci)
> mhi_ctrl->irq_flags = IRQF_SHARED | IRQF_NOBALANCING;
>
> mhi_ctrl->iova_start = 0;
> - mhi_ctrl->iova_stop = 0xffffffff;
> + mhi_ctrl->iova_stop = ab_pci->dma_mask;
> mhi_ctrl->sbl_size = SZ_512K;
> mhi_ctrl->seg_len = SZ_512K;
> mhi_ctrl->fbc_download = true;
> diff --git a/drivers/net/wireless/ath/ath12k/pci.c b/drivers/net/wireless/ath/ath12k/pci.c
> index 06cff3849ab8..e77c50fc48ca 100644
> --- a/drivers/net/wireless/ath/ath12k/pci.c
> +++ b/drivers/net/wireless/ath/ath12k/pci.c
> @@ -17,7 +17,7 @@
> #include "debug.h"
>
> #define ATH12K_PCI_BAR_NUM 0
> -#define ATH12K_PCI_DMA_MASK 32
> +#define ATH12K_PCI_DMA_MASK 36
>
> #define ATH12K_PCI_IRQ_CE0_OFFSET 3
>
> @@ -874,13 +874,9 @@ static int ath12k_pci_claim(struct ath12k_pci *ab_pci, struct pci_dev *pdev)
> goto disable_device;
> }
>
> - ret = dma_set_mask_and_coherent(&pdev->dev,
> - DMA_BIT_MASK(ATH12K_PCI_DMA_MASK));
> - if (ret) {
> - ath12k_err(ab, "failed to set pci dma mask to %d: %d\n",
> - ATH12K_PCI_DMA_MASK, ret);
> - goto release_region;
> - }
> + ab_pci->dma_mask = DMA_BIT_MASK(ATH12K_PCI_DMA_MASK);
> + dma_set_mask(&pdev->dev, ab_pci->dma_mask);
> + dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
>
> pci_set_master(pdev);
>
> diff --git a/drivers/net/wireless/ath/ath12k/pci.h b/drivers/net/wireless/ath/ath12k/pci.h
> index 31584a7ad80e..9e89b64b3545 100644
> --- a/drivers/net/wireless/ath/ath12k/pci.h
> +++ b/drivers/net/wireless/ath/ath12k/pci.h
> @@ -116,6 +116,7 @@ struct ath12k_pci {
> unsigned long irq_flags;
> const struct ath12k_pci_ops *pci_ops;
> u32 qmi_instance;
> + u64 dma_mask;
> };
>
> static inline struct ath12k_pci *ath12k_pci_priv(struct ath12k_base *ab)
Reviewed-by: Baochen Qiang <quic_bqiang@quicinc.com>
With WLAN.HMT.1.0.c5-00481-QCAHMTSWPL_V1.0_V2.0_SILICONZ-3 this is working, so:
Tested-by: Baochen Qiang <quic_bqiang@quicinc.com>
On Mon, Mar 24, 2025 at 04:33:13PM +0800, Baochen Qiang wrote:
> On 3/22/2025 12:23 AM, Johan Hovold wrote:
> > Extend the DMA mask to 36 bits to avoid using bounce buffers on machines
> > without an iommu (under OS control) similar to what was done for ath11k
> > in commit dbd73acb22d8 ("wifi: ath11k: enable 36 bit mask for stream
> > DMA").
> >
> > This specifically avoids using bounce buffers on Qualcomm Snapdragon X
> > Elite machines like the Lenovo ThinkPad T14s when running at EL1.
> >
> > Note that the mask could possibly be extended further but unresolved DMA
> > issues with 64 GiB X Elite machines currently prevents that from being
> > tested.
> >
> > Also note that the driver is limited to 32 bits for coherent
> > allocations and that there is no need to check for errors when setting
> > masks larger than 32 bits.
> >
> > Tested-on: WCN7850 hw2.0 WLAN.HMT.1.0.c5-00481-QCAHMTSWPL_V1.0_V2.0_SILICONZ-3
> >
> > Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
> Reviewed-by: Baochen Qiang <quic_bqiang@quicinc.com>
>
> With WLAN.HMT.1.0.c5-00481-QCAHMTSWPL_V1.0_V2.0_SILICONZ-3 this is working, so:
>
> Tested-by: Baochen Qiang <quic_bqiang@quicinc.com>
Thanks for reviewing and testing.
Johan
On 3/22/2025 12:23 AM, Johan Hovold wrote:
> Extend the DMA mask to 36 bits to avoid using bounce buffers on machines
> without an iommu (under OS control) similar to what was done for ath11k
> in commit dbd73acb22d8 ("wifi: ath11k: enable 36 bit mask for stream
> DMA").
>
> This specifically avoids using bounce buffers on Qualcomm Snapdragon X
> Elite machines like the Lenovo ThinkPad T14s when running at EL1.
why bounce buffer is used at EL1? is it because IOMMU is not working at EL1?
or even because IOMMU is not present on Elite machines?
>
> Note that the mask could possibly be extended further but unresolved DMA
> issues with 64 GiB X Elite machines currently prevents that from being
> tested.
could you help elaborate how it could be extended?
>
> Also note that the driver is limited to 32 bits for coherent
> allocations and that there is no need to check for errors when setting
> masks larger than 32 bits.
why is it not necessary to check error?
>
> Tested-on: WCN7850 hw2.0 WLAN.HMT.1.0.c5-00481-QCAHMTSWPL_V1.0_V2.0_SILICONZ-3
>
> Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
> ---
> drivers/net/wireless/ath/ath12k/mhi.c | 2 +-
> drivers/net/wireless/ath/ath12k/pci.c | 12 ++++--------
> drivers/net/wireless/ath/ath12k/pci.h | 1 +
> 3 files changed, 6 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/net/wireless/ath/ath12k/mhi.c b/drivers/net/wireless/ath/ath12k/mhi.c
> index 2f6d14382ed7..9c929c4ad8a8 100644
> --- a/drivers/net/wireless/ath/ath12k/mhi.c
> +++ b/drivers/net/wireless/ath/ath12k/mhi.c
> @@ -379,7 +379,7 @@ int ath12k_mhi_register(struct ath12k_pci *ab_pci)
> mhi_ctrl->irq_flags = IRQF_SHARED | IRQF_NOBALANCING;
>
> mhi_ctrl->iova_start = 0;
> - mhi_ctrl->iova_stop = 0xffffffff;
> + mhi_ctrl->iova_stop = ab_pci->dma_mask;
> mhi_ctrl->sbl_size = SZ_512K;
> mhi_ctrl->seg_len = SZ_512K;
> mhi_ctrl->fbc_download = true;
> diff --git a/drivers/net/wireless/ath/ath12k/pci.c b/drivers/net/wireless/ath/ath12k/pci.c
> index 06cff3849ab8..e77c50fc48ca 100644
> --- a/drivers/net/wireless/ath/ath12k/pci.c
> +++ b/drivers/net/wireless/ath/ath12k/pci.c
> @@ -17,7 +17,7 @@
> #include "debug.h"
>
> #define ATH12K_PCI_BAR_NUM 0
> -#define ATH12K_PCI_DMA_MASK 32
> +#define ATH12K_PCI_DMA_MASK 36
>
> #define ATH12K_PCI_IRQ_CE0_OFFSET 3
>
> @@ -874,13 +874,9 @@ static int ath12k_pci_claim(struct ath12k_pci *ab_pci, struct pci_dev *pdev)
> goto disable_device;
> }
>
> - ret = dma_set_mask_and_coherent(&pdev->dev,
> - DMA_BIT_MASK(ATH12K_PCI_DMA_MASK));
> - if (ret) {
> - ath12k_err(ab, "failed to set pci dma mask to %d: %d\n",
> - ATH12K_PCI_DMA_MASK, ret);
> - goto release_region;
> - }
> + ab_pci->dma_mask = DMA_BIT_MASK(ATH12K_PCI_DMA_MASK);
> + dma_set_mask(&pdev->dev, ab_pci->dma_mask);
> + dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
>
> pci_set_master(pdev);
>
> diff --git a/drivers/net/wireless/ath/ath12k/pci.h b/drivers/net/wireless/ath/ath12k/pci.h
> index 31584a7ad80e..9e89b64b3545 100644
> --- a/drivers/net/wireless/ath/ath12k/pci.h
> +++ b/drivers/net/wireless/ath/ath12k/pci.h
> @@ -116,6 +116,7 @@ struct ath12k_pci {
> unsigned long irq_flags;
> const struct ath12k_pci_ops *pci_ops;
> u32 qmi_instance;
> + u64 dma_mask;
> };
>
> static inline struct ath12k_pci *ath12k_pci_priv(struct ath12k_base *ab)
On Mon, Mar 24, 2025 at 11:06:16AM +0800, Baochen Qiang wrote:
> On 3/22/2025 12:23 AM, Johan Hovold wrote:
> > Extend the DMA mask to 36 bits to avoid using bounce buffers on machines
> > without an iommu (under OS control) similar to what was done for ath11k
> > in commit dbd73acb22d8 ("wifi: ath11k: enable 36 bit mask for stream
> > DMA").
> >
> > This specifically avoids using bounce buffers on Qualcomm Snapdragon X
> > Elite machines like the Lenovo ThinkPad T14s when running at EL1.
>
> why bounce buffer is used at EL1? is it because IOMMU is not working at EL1?
> or even because IOMMU is not present on Elite machines?
As I mentioned above, the IOMMU is not under OS control. The boot
firmware / hypervisor has configured the IOMMU in by-pass mode and it's
effectively missing from the OS POV.
Note that this is also the case on Qualcomm platforms like sc8280xp
(e.g. the Lenovo ThinkPad X13s which already benefits from the extended
DMA mask for ath11k).
> > Note that the mask could possibly be extended further but unresolved DMA
> > issues with 64 GiB X Elite machines currently prevents that from being
> > tested.
>
> could you help elaborate how it could be extended?
The mask should reflect the capability of the device. That may be
64 (or 40) bits, but I've only been able to test using 36 bits.
> > Also note that the driver is limited to 32 bits for coherent
> > allocations and that there is no need to check for errors when setting
> > masks larger than 32 bits.
>
> why is it not necessary to check error?
The DMA-API documentation was recently updated to clarify that there is
no need to check for errors when settings DMA mask with 32 bits or more
as the call will never fail in that case. See commit
f7ae20f2fc4e ("docs: dma: correct dma_set_mask() sample code")
Johan
On 3/24/2025 3:40 PM, Johan Hovold wrote:
> On Mon, Mar 24, 2025 at 11:06:16AM +0800, Baochen Qiang wrote:
>> On 3/22/2025 12:23 AM, Johan Hovold wrote:
>>> Extend the DMA mask to 36 bits to avoid using bounce buffers on machines
>>> without an iommu (under OS control) similar to what was done for ath11k
>>> in commit dbd73acb22d8 ("wifi: ath11k: enable 36 bit mask for stream
>>> DMA").
>>>
>>> This specifically avoids using bounce buffers on Qualcomm Snapdragon X
>>> Elite machines like the Lenovo ThinkPad T14s when running at EL1.
>>
>> why bounce buffer is used at EL1? is it because IOMMU is not working at EL1?
>> or even because IOMMU is not present on Elite machines?
>
> As I mentioned above, the IOMMU is not under OS control. The boot
> firmware / hypervisor has configured the IOMMU in by-pass mode and it's
> effectively missing from the OS POV.
>
> Note that this is also the case on Qualcomm platforms like sc8280xp
> (e.g. the Lenovo ThinkPad X13s which already benefits from the extended
> DMA mask for ath11k).
>
>>> Note that the mask could possibly be extended further but unresolved DMA
>>> issues with 64 GiB X Elite machines currently prevents that from being
>>> tested.
>>
>> could you help elaborate how it could be extended?
>
> The mask should reflect the capability of the device. That may be
> 64 (or 40) bits, but I've only been able to test using 36 bits.
are you talking about QCN9274? As far as I know, WCN7850 does not support 40 bits or more.
>
>>> Also note that the driver is limited to 32 bits for coherent
>>> allocations and that there is no need to check for errors when setting
>>> masks larger than 32 bits.
>>
>> why is it not necessary to check error?
>
> The DMA-API documentation was recently updated to clarify that there is
> no need to check for errors when settings DMA mask with 32 bits or more
> as the call will never fail in that case. See commit
>
> f7ae20f2fc4e ("docs: dma: correct dma_set_mask() sample code")
thanks for the info.
>
> Johan
On Mon, Mar 24, 2025 at 04:05:33PM +0800, Baochen Qiang wrote:
> On 3/24/2025 3:40 PM, Johan Hovold wrote:
> > On Mon, Mar 24, 2025 at 11:06:16AM +0800, Baochen Qiang wrote:
> >> On 3/22/2025 12:23 AM, Johan Hovold wrote:
> >>> Extend the DMA mask to 36 bits to avoid using bounce buffers on machines
> >>> without an iommu (under OS control) similar to what was done for ath11k
> >>> in commit dbd73acb22d8 ("wifi: ath11k: enable 36 bit mask for stream
> >>> DMA").
> >>>
> >>> This specifically avoids using bounce buffers on Qualcomm Snapdragon X
> >>> Elite machines like the Lenovo ThinkPad T14s when running at EL1.
> >>> Note that the mask could possibly be extended further but unresolved DMA
> >>> issues with 64 GiB X Elite machines currently prevents that from being
> >>> tested.
> >>
> >> could you help elaborate how it could be extended?
> >
> > The mask should reflect the capability of the device. That may be
> > 64 (or 40) bits, but I've only been able to test using 36 bits.
>
> are you talking about QCN9274? As far as I know, WCN7850 does not support 40 bits or more.
Or really all devices handled by ath12k since they at least currently
use a common mask.
The T14s has a:
0004:01:00.0 Network controller: Qualcomm Technologies, Inc WCN785x Wi-Fi 7(802.11be) 320MHz 2x2 [FastConnect 7800] (rev 01)
ath12k_pci 0004:01:00.0: Hardware name: wcn7850 hw2.0
ath12k_pci 0004:01:00.0: chip_id 0x2 chip_family 0x4 board_id 0xff soc_id 0x40170200
Sounds like 36 bits is the correct choice for now then.
Johan
On 3/24/2025 4:20 PM, Johan Hovold wrote:
> On Mon, Mar 24, 2025 at 04:05:33PM +0800, Baochen Qiang wrote:
>> On 3/24/2025 3:40 PM, Johan Hovold wrote:
>>> On Mon, Mar 24, 2025 at 11:06:16AM +0800, Baochen Qiang wrote:
>>>> On 3/22/2025 12:23 AM, Johan Hovold wrote:
>>>>> Extend the DMA mask to 36 bits to avoid using bounce buffers on machines
>>>>> without an iommu (under OS control) similar to what was done for ath11k
>>>>> in commit dbd73acb22d8 ("wifi: ath11k: enable 36 bit mask for stream
>>>>> DMA").
>>>>>
>>>>> This specifically avoids using bounce buffers on Qualcomm Snapdragon X
>>>>> Elite machines like the Lenovo ThinkPad T14s when running at EL1.
>
>>>>> Note that the mask could possibly be extended further but unresolved DMA
>>>>> issues with 64 GiB X Elite machines currently prevents that from being
>>>>> tested.
>>>>
>>>> could you help elaborate how it could be extended?
>>>
>>> The mask should reflect the capability of the device. That may be
>>> 64 (or 40) bits, but I've only been able to test using 36 bits.
>>
>> are you talking about QCN9274? As far as I know, WCN7850 does not support 40 bits or more.
>
> Or really all devices handled by ath12k since they at least currently
> use a common mask.
>
> The T14s has a:
>
> 0004:01:00.0 Network controller: Qualcomm Technologies, Inc WCN785x Wi-Fi 7(802.11be) 320MHz 2x2 [FastConnect 7800] (rev 01)
>
> ath12k_pci 0004:01:00.0: Hardware name: wcn7850 hw2.0
> ath12k_pci 0004:01:00.0: chip_id 0x2 chip_family 0x4 board_id 0xff soc_id 0x40170200
>
> Sounds like 36 bits is the correct choice for now then.
yes, let's keep it as 36 for now.
>
> Johan
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