.../bindings/timer/sifive,clint.yaml | 22 +++++++++++++++++++ 1 file changed, 22 insertions(+)
Add compatible string and property for the SiFive CLINT v2. The SiFive
CLINT v2 is incompatible with the SiFive CLINT v0 due to differences
in their control methods.
Signed-off-by: Nick Hu <nick.hu@sifive.com>
Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
---
- v3 changes:
- Add the reason for the incompatibility between sifive,clint2 and
sifive,clint0.
- v2 changes:
- Don't allow sifive,clint2 by itself. Add '-{}' to the first entry
- Mark the sifive,fine-ctr-bits as the required property when
the compatible includes the sifive,clint2
.../bindings/timer/sifive,clint.yaml | 22 +++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/Documentation/devicetree/bindings/timer/sifive,clint.yaml b/Documentation/devicetree/bindings/timer/sifive,clint.yaml
index 76d83aea4e2b..34684cda8b15 100644
--- a/Documentation/devicetree/bindings/timer/sifive,clint.yaml
+++ b/Documentation/devicetree/bindings/timer/sifive,clint.yaml
@@ -36,6 +36,12 @@ properties:
- starfive,jh7110-clint # StarFive JH7110
- starfive,jh8100-clint # StarFive JH8100
- const: sifive,clint0 # SiFive CLINT v0 IP block
+ - items:
+ - {}
+ - const: sifive,clint2 # SiFive CLINT v2 IP block
+ description:
+ SiFive CLINT v2 is the HRT that supports the Zicntr. The control of sifive,clint2
+ differs from that of sifive,clint0, making them incompatible.
- items:
- enum:
- allwinner,sun20i-d1-clint
@@ -62,6 +68,22 @@ properties:
minItems: 1
maxItems: 4095
+ sifive,fine-ctr-bits:
+ maximum: 15
+ description: The width in bits of the fine counter.
+
+if:
+ properties:
+ compatible:
+ contains:
+ const: sifive,clint2
+then:
+ required:
+ - sifive,fine-ctr-bits
+else:
+ properties:
+ sifive,fine-ctr-bits: false
+
additionalProperties: false
required:
--
2.17.1
On Fri, Mar 21, 2025 at 04:35:06PM +0800, Nick Hu wrote:
> Add compatible string and property for the SiFive CLINT v2. The SiFive
> CLINT v2 is incompatible with the SiFive CLINT v0 due to differences
> in their control methods.
>
> Signed-off-by: Nick Hu <nick.hu@sifive.com>
> Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
> ---
> - v3 changes:
> - Add the reason for the incompatibility between sifive,clint2 and
> sifive,clint0.
> - v2 changes:
> - Don't allow sifive,clint2 by itself. Add '-{}' to the first entry
> - Mark the sifive,fine-ctr-bits as the required property when
> the compatible includes the sifive,clint2
>
> .../bindings/timer/sifive,clint.yaml | 22 +++++++++++++++++++
> 1 file changed, 22 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/timer/sifive,clint.yaml b/Documentation/devicetree/bindings/timer/sifive,clint.yaml
> index 76d83aea4e2b..34684cda8b15 100644
> --- a/Documentation/devicetree/bindings/timer/sifive,clint.yaml
> +++ b/Documentation/devicetree/bindings/timer/sifive,clint.yaml
> @@ -36,6 +36,12 @@ properties:
> - starfive,jh7110-clint # StarFive JH7110
> - starfive,jh8100-clint # StarFive JH8100
> - const: sifive,clint0 # SiFive CLINT v0 IP block
> + - items:
> + - {}
> + - const: sifive,clint2 # SiFive CLINT v2 IP block
> + description:
> + SiFive CLINT v2 is the HRT that supports the Zicntr. The control of sifive,clint2
> + differs from that of sifive,clint0, making them incompatible.
> - items:
> - enum:
> - allwinner,sun20i-d1-clint
> @@ -62,6 +68,22 @@ properties:
> minItems: 1
> maxItems: 4095
>
> + sifive,fine-ctr-bits:
> + maximum: 15
> + description: The width in bits of the fine counter.
> +
> +if:
> + properties:
> + compatible:
> + contains:
> + const: sifive,clint2
> +then:
> + required:
> + - sifive,fine-ctr-bits
> +else:
> + properties:
> + sifive,fine-ctr-bits: false
> +
> additionalProperties: false
>
> required:
> --
> 2.17.1
>
The following commit has been merged into the timers/clocksource branch of tip:
Commit-ID: 0f920690a82cc99ae08cab08bee2e5685b62fd04
Gitweb: https://git.kernel.org/tip/0f920690a82cc99ae08cab08bee2e5685b62fd04
Author: Nick Hu <nick.hu@sifive.com>
AuthorDate: Fri, 21 Mar 2025 16:35:06 +08:00
Committer: Daniel Lezcano <daniel.lezcano@linaro.org>
CommitterDate: Sun, 23 Mar 2025 10:55:43 +01:00
dt-bindings: timer: Add SiFive CLINT2
Add compatible string and property for the SiFive CLINT v2. The SiFive
CLINT v2 is incompatible with the SiFive CLINT v0 due to differences
in their control methods.
Signed-off-by: Nick Hu <nick.hu@sifive.com>
Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20250321083507.25298-1-nick.hu@sifive.com
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
Documentation/devicetree/bindings/timer/sifive,clint.yaml | 22 +++++++-
1 file changed, 22 insertions(+)
diff --git a/Documentation/devicetree/bindings/timer/sifive,clint.yaml b/Documentation/devicetree/bindings/timer/sifive,clint.yaml
index 73edde5..653e2e0 100644
--- a/Documentation/devicetree/bindings/timer/sifive,clint.yaml
+++ b/Documentation/devicetree/bindings/timer/sifive,clint.yaml
@@ -37,6 +37,12 @@ properties:
- starfive,jh8100-clint # StarFive JH8100
- const: sifive,clint0 # SiFive CLINT v0 IP block
- items:
+ - {}
+ - const: sifive,clint2 # SiFive CLINT v2 IP block
+ description:
+ SiFive CLINT v2 is the HRT that supports the Zicntr. The control of sifive,clint2
+ differs from that of sifive,clint0, making them incompatible.
+ - items:
- enum:
- allwinner,sun20i-d1-clint
- sophgo,cv1800b-clint
@@ -62,6 +68,22 @@ properties:
minItems: 1
maxItems: 4095
+ sifive,fine-ctr-bits:
+ maximum: 15
+ description: The width in bits of the fine counter.
+
+if:
+ properties:
+ compatible:
+ contains:
+ const: sifive,clint2
+then:
+ required:
+ - sifive,fine-ctr-bits
+else:
+ properties:
+ sifive,fine-ctr-bits: false
+
additionalProperties: false
required:
© 2016 - 2025 Red Hat, Inc.