Video node enables video on Qualcomm SA8775P platform.
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Vikash Garodia <quic_vgarodia@quicinc.com>
---
arch/arm64/boot/dts/qcom/sa8775p.dtsi | 71 +++++++++++++++++++++++++++++++++++
1 file changed, 71 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
index 3394ae2d13003417a15e64c9e47833725ec779e6..6e4644b95fb678fd201310463709d7482d72d6e2 100644
--- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
+++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
@@ -10,6 +10,7 @@
#include <dt-bindings/clock/qcom,sa8775p-dispcc.h>
#include <dt-bindings/clock/qcom,sa8775p-gcc.h>
#include <dt-bindings/clock/qcom,sa8775p-gpucc.h>
+#include <dt-bindings/clock/qcom,sa8775p-videocc.h>
#include <dt-bindings/dma/qcom-gpi.h>
#include <dt-bindings/interconnect/qcom,sa8775p-rpmh.h>
#include <dt-bindings/mailbox/qcom-ipcc.h>
@@ -3783,6 +3784,76 @@ llcc: system-cache-controller@9200000 {
interrupts = <GIC_SPI 580 IRQ_TYPE_LEVEL_HIGH>;
};
+ iris: video-codec@aa00000 {
+ compatible = "qcom,sa8775p-iris", "qcom,sm8550-iris";
+
+ reg = <0x0 0x0aa00000 0x0 0xf0000>;
+ interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
+
+ power-domains = <&videocc VIDEO_CC_MVS0C_GDSC>,
+ <&videocc VIDEO_CC_MVS0_GDSC>,
+ <&rpmhpd SA8775P_MXC>,
+ <&rpmhpd SA8775P_MMCX>;
+ power-domain-names = "venus",
+ "vcodec0",
+ "mxc",
+ "mmcx";
+ operating-points-v2 = <&iris_opp_table>;
+
+ clocks = <&gcc GCC_VIDEO_AXI0_CLK>,
+ <&videocc VIDEO_CC_MVS0C_CLK>,
+ <&videocc VIDEO_CC_MVS0_CLK>;
+ clock-names = "iface",
+ "core",
+ "vcodec0_core";
+
+ interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+ &config_noc SLAVE_VENUS_CFG QCOM_ICC_TAG_ACTIVE_ONLY>,
+ <&mmss_noc MASTER_VIDEO_P0 QCOM_ICC_TAG_ALWAYS
+ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
+ interconnect-names = "cpu-cfg",
+ "video-mem";
+
+ memory-region = <&pil_video_mem>;
+
+ resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>;
+ reset-names = "bus";
+
+ iommus = <&apps_smmu 0x0880 0x0400>,
+ <&apps_smmu 0x0887 0x0400>;
+ dma-coherent;
+
+ status = "disabled";
+
+ iris_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-366000000 {
+ opp-hz = /bits/ 64 <366000000>;
+ required-opps = <&rpmhpd_opp_svs_l1>,
+ <&rpmhpd_opp_svs_l1>;
+ };
+
+ opp-444000000 {
+ opp-hz = /bits/ 64 <444000000>;
+ required-opps = <&rpmhpd_opp_nom>,
+ <&rpmhpd_opp_nom>;
+ };
+
+ opp-533333334 {
+ opp-hz = /bits/ 64 <533333334>;
+ required-opps = <&rpmhpd_opp_turbo>,
+ <&rpmhpd_opp_turbo>;
+ };
+
+ opp-560000000 {
+ opp-hz = /bits/ 64 <560000000>;
+ required-opps = <&rpmhpd_opp_turbo_l1>,
+ <&rpmhpd_opp_turbo_l1>;
+ };
+ };
+ };
+
videocc: clock-controller@abf0000 {
compatible = "qcom,sa8775p-videocc";
reg = <0x0 0x0abf0000 0x0 0x10000>;
--
2.34.1
On 3/21/25 4:19 AM, Vikash Garodia wrote:
> Video node enables video on Qualcomm SA8775P platform.
>
> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
> Signed-off-by: Vikash Garodia <quic_vgarodia@quicinc.com>
> ---
> arch/arm64/boot/dts/qcom/sa8775p.dtsi | 71 +++++++++++++++++++++++++++++++++++
> 1 file changed, 71 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> index 3394ae2d13003417a15e64c9e47833725ec779e6..6e4644b95fb678fd201310463709d7482d72d6e2 100644
> --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> @@ -10,6 +10,7 @@
> #include <dt-bindings/clock/qcom,sa8775p-dispcc.h>
> #include <dt-bindings/clock/qcom,sa8775p-gcc.h>
> #include <dt-bindings/clock/qcom,sa8775p-gpucc.h>
> +#include <dt-bindings/clock/qcom,sa8775p-videocc.h>
> #include <dt-bindings/dma/qcom-gpi.h>
> #include <dt-bindings/interconnect/qcom,sa8775p-rpmh.h>
> #include <dt-bindings/mailbox/qcom-ipcc.h>
> @@ -3783,6 +3784,76 @@ llcc: system-cache-controller@9200000 {
> interrupts = <GIC_SPI 580 IRQ_TYPE_LEVEL_HIGH>;
> };
>
> + iris: video-codec@aa00000 {
> + compatible = "qcom,sa8775p-iris", "qcom,sm8550-iris";
> +
> + reg = <0x0 0x0aa00000 0x0 0xf0000>;
> + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
> +
> + power-domains = <&videocc VIDEO_CC_MVS0C_GDSC>,
> + <&videocc VIDEO_CC_MVS0_GDSC>,
> + <&rpmhpd SA8775P_MXC>,
> + <&rpmhpd SA8775P_MMCX>;
> + power-domain-names = "venus",
> + "vcodec0",
> + "mxc",
> + "mmcx";
> + operating-points-v2 = <&iris_opp_table>;
> +
> + clocks = <&gcc GCC_VIDEO_AXI0_CLK>,
> + <&videocc VIDEO_CC_MVS0C_CLK>,
> + <&videocc VIDEO_CC_MVS0_CLK>;
> + clock-names = "iface",
> + "core",
> + "vcodec0_core";
> +
> + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
> + &config_noc SLAVE_VENUS_CFG QCOM_ICC_TAG_ACTIVE_ONLY>,
> + <&mmss_noc MASTER_VIDEO_P0 QCOM_ICC_TAG_ALWAYS
> + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
> + interconnect-names = "cpu-cfg",
> + "video-mem";
> +
> + memory-region = <&pil_video_mem>;
> +
> + resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>;
> + reset-names = "bus";
> +
> + iommus = <&apps_smmu 0x0880 0x0400>,
> + <&apps_smmu 0x0887 0x0400>;
> + dma-coherent;
> +
> + status = "disabled";
> +
> + iris_opp_table: opp-table {
> + compatible = "operating-points-v2";
> +
> + opp-366000000 {
> + opp-hz = /bits/ 64 <366000000>;
> + required-opps = <&rpmhpd_opp_svs_l1>,
> + <&rpmhpd_opp_svs_l1>;
> + };
> +
> + opp-444000000 {
> + opp-hz = /bits/ 64 <444000000>;
> + required-opps = <&rpmhpd_opp_nom>,
> + <&rpmhpd_opp_nom>;
> + };
> +
> + opp-533333334 {
> + opp-hz = /bits/ 64 <533333334>;
I believe this should be 530-zeroes, not 533 and a third
other than that
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Konrad
On 4/14/2025 7:03 PM, Konrad Dybcio wrote:
> On 3/21/25 4:19 AM, Vikash Garodia wrote:
>> Video node enables video on Qualcomm SA8775P platform.
>>
>> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
>> Signed-off-by: Vikash Garodia <quic_vgarodia@quicinc.com>
>> ---
>> arch/arm64/boot/dts/qcom/sa8775p.dtsi | 71 +++++++++++++++++++++++++++++++++++
>> 1 file changed, 71 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
>> index 3394ae2d13003417a15e64c9e47833725ec779e6..6e4644b95fb678fd201310463709d7482d72d6e2 100644
>> --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
>> @@ -10,6 +10,7 @@
>> #include <dt-bindings/clock/qcom,sa8775p-dispcc.h>
>> #include <dt-bindings/clock/qcom,sa8775p-gcc.h>
>> #include <dt-bindings/clock/qcom,sa8775p-gpucc.h>
>> +#include <dt-bindings/clock/qcom,sa8775p-videocc.h>
>> #include <dt-bindings/dma/qcom-gpi.h>
>> #include <dt-bindings/interconnect/qcom,sa8775p-rpmh.h>
>> #include <dt-bindings/mailbox/qcom-ipcc.h>
>> @@ -3783,6 +3784,76 @@ llcc: system-cache-controller@9200000 {
>> interrupts = <GIC_SPI 580 IRQ_TYPE_LEVEL_HIGH>;
>> };
>>
>> + iris: video-codec@aa00000 {
>> + compatible = "qcom,sa8775p-iris", "qcom,sm8550-iris";
>> +
>> + reg = <0x0 0x0aa00000 0x0 0xf0000>;
>> + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
>> +
>> + power-domains = <&videocc VIDEO_CC_MVS0C_GDSC>,
>> + <&videocc VIDEO_CC_MVS0_GDSC>,
>> + <&rpmhpd SA8775P_MXC>,
>> + <&rpmhpd SA8775P_MMCX>;
>> + power-domain-names = "venus",
>> + "vcodec0",
>> + "mxc",
>> + "mmcx";
>> + operating-points-v2 = <&iris_opp_table>;
>> +
>> + clocks = <&gcc GCC_VIDEO_AXI0_CLK>,
>> + <&videocc VIDEO_CC_MVS0C_CLK>,
>> + <&videocc VIDEO_CC_MVS0_CLK>;
>> + clock-names = "iface",
>> + "core",
>> + "vcodec0_core";
>> +
>> + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
>> + &config_noc SLAVE_VENUS_CFG QCOM_ICC_TAG_ACTIVE_ONLY>,
>> + <&mmss_noc MASTER_VIDEO_P0 QCOM_ICC_TAG_ALWAYS
>> + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
>> + interconnect-names = "cpu-cfg",
>> + "video-mem";
>> +
>> + memory-region = <&pil_video_mem>;
>> +
>> + resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>;
>> + reset-names = "bus";
>> +
>> + iommus = <&apps_smmu 0x0880 0x0400>,
>> + <&apps_smmu 0x0887 0x0400>;
>> + dma-coherent;
>> +
>> + status = "disabled";
>> +
>> + iris_opp_table: opp-table {
>> + compatible = "operating-points-v2";
>> +
>> + opp-366000000 {
>> + opp-hz = /bits/ 64 <366000000>;
>> + required-opps = <&rpmhpd_opp_svs_l1>,
>> + <&rpmhpd_opp_svs_l1>;
>> + };
>> +
>> + opp-444000000 {
>> + opp-hz = /bits/ 64 <444000000>;
>> + required-opps = <&rpmhpd_opp_nom>,
>> + <&rpmhpd_opp_nom>;
>> + };
>> +
>> + opp-533333334 {
>> + opp-hz = /bits/ 64 <533333334>;
>
> I believe this should be 530-zeroes, not 533 and a third
Thank you, will fix this.
Regards,
Vikash
>
> other than that
>
> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
>
> Konrad
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