The ocelot switches can also be strapped so that they can be
controlled via an MDIO bus (on either address 0 or 31). Mention that
and add an example.

Signed-off-by: Rasmus Villemoes <ravi@prevas.dk>
---
 .../devicetree/bindings/mfd/mscc,ocelot.yaml  | 121 +++++++++++++++++-
 1 file changed, 119 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/mfd/mscc,ocelot.yaml b/Documentation/devicetree/bindings/mfd/mscc,ocelot.yaml
index 8bd1abfc44d99..bd2787a613e16 100644
--- a/Documentation/devicetree/bindings/mfd/mscc,ocelot.yaml
+++ b/Documentation/devicetree/bindings/mfd/mscc,ocelot.yaml
@@ -12,8 +12,8 @@ maintainers:
 description: |
   The Ocelot ethernet switch family contains chips that have an internal CPU
   (VSC7513, VSC7514) and chips that don't (VSC7511, VSC7512). All switches have
-  the option to be controlled externally via external interfaces like SPI or
-  PCIe.
+  the option to be controlled externally via external interfaces like SPI, MDIO
+  or PCIe.
 
   The switch family is a multi-port networking switch that supports many
   interfaces. Additionally, the device can perform pin control, MDIO buses, and
@@ -164,6 +164,123 @@ examples:
             };
         };
     };
+  - |
+    #include <dt-bindings/phy/phy-ocelot-serdes.h>
+    mdio {
+        #address-cells = <1>;
+        #size-cells = <0>;
+
+        soc@0 {
+            compatible = "mscc,vsc7512";
+            reg = <0x0>;
+            #address-cells = <1>;
+            #size-cells = <1>;
+
+            mdio@7107009c {
+                compatible = "mscc,ocelot-miim";
+                #address-cells = <1>;
+                #size-cells = <0>;
+                reg = <0x7107009c 0x24>;
+
+                sw_phy1: ethernet-phy@1 {
+                    reg = <0x1>;
+                };
+                sw_phy2: ethernet-phy@2 {
+                    reg = <0x2>;
+                };
+            };
+
+            mdio@710700c0 {
+                compatible = "mscc,ocelot-miim";
+                #address-cells = <1>;
+                #size-cells = <0>;
+                reg = <0x710700c0 0x24>;
+                status = "disabled";
+            };
+
+            ocelot_gpio: pinctrl@71070034 {
+                compatible = "mscc,ocelot-pinctrl";
+                gpio-controller;
+                #gpio-cells = <2>;
+                gpio-ranges = <&ocelot_gpio 0 0 22>;
+                reg = <0x71070034 0x6c>;
+            };
+
+            gpio@710700f8 {
+                compatible = "mscc,ocelot-sgpio";
+                #address-cells = <1>;
+                #size-cells = <0>;
+                reg = <0x710700f8 0x100>;
+                status = "disabled";
+            };
+
+            ocelot_serdes: serdes@710d0000 {
+                compatible = "mscc,vsc7514-serdes";
+                reg = <0x710d0000 0x10000>;
+                #phy-cells = <2>;
+            };
+
+            ethernet-switch@71010000 {
+                compatible = "mscc,vsc7512-switch";
+                reg = <0x71010000 0x10000>,
+                    <0x71030000 0x10000>,
+                    <0x71080000 0x100>,
+                    <0x710e0000 0x10000>,
+                    <0x711e0000 0x100>,
+                    <0x711f0000 0x100>,
+                    <0x71200000 0x100>,
+                    <0x71210000 0x100>,
+                    <0x71220000 0x100>,
+                    <0x71230000 0x100>,
+                    <0x71240000 0x100>,
+                    <0x71250000 0x100>,
+                    <0x71260000 0x100>,
+                    <0x71270000 0x100>,
+                    <0x71280000 0x100>,
+                    <0x71800000 0x80000>,
+                    <0x71880000 0x10000>,
+                    <0x71040000 0x10000>,
+                    <0x71050000 0x10000>,
+                    <0x71060000 0x10000>;
+                reg-names = "sys", "rew", "qs", "ptp", "port0", "port1",
+                    "port2", "port3", "port4", "port5", "port6",
+                    "port7", "port8", "port9", "port10", "qsys",
+                    "ana", "s0", "s1", "s2";
+
+                ethernet-ports {
+                    #address-cells = <1>;
+                    #size-cells = <0>;
+
+                    port@1 {
+                        reg = <1>;
+                        label = "swp1";
+                        phy-handle = <&sw_phy1>;
+                        phy-mode = "internal";
+                    };
+
+                    port@2 {
+                        reg = <2>;
+                        label = "swp2";
+                        phy-handle = <&sw_phy2>;
+                        phy-mode = "internal";
+                    };
+
+                    port@a {
+                        reg = <10>;
+                        label = "cpu";
+                        ethernet = <&enetc_port0>;
+                        phy-connection-type = "sgmii";
+                        phys = <&ocelot_serdes 10 SERDES6G(2)>;
+
+                        fixed-link {
+                            speed = <1000>;
+                            full-duplex;
+                        };
+                    };
+                };
+            };
+        };
+    };
 
 ...
 
-- 
2.49.0

On Wed, 19 Mar 2025 13:30:58 +0100, Rasmus Villemoes wrote:
> The ocelot switches can also be strapped so that they can be
> controlled via an MDIO bus (on either address 0 or 31). Mention that
> and add an example.
> 
> Signed-off-by: Rasmus Villemoes <ravi@prevas.dk>
> ---
>  .../devicetree/bindings/mfd/mscc,ocelot.yaml  | 121 +++++++++++++++++-
>  1 file changed, 119 insertions(+), 2 deletions(-)
> 

My bot found errors running 'make dt_binding_check' on your patch:

yamllint warnings/errors:

dtschema/dtc warnings/errors:
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/mfd/mscc,ocelot.example.dtb: soc@0: ethernet-switch@71010000:ethernet-ports:port@a: 'phy-mode' is a required property
	from schema $id: http://devicetree.org/schemas/mfd/mscc,ocelot.yaml#
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/mfd/mscc,ocelot.example.dtb: soc@0: ethernet-switch@71010000:ethernet-ports:port@a: Unevaluated properties are not allowed ('phys' was unexpected)
	from schema $id: http://devicetree.org/schemas/mfd/mscc,ocelot.yaml#
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/mfd/mscc,ocelot.example.dtb: soc@0: ethernet-switch@71010000: Unevaluated properties are not allowed ('ethernet-ports' was unexpected)
	from schema $id: http://devicetree.org/schemas/mfd/mscc,ocelot.yaml#
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/mfd/mscc,ocelot.example.dtb: soc@0: ethernet-switch@71010000: Unevaluated properties are not allowed ('ethernet-ports' was unexpected)
	from schema $id: http://devicetree.org/schemas/mfd/mscc,ocelot.yaml#
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/mfd/mscc,ocelot.example.dtb: soc@0: 'serdes@710d0000' does not match any of the regexes: '^ethernet-switch@[0-9a-f]+$', '^gpio@[0-9a-f]+$', '^mdio@[0-9a-f]+$', '^pinctrl@[0-9a-f]+$', 'pinctrl-[0-9]+'
	from schema $id: http://devicetree.org/schemas/mfd/mscc,ocelot.yaml#
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/mfd/mscc,ocelot.example.dtb: serdes@710d0000: 'reg' does not match any of the regexes: 'pinctrl-[0-9]+'
	from schema $id: http://devicetree.org/schemas/phy/mscc,vsc7514-serdes.yaml#
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/mfd/mscc,ocelot.example.dtb: ethernet-switch@71010000: ethernet-ports:port@a: 'phy-mode' is a required property
	from schema $id: http://devicetree.org/schemas/net/mscc,vsc7514-switch.yaml#
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/mfd/mscc,ocelot.example.dtb: ethernet-switch@71010000: ethernet-ports:port@a: Unevaluated properties are not allowed ('phys' was unexpected)
	from schema $id: http://devicetree.org/schemas/net/mscc,vsc7514-switch.yaml#
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/mfd/mscc,ocelot.example.dtb: ethernet-switch@71010000: Unevaluated properties are not allowed ('ethernet-ports' was unexpected)
	from schema $id: http://devicetree.org/schemas/net/mscc,vsc7514-switch.yaml#

doc reference errors (make refcheckdocs):

See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20250319123058.452202-9-ravi@prevas.dk

The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.

On Wed, Mar 19 2025, "Rob Herring (Arm)" <robh@kernel.org> wrote:

> On Wed, 19 Mar 2025 13:30:58 +0100, Rasmus Villemoes wrote:
>> The ocelot switches can also be strapped so that they can be
>> controlled via an MDIO bus (on either address 0 or 31). Mention that
>> and add an example.
>> 
>> Signed-off-by: Rasmus Villemoes <ravi@prevas.dk>
>> ---
>>  .../devicetree/bindings/mfd/mscc,ocelot.yaml  | 121 +++++++++++++++++-
>>  1 file changed, 119 insertions(+), 2 deletions(-)
>> 
>
> My bot found errors running 'make dt_binding_check' on your patch:
>
> yamllint warnings/errors:
>
> dtschema/dtc warnings/errors:
> Documentation/devicetree/bindings/mfd/mscc,ocelot.example.dtb: soc@0: ethernet-switch@71010000:ethernet-ports:port@a: 'phy-mode' is a required property
> 	from schema $id:
> http://devicetree.org/schemas/mfd/mscc,ocelot.yaml#

So I thought phy-mode and phy-connection-type were interchangeable, but
apparently not wrt. dt bindings. I also see that I wasn't even
consistent (I used phy-mode for the user ports), so that one is easy to
fix.

> Documentation/devicetree/bindings/mfd/mscc,ocelot.example.dtb:
> soc@0: ethernet-switch@71010000:ethernet-ports:port@a: Unevaluated
> properties are not allowed ('phys' was unexpected)
> 	from schema $id:
> http://devicetree.org/schemas/mfd/mscc,ocelot.yaml#


Well, I do need to specify that phys property for the cpu-facing port,
so I'm gonna need some help to extend the schema to allow that. The
definition of what is allowed here isn't in the mscc,vsc7514-switch.yaml
file itself but is "inherited" through several levels of $ref, but I
don't think it would be appropriate to add to dsa-port.yaml as this is
somewhat special to this switch.

> Documentation/devicetree/bindings/mfd/mscc,ocelot.example.dtb:
> soc@0: 'serdes@710d0000' does not match any of the regexes:
> '^ethernet-switch@[0-9a-f]+$', '^gpio@[0-9a-f]+$', '^mdio@[0-9a-f]+$',
> '^pinctrl@[0-9a-f]+$', 'pinctrl-[0-9]+'

Hm. I have probably cheated somewhat, but I think there are a few things
that need fixing here.

First, I think the existing binding should allow for a "syscon" subnode,
which in turn can then contain that serdes subnode (see
arch/mips/boot/dts/mscc/ocelot.dtsi). But when I then put my serdes node
inside that new mscc,ocelot-hsio node, I think the MFD driver is going
to warn, because that expects a subnode with the mscc,vsc7514-serdes
compatible. So that should be updated to expect a mscc,ocelot-hsio
subnode, and the naming changed s/serdes/hsio/. I'll have to test this
first, to see if the various drivers still find the regmap(s) they need.

Rasmus