1. Patchew
  2. linux
  3. [PATCH V2 0/6] Refactor phy powerup sequence
  4. View patch

[PATCH V2 2/6] phy: qcom-qmp-ufs: Refactor phy_power_on and phy_calibrate callbacks

Nitin Rawat posted 6 patches 9 months ago
There is a newer version of this series
[PATCH V2 2/6] phy: qcom-qmp-ufs: Refactor phy_power_on and phy_calibrate callbacks
Posted by Nitin Rawat 9 months ago 
Commit 052553af6a31 ("ufs/phy: qcom: Refactor to use phy_init call")
puts enabling regulators & clks, calibrating UFS PHY, starting serdes
and polling PCS ready status into phy_power_on.

In Current code regulators enable, clks enable, calibrating UFS PHY,
start_serdes and polling PCS_ready_status are part of phy_power_on.

UFS PHY registers are retained after power collapse, meaning calibrating
UFS PHY, start_serdes and polling PCS_ready_status can be done only when
hba is powered_on, and not needed every time when phy_power_on is called
during resume. Hence keep the code which enables PHY's regulators & clks
in phy_power_on and move the rest steps into phy_calibrate function.

Refactor the code to retain PHY regulators & clks in phy_power_on and
move out rest of the code to new phy_calibrate function.

Co-developed-by: Can Guo <quic_cang@quicinc.com>
Signed-off-by: Can Guo <quic_cang@quicinc.com>
Signed-off-by: Nitin Rawat <quic_nitirawa@quicinc.com>
---
 drivers/phy/qualcomm/phy-qcom-qmp-ufs.c | 18 ++----------------
 1 file changed, 2 insertions(+), 16 deletions(-)

diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
index bb836bc0f736..0089ee80f852 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
@@ -1796,7 +1796,7 @@ static int qmp_ufs_com_exit(struct qmp_ufs *qmp)
 	return 0;
 }

-static int qmp_ufs_init(struct phy *phy)
+static int qmp_ufs_power_on(struct phy *phy)
 {
 	struct qmp_ufs *qmp = phy_get_drvdata(phy);
 	const struct qmp_phy_cfg *cfg = qmp->cfg;
@@ -1898,21 +1898,6 @@ static int qmp_ufs_exit(struct phy *phy)
 	return 0;
 }

-static int qmp_ufs_power_on(struct phy *phy)
-{
-	int ret;
-
-	ret = qmp_ufs_init(phy);
-	if (ret)
-		return ret;
-
-	ret = qmp_ufs_phy_calibrate(phy);
-	if (ret)
-		qmp_ufs_exit(phy);
-
-	return ret;
-}
-
 static int qmp_ufs_disable(struct phy *phy)
 {
 	int ret;
@@ -1942,6 +1927,7 @@ static int qmp_ufs_set_mode(struct phy *phy, enum phy_mode mode, int submode)
 static const struct phy_ops qcom_qmp_ufs_phy_ops = {
 	.power_on	= qmp_ufs_power_on,
 	.power_off	= qmp_ufs_disable,
+	.calibrate	= qmp_ufs_phy_calibrate,
 	.set_mode	= qmp_ufs_set_mode,
 	.owner		= THIS_MODULE,
 };
--
2.48.1
Re: [PATCH V2 2/6] phy: qcom-qmp-ufs: Refactor phy_power_on and phy_calibrate callbacks
Posted by neil.armstrong@linaro.org 9 months ago 
On 18/03/2025 15:49, Nitin Rawat wrote:
> Commit 052553af6a31 ("ufs/phy: qcom: Refactor to use phy_init call")
> puts enabling regulators & clks, calibrating UFS PHY, starting serdes
> and polling PCS ready status into phy_power_on.
> 
> In Current code regulators enable, clks enable, calibrating UFS PHY,
> start_serdes and polling PCS_ready_status are part of phy_power_on.
> 
> UFS PHY registers are retained after power collapse, meaning calibrating
> UFS PHY, start_serdes and polling PCS_ready_status can be done only when
> hba is powered_on, and not needed every time when phy_power_on is called
> during resume. Hence keep the code which enables PHY's regulators & clks
> in phy_power_on and move the rest steps into phy_calibrate function.
> 
> Refactor the code to retain PHY regulators & clks in phy_power_on and
> move out rest of the code to new phy_calibrate function.
> 
> Co-developed-by: Can Guo <quic_cang@quicinc.com>
> Signed-off-by: Can Guo <quic_cang@quicinc.com>
> Signed-off-by: Nitin Rawat <quic_nitirawa@quicinc.com>
> ---
>   drivers/phy/qualcomm/phy-qcom-qmp-ufs.c | 18 ++----------------
>   1 file changed, 2 insertions(+), 16 deletions(-)
> 
> diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
> index bb836bc0f736..0089ee80f852 100644
> --- a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
> +++ b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
> @@ -1796,7 +1796,7 @@ static int qmp_ufs_com_exit(struct qmp_ufs *qmp)
>   	return 0;
>   }
> 
> -static int qmp_ufs_init(struct phy *phy)
> +static int qmp_ufs_power_on(struct phy *phy)
>   {
>   	struct qmp_ufs *qmp = phy_get_drvdata(phy);
>   	const struct qmp_phy_cfg *cfg = qmp->cfg;
> @@ -1898,21 +1898,6 @@ static int qmp_ufs_exit(struct phy *phy)
>   	return 0;
>   }
> 
> -static int qmp_ufs_power_on(struct phy *phy)
> -{
> -	int ret;
> -
> -	ret = qmp_ufs_init(phy);
> -	if (ret)
> -		return ret;
> -
> -	ret = qmp_ufs_phy_calibrate(phy);
> -	if (ret)
> -		qmp_ufs_exit(phy);
> -
> -	return ret;
> -}
> -
>   static int qmp_ufs_disable(struct phy *phy)
>   {
>   	int ret;
> @@ -1942,6 +1927,7 @@ static int qmp_ufs_set_mode(struct phy *phy, enum phy_mode mode, int submode)
>   static const struct phy_ops qcom_qmp_ufs_phy_ops = {
>   	.power_on	= qmp_ufs_power_on,
>   	.power_off	= qmp_ufs_disable,
> +	.calibrate	= qmp_ufs_phy_calibrate,

Ok so this will break the UFS until patch 5 is applied,
breaking bisectability.

Make sure UFS host driver calls calibrate first, and then
do the refactor in the PHY driver.

And either all would go in a single tree or either PHY
or SCSI maintainer would need to provide an immutable
branch for the final merge.

>   	.set_mode	= qmp_ufs_set_mode,
>   	.owner		= THIS_MODULE,
>   };
> --
> 2.48.1
> 
>
Re: [PATCH V2 2/6] phy: qcom-qmp-ufs: Refactor phy_power_on and phy_calibrate callbacks
Posted by Nitin Rawat 8 months, 1 week ago 

On 3/18/2025 8:39 PM, neil.armstrong@linaro.org wrote:
> On 18/03/2025 15:49, Nitin Rawat wrote:
>> Commit 052553af6a31 ("ufs/phy: qcom: Refactor to use phy_init call")
>> puts enabling regulators & clks, calibrating UFS PHY, starting serdes
>> and polling PCS ready status into phy_power_on.
>>
>> In Current code regulators enable, clks enable, calibrating UFS PHY,
>> start_serdes and polling PCS_ready_status are part of phy_power_on.
>>
>> UFS PHY registers are retained after power collapse, meaning calibrating
>> UFS PHY, start_serdes and polling PCS_ready_status can be done only when
>> hba is powered_on, and not needed every time when phy_power_on is called
>> during resume. Hence keep the code which enables PHY's regulators & clks
>> in phy_power_on and move the rest steps into phy_calibrate function.
>>
>> Refactor the code to retain PHY regulators & clks in phy_power_on and
>> move out rest of the code to new phy_calibrate function.
>>
>> Co-developed-by: Can Guo <quic_cang@quicinc.com>
>> Signed-off-by: Can Guo <quic_cang@quicinc.com>
>> Signed-off-by: Nitin Rawat <quic_nitirawa@quicinc.com>
>> ---
>>   drivers/phy/qualcomm/phy-qcom-qmp-ufs.c | 18 ++----------------
>>   1 file changed, 2 insertions(+), 16 deletions(-)
>>
>> diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c b/drivers/phy/ 
>> qualcomm/phy-qcom-qmp-ufs.c
>> index bb836bc0f736..0089ee80f852 100644
>> --- a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
>> +++ b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
>> @@ -1796,7 +1796,7 @@ static int qmp_ufs_com_exit(struct qmp_ufs *qmp)
>>       return 0;
>>   }
>>
>> -static int qmp_ufs_init(struct phy *phy)
>> +static int qmp_ufs_power_on(struct phy *phy)
>>   {
>>       struct qmp_ufs *qmp = phy_get_drvdata(phy);
>>       const struct qmp_phy_cfg *cfg = qmp->cfg;
>> @@ -1898,21 +1898,6 @@ static int qmp_ufs_exit(struct phy *phy)
>>       return 0;
>>   }
>>
>> -static int qmp_ufs_power_on(struct phy *phy)
>> -{
>> -    int ret;
>> -
>> -    ret = qmp_ufs_init(phy);
>> -    if (ret)
>> -        return ret;
>> -
>> -    ret = qmp_ufs_phy_calibrate(phy);
>> -    if (ret)
>> -        qmp_ufs_exit(phy);
>> -
>> -    return ret;
>> -}
>> -
>>   static int qmp_ufs_disable(struct phy *phy)
>>   {
>>       int ret;
>> @@ -1942,6 +1927,7 @@ static int qmp_ufs_set_mode(struct phy *phy, 
>> enum phy_mode mode, int submode)
>>   static const struct phy_ops qcom_qmp_ufs_phy_ops = {
>>       .power_on    = qmp_ufs_power_on,
>>       .power_off    = qmp_ufs_disable,
>> +    .calibrate    = qmp_ufs_phy_calibrate,
> 
> Ok so this will break the UFS until patch 5 is applied,
> breaking bisectability.
> 
> Make sure UFS host driver calls calibrate first, and then
> do the refactor in the PHY driver.

Hi Neil.

Thanks for the review. I have taken care of bisecatablity
compliance by making UFS host driver calls calibrate first
in latest patch set.

Regards,
Nitin



> 
> And either all would go in a single tree or either PHY
> or SCSI maintainer would need to provide an immutable
> branch for the final merge.
> 
>>       .set_mode    = qmp_ufs_set_mode,
>>       .owner        = THIS_MODULE,
>>   };
>> -- 
>> 2.48.1
>>
>>
>
Re: [PATCH V2 2/6] phy: qcom-qmp-ufs: Refactor phy_power_on and phy_calibrate callbacks
Posted by Dmitry Baryshkov 8 months, 1 week ago 
On Thu, Apr 10, 2025 at 02:43:52PM +0530, Nitin Rawat wrote:
> 
> 
> On 3/18/2025 8:39 PM, neil.armstrong@linaro.org wrote:
> > On 18/03/2025 15:49, Nitin Rawat wrote:
> > > Commit 052553af6a31 ("ufs/phy: qcom: Refactor to use phy_init call")
> > > puts enabling regulators & clks, calibrating UFS PHY, starting serdes
> > > and polling PCS ready status into phy_power_on.
> > > 
> > > In Current code regulators enable, clks enable, calibrating UFS PHY,
> > > start_serdes and polling PCS_ready_status are part of phy_power_on.
> > > 
> > > UFS PHY registers are retained after power collapse, meaning calibrating
> > > UFS PHY, start_serdes and polling PCS_ready_status can be done only when
> > > hba is powered_on, and not needed every time when phy_power_on is called
> > > during resume. Hence keep the code which enables PHY's regulators & clks
> > > in phy_power_on and move the rest steps into phy_calibrate function.
> > > 
> > > Refactor the code to retain PHY regulators & clks in phy_power_on and
> > > move out rest of the code to new phy_calibrate function.
> > > 
> > > Co-developed-by: Can Guo <quic_cang@quicinc.com>
> > > Signed-off-by: Can Guo <quic_cang@quicinc.com>
> > > Signed-off-by: Nitin Rawat <quic_nitirawa@quicinc.com>
> > > ---
> > >   drivers/phy/qualcomm/phy-qcom-qmp-ufs.c | 18 ++----------------
> > >   1 file changed, 2 insertions(+), 16 deletions(-)
> > > 
> > > diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c b/drivers/phy/
> > > qualcomm/phy-qcom-qmp-ufs.c
> > > index bb836bc0f736..0089ee80f852 100644
> > > --- a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
> > > +++ b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
> > > @@ -1796,7 +1796,7 @@ static int qmp_ufs_com_exit(struct qmp_ufs *qmp)
> > >       return 0;
> > >   }
> > > 
> > > -static int qmp_ufs_init(struct phy *phy)
> > > +static int qmp_ufs_power_on(struct phy *phy)
> > >   {
> > >       struct qmp_ufs *qmp = phy_get_drvdata(phy);
> > >       const struct qmp_phy_cfg *cfg = qmp->cfg;
> > > @@ -1898,21 +1898,6 @@ static int qmp_ufs_exit(struct phy *phy)
> > >       return 0;
> > >   }
> > > 
> > > -static int qmp_ufs_power_on(struct phy *phy)
> > > -{
> > > -    int ret;
> > > -
> > > -    ret = qmp_ufs_init(phy);
> > > -    if (ret)
> > > -        return ret;
> > > -
> > > -    ret = qmp_ufs_phy_calibrate(phy);
> > > -    if (ret)
> > > -        qmp_ufs_exit(phy);
> > > -
> > > -    return ret;
> > > -}
> > > -
> > >   static int qmp_ufs_disable(struct phy *phy)
> > >   {
> > >       int ret;
> > > @@ -1942,6 +1927,7 @@ static int qmp_ufs_set_mode(struct phy *phy,
> > > enum phy_mode mode, int submode)
> > >   static const struct phy_ops qcom_qmp_ufs_phy_ops = {
> > >       .power_on    = qmp_ufs_power_on,
> > >       .power_off    = qmp_ufs_disable,
> > > +    .calibrate    = qmp_ufs_phy_calibrate,
> > 
> > Ok so this will break the UFS until patch 5 is applied,
> > breaking bisectability.
> > 
> > Make sure UFS host driver calls calibrate first, and then
> > do the refactor in the PHY driver.
> 
> Hi Neil.
> 
> Thanks for the review. I have taken care of bisecatablity
> compliance by making UFS host driver calls calibrate first
> in latest patch set.

_latest_. So if this patch gets merged first, UFS support will be
broken.

> 
> Regards,
> Nitin
> 
> 
> 
> > 
> > And either all would go in a single tree or either PHY
> > or SCSI maintainer would need to provide an immutable
> > branch for the final merge.
> > 
> > >       .set_mode    = qmp_ufs_set_mode,
> > >       .owner        = THIS_MODULE,
> > >   };
> > > -- 
> > > 2.48.1
> > > 
> > > 
> > 
> 

-- 
With best wishes
Dmitry

Patchew 2.1-devel-b67e4c2

© 2016 - 2025 Red Hat, Inc.