Add driver for Maxim Integrated MAX7360 GPIO/GPO controller.
Two sets of GPIOs are provided by the device:
- Up to 8 GPIOs, shared with the PWM and rotary encoder functionalities.
These GPIOs also provide interrupts on input changes.
- Up to 6 GPOs, on unused keypad columns pins.
Co-developed-by: Kamel Bouhara <kamel.bouhara@bootlin.com>
Signed-off-by: Kamel Bouhara <kamel.bouhara@bootlin.com>
Signed-off-by: Mathieu Dubois-Briand <mathieu.dubois-briand@bootlin.com>
---
drivers/gpio/Kconfig | 12 +++
drivers/gpio/Makefile | 1 +
drivers/gpio/gpio-max7360.c | 246 ++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 259 insertions(+)
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 98b4d1633b25..4ff68ec6a990 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -1445,6 +1445,18 @@ config GPIO_MADERA
help
Support for GPIOs on Cirrus Logic Madera class codecs.
+config GPIO_MAX7360
+ tristate "MAX7360 GPIO support"
+ depends on MFD_MAX7360
+ select GPIO_REGMAP
+ select PINCTRL_MAX7360
+ help
+ Allows to use MAX7360 I/O Expander PWM lines as GPIO and keypad COL
+ lines as GPO.
+
+ This driver can also be built as a module. If so, the module will be
+ called gpio-max7360.
+
config GPIO_MAX77620
tristate "GPIO support for PMIC MAX77620 and MAX20024"
depends on MFD_MAX77620
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index af3ba4d81b58..581341b3e3e4 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -100,6 +100,7 @@ obj-$(CONFIG_GPIO_MAX7300) += gpio-max7300.o
obj-$(CONFIG_GPIO_MAX7301) += gpio-max7301.o
obj-$(CONFIG_GPIO_MAX730X) += gpio-max730x.o
obj-$(CONFIG_GPIO_MAX732X) += gpio-max732x.o
+obj-$(CONFIG_GPIO_MAX7360) += gpio-max7360.o
obj-$(CONFIG_GPIO_MAX77620) += gpio-max77620.o
obj-$(CONFIG_GPIO_MAX77650) += gpio-max77650.o
obj-$(CONFIG_GPIO_MB86S7X) += gpio-mb86s7x.o
diff --git a/drivers/gpio/gpio-max7360.c b/drivers/gpio/gpio-max7360.c
new file mode 100644
index 000000000000..4acf0a9dbaba
--- /dev/null
+++ b/drivers/gpio/gpio-max7360.c
@@ -0,0 +1,246 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright 2025 Bootlin
+ *
+ * Author: Kamel BOUHARA <kamel.bouhara@bootlin.com>
+ * Author: Mathieu Dubois-Briand <mathieu.dubois-briand@bootlin.com>
+ */
+
+#include <linux/bitmap.h>
+#include <linux/gpio/driver.h>
+#include <linux/gpio/regmap.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/mfd/max7360.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/property.h>
+#include <linux/regmap.h>
+#include <linux/slab.h>
+
+#define MAX7360_GPIO_PORT 1
+#define MAX7360_GPIO_COL 2
+
+static int max7360_get_available_gpos(struct device *dev, unsigned int *available_gpios)
+{
+ u32 columns;
+ int ret;
+
+ ret = device_property_read_u32(dev->parent, "keypad,num-columns", &columns);
+ if (ret < 0) {
+ dev_err(dev, "Failed to read columns count\n");
+ return ret;
+ }
+
+ *available_gpios = min(MAX7360_MAX_GPO, MAX7360_MAX_KEY_COLS - columns);
+
+ return 0;
+}
+
+static int max7360_gpo_init_valid_mask(struct gpio_chip *gc,
+ unsigned long *valid_mask,
+ unsigned int ngpios)
+{
+ unsigned int available_gpios;
+ int ret;
+
+ ret = max7360_get_available_gpos(gc->parent, &available_gpios);
+ if (ret)
+ return ret;
+
+ bitmap_clear(valid_mask, 0, MAX7360_MAX_KEY_COLS - ngpios);
+
+ return 0;
+}
+
+static int max7360_set_gpos_count(struct device *dev, struct regmap *regmap)
+{
+ /*
+ * MAX7360 COL0 to COL7 pins can be used either as keypad columns,
+ * general purpose output or a mix of both.
+ * By default, all pins are used as keypad, here we update this
+ * configuration to allow to use some of them as GPIOs.
+ */
+ unsigned int available_gpios;
+ unsigned int val;
+ int ret;
+
+ ret = max7360_get_available_gpos(dev, &available_gpios);
+ if (ret)
+ return ret;
+
+ /*
+ * Configure which GPIOs will be used for keypad.
+ * MAX7360_REG_DEBOUNCE contains configuration both for keypad debounce
+ * timings and gpos/keypad columns repartition. Only the later is
+ * modified here.
+ */
+ val = FIELD_PREP(MAX7360_PORTS, available_gpios);
+ ret = regmap_write_bits(regmap, MAX7360_REG_DEBOUNCE, MAX7360_PORTS, val);
+ if (ret) {
+ dev_err(dev, "Failed to write max7360 columns/gpos configuration");
+ return ret;
+ }
+
+ return 0;
+}
+
+static int max7360_gpio_reg_mask_xlate(struct gpio_regmap *gpio,
+ unsigned int base, unsigned int offset,
+ unsigned int *reg, unsigned int *mask)
+{
+ if (base == MAX7360_REG_PWMBASE) {
+ /*
+ * GPIO output is using PWM duty cycle registers: one register
+ * per line, with value being either 0 or 255.
+ */
+ *reg = base + offset;
+ *mask = 0xFF;
+ } else {
+ *reg = base;
+ *mask = BIT(offset);
+ }
+
+ return 0;
+}
+
+static const struct regmap_irq max7360_regmap_irqs[MAX7360_MAX_GPIO] = {
+ REGMAP_IRQ_REG(0, 0, BIT(0)),
+ REGMAP_IRQ_REG(1, 0, BIT(1)),
+ REGMAP_IRQ_REG(2, 0, BIT(2)),
+ REGMAP_IRQ_REG(3, 0, BIT(3)),
+ REGMAP_IRQ_REG(4, 0, BIT(4)),
+ REGMAP_IRQ_REG(5, 0, BIT(5)),
+ REGMAP_IRQ_REG(6, 0, BIT(6)),
+ REGMAP_IRQ_REG(7, 0, BIT(7)),
+};
+
+static int max7360_handle_mask_sync(const int index,
+ const unsigned int mask_buf_def,
+ const unsigned int mask_buf,
+ void *const irq_drv_data)
+{
+ struct regmap *regmap = irq_drv_data;
+ unsigned int val;
+
+ for (unsigned int i = 0; i < MAX7360_MAX_GPIO; ++i) {
+ val = (mask_buf & BIT(i)) ? MAX7360_PORT_CFG_INTERRUPT_MASK : 0;
+ regmap_write_bits(regmap, MAX7360_REG_PWMCFG(i),
+ MAX7360_PORT_CFG_INTERRUPT_MASK, val);
+ }
+
+ return 0;
+}
+
+static int max7360_gpio_probe(struct platform_device *pdev)
+{
+ struct regmap_irq_chip *irq_chip;
+ struct gpio_regmap_config gpio_config = { };
+ struct device *dev = &pdev->dev;
+ unsigned long gpio_function;
+ struct regmap *regmap;
+ unsigned int outconf;
+ int ret;
+
+ regmap = dev_get_regmap(dev->parent, NULL);
+ if (!regmap)
+ return dev_err_probe(dev, -ENODEV, "could not get parent regmap\n");
+
+ gpio_function = (uintptr_t)device_get_match_data(dev);
+
+ if (gpio_function == MAX7360_GPIO_PORT &&
+ (device_property_read_bool(dev, "interrupt-controller"))) {
+ /*
+ * Port GPIOs with interrupt-controller property: add IRQ
+ * controller.
+ */
+ gpio_config.regmap_irq_flags = IRQF_TRIGGER_LOW | IRQF_ONESHOT | IRQF_SHARED;
+ gpio_config.regmap_irq_irqno = fwnode_irq_get_byname(dev_fwnode(dev->parent),
+ "inti");
+ if (gpio_config.regmap_irq_irqno < 0)
+ return dev_err_probe(dev, gpio_config.regmap_irq_irqno,
+ "Failed to get IRQ\n");
+
+ irq_chip = devm_kzalloc(dev, sizeof(*irq_chip), GFP_KERNEL);
+ gpio_config.regmap_irq_chip = irq_chip;
+ if (!irq_chip)
+ return -ENOMEM;
+
+ irq_chip->name = dev_name(dev);
+ irq_chip->status_base = MAX7360_REG_GPIOIN;
+ irq_chip->num_regs = 1;
+ irq_chip->num_irqs = MAX7360_MAX_GPIO;
+ irq_chip->irqs = max7360_regmap_irqs;
+ irq_chip->handle_mask_sync = max7360_handle_mask_sync;
+ irq_chip->status_is_level = true;
+ irq_chip->irq_drv_data = regmap;
+
+ for (unsigned int i = 0; i < MAX7360_MAX_GPIO; i++) {
+ regmap_write_bits(regmap, MAX7360_REG_PWMCFG(i),
+ MAX7360_PORT_CFG_INTERRUPT_EDGES,
+ MAX7360_PORT_CFG_INTERRUPT_EDGES);
+ }
+ }
+
+ if (gpio_function == MAX7360_GPIO_PORT) {
+ /*
+ * Port GPIOs: set output mode configuration (constant-current or not).
+ * This property is optional.
+ */
+ outconf = 0;
+ ret = device_property_read_u32(dev, "maxim,constant-current-disable", &outconf);
+ if (ret && (ret != -EINVAL))
+ return dev_err_probe(dev, ret, "Failed to read %s device property\n",
+ "maxim,constant-current-disable");
+
+ regmap_write(regmap, MAX7360_REG_GPIOOUTM, outconf);
+ }
+
+ /* Add gpio device. */
+ gpio_config.parent = dev;
+ gpio_config.regmap = regmap;
+ if (gpio_function == MAX7360_GPIO_PORT) {
+ gpio_config.ngpio = MAX7360_MAX_GPIO;
+ gpio_config.reg_dat_base = GPIO_REGMAP_ADDR(MAX7360_REG_GPIOIN);
+ gpio_config.reg_set_base = GPIO_REGMAP_ADDR(MAX7360_REG_PWMBASE);
+ gpio_config.reg_dir_out_base = GPIO_REGMAP_ADDR(MAX7360_REG_GPIOCTRL);
+ gpio_config.ngpio_per_reg = MAX7360_MAX_GPIO;
+ gpio_config.reg_mask_xlate = max7360_gpio_reg_mask_xlate;
+ } else {
+ ret = max7360_set_gpos_count(dev, regmap);
+ if (ret)
+ return dev_err_probe(dev, ret, "Failed to set GPOS pin count\n");
+
+ gpio_config.reg_set_base = GPIO_REGMAP_ADDR(MAX7360_REG_PORTS);
+ gpio_config.ngpio = MAX7360_MAX_KEY_COLS;
+ gpio_config.init_valid_mask = max7360_gpo_init_valid_mask;
+ }
+
+ return PTR_ERR_OR_ZERO(devm_gpio_regmap_register(dev, &gpio_config));
+}
+
+static const struct of_device_id max7360_gpio_of_match[] = {
+ {
+ .compatible = "maxim,max7360-gpo",
+ .data = (void *)MAX7360_GPIO_COL
+ }, {
+ .compatible = "maxim,max7360-gpio",
+ .data = (void *)MAX7360_GPIO_PORT
+ }, {
+ }
+};
+MODULE_DEVICE_TABLE(of, max7360_gpio_of_match);
+
+static struct platform_driver max7360_gpio_driver = {
+ .driver = {
+ .name = "max7360-gpio",
+ .of_match_table = max7360_gpio_of_match,
+ },
+ .probe = max7360_gpio_probe,
+};
+module_platform_driver(max7360_gpio_driver);
+
+MODULE_DESCRIPTION("MAX7360 GPIO driver");
+MODULE_AUTHOR("Kamel BOUHARA <kamel.bouhara@bootlin.com>");
+MODULE_AUTHOR("Mathieu Dubois-Briand <mathieu.dubois-briand@bootlin.com>");
+MODULE_LICENSE("GPL");
--
2.39.5Hi Mathieu,
kernel test robot noticed the following build warnings:
[auto build test WARNING on a64dcfb451e254085a7daee5fe51bf22959d52d3]
url: https://github.com/intel-lab-lkp/linux/commits/Mathieu-Dubois-Briand/dt-bindings-mfd-gpio-Add-MAX7360/20250319-003750
base: a64dcfb451e254085a7daee5fe51bf22959d52d3
patch link: https://lore.kernel.org/r/20250318-mdb-max7360-support-v5-8-fb20baf97da0%40bootlin.com
patch subject: [PATCH v5 08/11] gpio: max7360: Add MAX7360 gpio support
config: nios2-kismet-CONFIG_PINCTRL_MAX7360-CONFIG_GPIO_MAX7360-0-0 (https://download.01.org/0day-ci/archive/20250320/202503200617.h8re2FlY-lkp@intel.com/config)
reproduce: (https://download.01.org/0day-ci/archive/20250320/202503200617.h8re2FlY-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202503200617.h8re2FlY-lkp@intel.com/
kismet warnings: (new ones prefixed by >>)
>> kismet: WARNING: unmet direct dependencies detected for PINCTRL_MAX7360 when selected by GPIO_MAX7360
WARNING: unmet direct dependencies detected for PINCTRL_MAX7360
Depends on [n]: PINCTRL [=n] && MFD_MAX7360 [=y]
Selected by [y]:
- GPIO_MAX7360 [=y] && GPIOLIB [=y] && MFD_MAX7360 [=y]
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
Hi Mathieu,
kernel test robot noticed the following build errors:
[auto build test ERROR on a64dcfb451e254085a7daee5fe51bf22959d52d3]
url: https://github.com/intel-lab-lkp/linux/commits/Mathieu-Dubois-Briand/dt-bindings-mfd-gpio-Add-MAX7360/20250319-003750
base: a64dcfb451e254085a7daee5fe51bf22959d52d3
patch link: https://lore.kernel.org/r/20250318-mdb-max7360-support-v5-8-fb20baf97da0%40bootlin.com
patch subject: [PATCH v5 08/11] gpio: max7360: Add MAX7360 gpio support
config: m68k-allmodconfig (https://download.01.org/0day-ci/archive/20250319/202503192257.KfRkL589-lkp@intel.com/config)
compiler: m68k-linux-gcc (GCC) 8.5.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250319/202503192257.KfRkL589-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202503192257.KfRkL589-lkp@intel.com/
All errors (new ones prefixed by >>):
drivers/gpio/gpio-max7360.c: In function 'max7360_set_gpos_count':
>> drivers/gpio/gpio-max7360.c:78:8: error: implicit declaration of function 'FIELD_PREP' [-Werror=implicit-function-declaration]
val = FIELD_PREP(MAX7360_PORTS, available_gpios);
^~~~~~~~~~
cc1: some warnings being treated as errors
vim +/FIELD_PREP +78 drivers/gpio/gpio-max7360.c
55
56 static int max7360_set_gpos_count(struct device *dev, struct regmap *regmap)
57 {
58 /*
59 * MAX7360 COL0 to COL7 pins can be used either as keypad columns,
60 * general purpose output or a mix of both.
61 * By default, all pins are used as keypad, here we update this
62 * configuration to allow to use some of them as GPIOs.
63 */
64 unsigned int available_gpios;
65 unsigned int val;
66 int ret;
67
68 ret = max7360_get_available_gpos(dev, &available_gpios);
69 if (ret)
70 return ret;
71
72 /*
73 * Configure which GPIOs will be used for keypad.
74 * MAX7360_REG_DEBOUNCE contains configuration both for keypad debounce
75 * timings and gpos/keypad columns repartition. Only the later is
76 * modified here.
77 */
> 78 val = FIELD_PREP(MAX7360_PORTS, available_gpios);
79 ret = regmap_write_bits(regmap, MAX7360_REG_DEBOUNCE, MAX7360_PORTS, val);
80 if (ret) {
81 dev_err(dev, "Failed to write max7360 columns/gpos configuration");
82 return ret;
83 }
84
85 return 0;
86 }
87
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
On Tue, Mar 18, 2025 at 05:26:24PM +0100, Mathieu Dubois-Briand wrote:
> Add driver for Maxim Integrated MAX7360 GPIO/GPO controller.
>
> Two sets of GPIOs are provided by the device:
> - Up to 8 GPIOs, shared with the PWM and rotary encoder functionalities.
> These GPIOs also provide interrupts on input changes.
> - Up to 6 GPOs, on unused keypad columns pins.
...
+ bitfield.h
> +#include <linux/bitmap.h>
+ err.h
> +#include <linux/gpio/driver.h>
> +#include <linux/gpio/regmap.h>
> +#include <linux/init.h>
> +#include <linux/interrupt.h>
> +#include <linux/mfd/max7360.h>
+ mod_devicetable.h
> +#include <linux/module.h>
> +#include <linux/platform_device.h>
> +#include <linux/property.h>
> +#include <linux/regmap.h>
> +#include <linux/slab.h>
> +static int max7360_get_available_gpos(struct device *dev, unsigned int *available_gpios)
> +{
> + u32 columns;
> + int ret;
> +
> + ret = device_property_read_u32(dev->parent, "keypad,num-columns", &columns);
> + if (ret < 0) {
' < 0' is redundant,
> + dev_err(dev, "Failed to read columns count\n");
> + return ret;
> + }
> +
> + *available_gpios = min(MAX7360_MAX_GPO, MAX7360_MAX_KEY_COLS - columns);
> +
> + return 0;
> +}
...
> +static int max7360_set_gpos_count(struct device *dev, struct regmap *regmap)
> +{
> + /*
> + * MAX7360 COL0 to COL7 pins can be used either as keypad columns,
> + * general purpose output or a mix of both.
> + * By default, all pins are used as keypad, here we update this
> + * configuration to allow to use some of them as GPIOs.
> + */
> + unsigned int available_gpios;
> + unsigned int val;
> + int ret;
> +
> + ret = max7360_get_available_gpos(dev, &available_gpios);
> + if (ret)
> + return ret;
> +
> + /*
> + * Configure which GPIOs will be used for keypad.
> + * MAX7360_REG_DEBOUNCE contains configuration both for keypad debounce
> + * timings and gpos/keypad columns repartition. Only the later is
> + * modified here.
> + */
> + val = FIELD_PREP(MAX7360_PORTS, available_gpios);
> + ret = regmap_write_bits(regmap, MAX7360_REG_DEBOUNCE, MAX7360_PORTS, val);
> + if (ret) {
> + dev_err(dev, "Failed to write max7360 columns/gpos configuration");
> + return ret;
> + }
> +
> + return 0;
Just
return ret;
?
> +}
...
> +static int max7360_gpio_reg_mask_xlate(struct gpio_regmap *gpio,
> + unsigned int base, unsigned int offset,
> + unsigned int *reg, unsigned int *mask)
> +{
> + if (base == MAX7360_REG_PWMBASE) {
> + /*
> + * GPIO output is using PWM duty cycle registers: one register
> + * per line, with value being either 0 or 255.
> + */
> + *reg = base + offset;
> + *mask = 0xFF;
GENMASK() ?
> + } else {
> + *reg = base;
> + *mask = BIT(offset);
> + }
> +
> + return 0;
> +}
...
> +static int max7360_handle_mask_sync(const int index,
> + const unsigned int mask_buf_def,
> + const unsigned int mask_buf,
> + void *const irq_drv_data)
> +{
> + struct regmap *regmap = irq_drv_data;
> + unsigned int val;
> +
> + for (unsigned int i = 0; i < MAX7360_MAX_GPIO; ++i) {
> + val = (mask_buf & BIT(i)) ? MAX7360_PORT_CFG_INTERRUPT_MASK : 0;
> + regmap_write_bits(regmap, MAX7360_REG_PWMCFG(i),
> + MAX7360_PORT_CFG_INTERRUPT_MASK, val);
Wondering if regmap_assign_bits() can be used here.
But in any case, no error checks? It seems you do elsewhere, but this driver...
> + }
> +
> + return 0;
> +}
...
> +static int max7360_gpio_probe(struct platform_device *pdev)
> +{
> + struct regmap_irq_chip *irq_chip;
> + struct gpio_regmap_config gpio_config = { };
> + struct device *dev = &pdev->dev;
> + unsigned long gpio_function;
> + struct regmap *regmap;
> + unsigned int outconf;
> + int ret;
> +
> + regmap = dev_get_regmap(dev->parent, NULL);
> + if (!regmap)
> + return dev_err_probe(dev, -ENODEV, "could not get parent regmap\n");
> +
> + gpio_function = (uintptr_t)device_get_match_data(dev);
> +
Redundant blank line.
> + if (gpio_function == MAX7360_GPIO_PORT &&
> + (device_property_read_bool(dev, "interrupt-controller"))) {
Unneeded parentheses.
> + /*
> + * Port GPIOs with interrupt-controller property: add IRQ
> + * controller.
> + */
> + gpio_config.regmap_irq_flags = IRQF_TRIGGER_LOW | IRQF_ONESHOT | IRQF_SHARED;
But why is this being overridden? The DT or another firmware description has to
provide the correct settings, no?
> + gpio_config.regmap_irq_irqno = fwnode_irq_get_byname(dev_fwnode(dev->parent),
> + "inti");
Better split is
gpio_config.regmap_irq_irqno =
fwnode_irq_get_byname(dev_fwnode(dev->parent), "inti");
You also can use the same trick elsewhere in the similar cases.
> + if (gpio_config.regmap_irq_irqno < 0)
> + return dev_err_probe(dev, gpio_config.regmap_irq_irqno,
> + "Failed to get IRQ\n");
> +
> + irq_chip = devm_kzalloc(dev, sizeof(*irq_chip), GFP_KERNEL);
> + gpio_config.regmap_irq_chip = irq_chip;
> + if (!irq_chip)
> + return -ENOMEM;
> +
> + irq_chip->name = dev_name(dev);
> + irq_chip->status_base = MAX7360_REG_GPIOIN;
> + irq_chip->num_regs = 1;
> + irq_chip->num_irqs = MAX7360_MAX_GPIO;
> + irq_chip->irqs = max7360_regmap_irqs;
> + irq_chip->handle_mask_sync = max7360_handle_mask_sync;
> + irq_chip->status_is_level = true;
I would group this with status_base above. Easier to read and I think they are
kinda related.
> + irq_chip->irq_drv_data = regmap;
> +
> + for (unsigned int i = 0; i < MAX7360_MAX_GPIO; i++) {
> + regmap_write_bits(regmap, MAX7360_REG_PWMCFG(i),
> + MAX7360_PORT_CFG_INTERRUPT_EDGES,
> + MAX7360_PORT_CFG_INTERRUPT_EDGES);
No error checks?
> + }
> + }
> +
Probably a comment why it's not 'else if' here?
> + if (gpio_function == MAX7360_GPIO_PORT) {
> + /*
> + * Port GPIOs: set output mode configuration (constant-current or not).
> + * This property is optional.
> + */
> + outconf = 0;
> + ret = device_property_read_u32(dev, "maxim,constant-current-disable", &outconf);
> + if (ret && (ret != -EINVAL))
> + return dev_err_probe(dev, ret, "Failed to read %s device property\n",
> + "maxim,constant-current-disable");
This part is fragile, error codes are not _so_ stable inside the kernel,
and this may add an unneeded churn in case of pedantic cleanup.
Personally I would drop any messages and avoid failing the probe as to me it
does not sound like a critical issue.
> + regmap_write(regmap, MAX7360_REG_GPIOOUTM, outconf);
> + }
> +
> + /* Add gpio device. */
> + gpio_config.parent = dev;
> + gpio_config.regmap = regmap;
> + if (gpio_function == MAX7360_GPIO_PORT) {
> + gpio_config.ngpio = MAX7360_MAX_GPIO;
> + gpio_config.reg_dat_base = GPIO_REGMAP_ADDR(MAX7360_REG_GPIOIN);
> + gpio_config.reg_set_base = GPIO_REGMAP_ADDR(MAX7360_REG_PWMBASE);
> + gpio_config.reg_dir_out_base = GPIO_REGMAP_ADDR(MAX7360_REG_GPIOCTRL);
> + gpio_config.ngpio_per_reg = MAX7360_MAX_GPIO;
> + gpio_config.reg_mask_xlate = max7360_gpio_reg_mask_xlate;
> + } else {
> + ret = max7360_set_gpos_count(dev, regmap);
> + if (ret)
> + return dev_err_probe(dev, ret, "Failed to set GPOS pin count\n");
> +
> + gpio_config.reg_set_base = GPIO_REGMAP_ADDR(MAX7360_REG_PORTS);
> + gpio_config.ngpio = MAX7360_MAX_KEY_COLS;
> + gpio_config.init_valid_mask = max7360_gpo_init_valid_mask;
> + }
> +
> + return PTR_ERR_OR_ZERO(devm_gpio_regmap_register(dev, &gpio_config));
> +}
--
With Best Regards,
Andy Shevchenko
On Wed Mar 19, 2025 at 12:50 PM CET, Andy Shevchenko wrote: > On Tue, Mar 18, 2025 at 05:26:24PM +0100, Mathieu Dubois-Briand wrote: > > Add driver for Maxim Integrated MAX7360 GPIO/GPO controller. > > > > Two sets of GPIOs are provided by the device: > > - Up to 8 GPIOs, shared with the PWM and rotary encoder functionalities. > > These GPIOs also provide interrupts on input changes. > > - Up to 6 GPOs, on unused keypad columns pins. > > ... > > > + /* > > + * Port GPIOs with interrupt-controller property: add IRQ > > + * controller. > > + */ > > + gpio_config.regmap_irq_flags = IRQF_TRIGGER_LOW | IRQF_ONESHOT | IRQF_SHARED; > > But why is this being overridden? The DT or another firmware description has to > provide the correct settings, no? > Ok, thinking about it, yes, IRQF_TRIGGER_LOW shoud come from firmware description. But IRQF_ONESHOT and IRQF_SHARED should still come from here, no? I'm OK with all other points. Thanks for your review! Mathieu -- Mathieu Dubois-Briand, Bootlin Embedded Linux and Kernel engineering https://bootlin.com
On Tue, Mar 25, 2025 at 03:46:20PM +0100, Mathieu Dubois-Briand wrote: > On Wed Mar 19, 2025 at 12:50 PM CET, Andy Shevchenko wrote: > > On Tue, Mar 18, 2025 at 05:26:24PM +0100, Mathieu Dubois-Briand wrote: ... > > > + /* > > > + * Port GPIOs with interrupt-controller property: add IRQ > > > + * controller. > > > + */ > > > + gpio_config.regmap_irq_flags = IRQF_TRIGGER_LOW | IRQF_ONESHOT | IRQF_SHARED; > > > > But why is this being overridden? The DT or another firmware description has to > > provide the correct settings, no? > > Ok, thinking about it, yes, IRQF_TRIGGER_LOW shoud come from firmware > description. But IRQF_ONESHOT and IRQF_SHARED should still come from > here, no? This is my view as well. -- With Best Regards, Andy Shevchenko
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