[PATCH v2 19/29] x86/cpu: Use enums for TLB descriptor types

Ahmed S. Darwish posted 29 patches 9 months ago
There is a newer version of this series
[PATCH v2 19/29] x86/cpu: Use enums for TLB descriptor types
Posted by Ahmed S. Darwish 9 months ago
The leaf 0x2 one-byte TLB descriptor types:

	TLB_INST_4K
	TLB_INST_4M
	TLB_INST_2M_4M
	...

are just discriminators to be used within the intel_tlb_table[] mapping.
Their specific values are irrelevant.

Use enums for such types.

Make the enum packed and static assert that its values remain within a
single byte so that the intel_tlb_table[] size do not go out of hand.

Signed-off-by: Ahmed S. Darwish <darwi@linutronix.de>
---
 arch/x86/include/asm/cpuid/types.h | 29 +++++++++++++++++++++++++++++
 arch/x86/kernel/cpu/intel.c        | 28 +++-------------------------
 2 files changed, 32 insertions(+), 25 deletions(-)

diff --git a/arch/x86/include/asm/cpuid/types.h b/arch/x86/include/asm/cpuid/types.h
index a66192f9df4c..39b6577987bf 100644
--- a/arch/x86/include/asm/cpuid/types.h
+++ b/arch/x86/include/asm/cpuid/types.h
@@ -55,4 +55,33 @@ enum _cache_table_type {
 } __packed;
 static_assert(sizeof(enum _cache_table_type) == 1);
 
+/*
+ * Leaf 0x2 1-byte descriptors' TLB types
+ * To be used for their mappings at intel_tlb_table[]
+ *
+ * Start at 1 since type 0 is reserved for HW byte descriptors which are
+ * not recognized by the kernel; i.e., those without an explicit mapping.
+ */
+enum _tlb_table_type {
+	TLB_INST_4K		= 1,
+	TLB_INST_4M,
+	TLB_INST_2M_4M,
+	TLB_INST_ALL,
+
+	TLB_DATA_4K,
+	TLB_DATA_4M,
+	TLB_DATA_2M_4M,
+	TLB_DATA_4K_4M,
+	TLB_DATA_1G,
+	TLB_DATA_1G_2M_4M,
+
+	TLB_DATA0_4K,
+	TLB_DATA0_4M,
+	TLB_DATA0_2M_4M,
+
+	STLB_4K,
+	STLB_4K_2M,
+} __packed;
+static_assert(sizeof(enum _tlb_table_type) == 1);
+
 #endif /* _ASM_X86_CPUID_TYPES_H */
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index bf735cee9e76..fbdc91bd1da6 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -627,28 +627,6 @@ static unsigned int intel_size_cache(struct cpuinfo_x86 *c, unsigned int size)
 }
 #endif
 
-#define TLB_INST_4K		0x01
-#define TLB_INST_4M		0x02
-#define TLB_INST_2M_4M		0x03
-
-#define TLB_INST_ALL		0x05
-#define TLB_INST_1G		0x06
-
-#define TLB_DATA_4K		0x11
-#define TLB_DATA_4M		0x12
-#define TLB_DATA_2M_4M		0x13
-#define TLB_DATA_4K_4M		0x14
-
-#define TLB_DATA_1G		0x16
-#define TLB_DATA_1G_2M_4M	0x17
-
-#define TLB_DATA0_4K		0x21
-#define TLB_DATA0_4M		0x22
-#define TLB_DATA0_2M_4M		0x23
-
-#define STLB_4K			0x41
-#define STLB_4K_2M		0x42
-
 /*
  * All of leaf 0x2's one-byte TLB descriptors implies the same number of
  * entries for their respective TLB types.  The 0x63 descriptor is an
@@ -661,7 +639,7 @@ static unsigned int intel_size_cache(struct cpuinfo_x86 *c, unsigned int size)
 
 struct _tlb_table {
 	unsigned char descriptor;
-	char tlb_type;
+	enum _tlb_table_type type;
 	unsigned int entries;
 };
 
@@ -719,11 +697,11 @@ static void intel_tlb_lookup(const unsigned char desc)
 	     intel_tlb_table[k].descriptor != 0; k++)
 		;
 
-	if (intel_tlb_table[k].tlb_type == 0)
+	if (intel_tlb_table[k].type == 0)
 		return;
 
 	entries = intel_tlb_table[k].entries;
-	switch (intel_tlb_table[k].tlb_type) {
+	switch (intel_tlb_table[k].type) {
 	case STLB_4K:
 		tlb_lli_4k = max(tlb_lli_4k, entries);
 		tlb_lld_4k = max(tlb_lld_4k, entries);
-- 
2.48.1
Re: [PATCH v2 19/29] x86/cpu: Use enums for TLB descriptor types
Posted by kernel test robot 9 months ago
Hi Ahmed,

kernel test robot noticed the following build warnings:

[auto build test WARNING on 6d536cad0d55e71442b6d65500f74eb85544269e]

url:    https://github.com/intel-lab-lkp/linux/commits/Ahmed-S-Darwish/x86-treewide-Introduce-x86_vendor_amd_or_hygon/20250318-011153
base:   6d536cad0d55e71442b6d65500f74eb85544269e
patch link:    https://lore.kernel.org/r/20250317164745.4754-20-darwi%40linutronix.de
patch subject: [PATCH v2 19/29] x86/cpu: Use enums for TLB descriptor types
config: i386-randconfig-061-20250319 (https://download.01.org/0day-ci/archive/20250319/202503192339.PuCOnZaa-lkp@intel.com/config)
compiler: gcc-12 (Debian 12.2.0-14) 12.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250319/202503192339.PuCOnZaa-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202503192339.PuCOnZaa-lkp@intel.com/

sparse warnings: (new ones prefixed by >>)
   drivers/cpuidle/poll_state.c: note: in included file (through arch/x86/include/asm/cpuid/api.h, arch/x86/include/asm/cpuid.h, arch/x86/include/asm/processor.h, ...):
   arch/x86/include/asm/cpuid/types.h:56:1: sparse: sparse: static assertion failed: "sizeof(enum _cache_table_type) == 1"
>> arch/x86/include/asm/cpuid/types.h:85:1: sparse: sparse: static assertion failed: "sizeof(enum _tlb_table_type) == 1"
--
   drivers/cpuidle/governor.c: note: in included file (through arch/x86/include/asm/cpuid/api.h, arch/x86/include/asm/cpuid.h, arch/x86/include/asm/processor.h, ...):
   arch/x86/include/asm/cpuid/types.h:56:1: sparse: sparse: static assertion failed: "sizeof(enum _cache_table_type) == 1"
>> arch/x86/include/asm/cpuid/types.h:85:1: sparse: sparse: static assertion failed: "sizeof(enum _tlb_table_type) == 1"
--
   drivers/cpuidle/cpuidle-haltpoll.c: note: in included file (through arch/x86/include/asm/cpuid/api.h, arch/x86/include/asm/cpuid.h, arch/x86/include/asm/processor.h, ...):
   arch/x86/include/asm/cpuid/types.h:56:1: sparse: sparse: static assertion failed: "sizeof(enum _cache_table_type) == 1"
>> arch/x86/include/asm/cpuid/types.h:85:1: sparse: sparse: static assertion failed: "sizeof(enum _tlb_table_type) == 1"
--
   drivers/cpuidle/driver.c: note: in included file (through arch/x86/include/asm/cpuid/api.h, arch/x86/include/asm/cpuid.h, arch/x86/include/asm/processor.h, ...):
   arch/x86/include/asm/cpuid/types.h:56:1: sparse: sparse: static assertion failed: "sizeof(enum _cache_table_type) == 1"
>> arch/x86/include/asm/cpuid/types.h:85:1: sparse: sparse: static assertion failed: "sizeof(enum _tlb_table_type) == 1"
--
   drivers/cpuidle/sysfs.c: note: in included file (through arch/x86/include/asm/cpuid/api.h, arch/x86/include/asm/cpuid.h, arch/x86/include/asm/processor.h, ...):
   arch/x86/include/asm/cpuid/types.h:56:1: sparse: sparse: static assertion failed: "sizeof(enum _cache_table_type) == 1"
>> arch/x86/include/asm/cpuid/types.h:85:1: sparse: sparse: static assertion failed: "sizeof(enum _tlb_table_type) == 1"
--
   drivers/cpuidle/cpuidle.c: note: in included file (through arch/x86/include/asm/cpuid/api.h, arch/x86/include/asm/cpuid.h, arch/x86/include/asm/processor.h, ...):
   arch/x86/include/asm/cpuid/types.h:56:1: sparse: sparse: static assertion failed: "sizeof(enum _cache_table_type) == 1"
>> arch/x86/include/asm/cpuid/types.h:85:1: sparse: sparse: static assertion failed: "sizeof(enum _tlb_table_type) == 1"
--
   drivers/cpuidle/governors/menu.c: note: in included file (through arch/x86/include/asm/cpuid/api.h, arch/x86/include/asm/cpuid.h, arch/x86/include/asm/processor.h, ...):
   arch/x86/include/asm/cpuid/types.h:56:1: sparse: sparse: static assertion failed: "sizeof(enum _cache_table_type) == 1"
>> arch/x86/include/asm/cpuid/types.h:85:1: sparse: sparse: static assertion failed: "sizeof(enum _tlb_table_type) == 1"
--
   drivers/cpuidle/governors/haltpoll.c: note: in included file (through arch/x86/include/asm/cpuid/api.h, arch/x86/include/asm/cpuid.h, arch/x86/include/asm/processor.h, ...):
   arch/x86/include/asm/cpuid/types.h:56:1: sparse: sparse: static assertion failed: "sizeof(enum _cache_table_type) == 1"
>> arch/x86/include/asm/cpuid/types.h:85:1: sparse: sparse: static assertion failed: "sizeof(enum _tlb_table_type) == 1"

vim +85 arch/x86/include/asm/cpuid/types.h

    45	
    46	/*
    47	 * Leaf 0x2 1-byte descriptors' cache types
    48	 * To be used for their mappings at cache_table[]
    49	 */
    50	enum _cache_table_type {
    51		CACHE_L1_INST,
    52		CACHE_L1_DATA,
    53		CACHE_L2,
    54		CACHE_L3
    55	} __packed;
  > 56	static_assert(sizeof(enum _cache_table_type) == 1);
    57	
    58	/*
    59	 * Leaf 0x2 1-byte descriptors' TLB types
    60	 * To be used for their mappings at intel_tlb_table[]
    61	 *
    62	 * Start at 1 since type 0 is reserved for HW byte descriptors which are
    63	 * not recognized by the kernel; i.e., those without an explicit mapping.
    64	 */
    65	enum _tlb_table_type {
    66		TLB_INST_4K		= 1,
    67		TLB_INST_4M,
    68		TLB_INST_2M_4M,
    69		TLB_INST_ALL,
    70	
    71		TLB_DATA_4K,
    72		TLB_DATA_4M,
    73		TLB_DATA_2M_4M,
    74		TLB_DATA_4K_4M,
    75		TLB_DATA_1G,
    76		TLB_DATA_1G_2M_4M,
    77	
    78		TLB_DATA0_4K,
    79		TLB_DATA0_4M,
    80		TLB_DATA0_2M_4M,
    81	
    82		STLB_4K,
    83		STLB_4K_2M,
    84	} __packed;
  > 85	static_assert(sizeof(enum _tlb_table_type) == 1);
    86	

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
Re: [PATCH v2 19/29] x86/cpu: Use enums for TLB descriptor types
Posted by Ahmed S. Darwish 9 months ago
On Thu, 20 Mar 2025, kernel test robot wrote:
>
> arch/x86/include/asm/cpuid/types.h:56:1:
> sparse: static assertion failed: "sizeof(enum _cache_table_type) == 1"
>

I'll fix it in v4, as detailed in the other email:

    https://lore.kernel.org/x86-cpuid/Z9rsTirs9lLfEPD9@lx-t490

Thanks,
Ahmed