The current EPP, ISP and MPE schemas are largely compatible with Tegra114
and Tegra124, requiring only minor adjustments. Additionally, the TSEC
schema for the Security engine, which is available from Tegra114 onwards,
is included.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
---
.../display/tegra/nvidia,tegra114-tsec.yaml | 66 +++++++++++++++++++
.../display/tegra/nvidia,tegra20-epp.yaml | 14 ++--
.../display/tegra/nvidia,tegra20-isp.yaml | 14 ++--
.../display/tegra/nvidia,tegra20-mpe.yaml | 18 +++--
4 files changed, 99 insertions(+), 13 deletions(-)
create mode 100644 Documentation/devicetree/bindings/display/tegra/nvidia,tegra114-tsec.yaml
diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra114-tsec.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra114-tsec.yaml
new file mode 100644
index 000000000000..c66ac6a6538e
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra114-tsec.yaml
@@ -0,0 +1,66 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra114-tsec.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NVIDIA Tegra Security co-processor
+
+maintainers:
+ - Svyatoslav Ryhel <clamor95@gmail.com>
+ - Thierry Reding <thierry.reding@gmail.com>
+
+description: Tegra Security co-processor, an embedded security processor used
+ mainly to manage the HDCP encryption and keys on the HDMI link.
+
+properties:
+ compatible:
+ oneOf:
+ - enum:
+ - nvidia,tegra114-tsec
+ - nvidia,tegra124-tsec
+
+ - items:
+ - const: nvidia,tegra132-tsec
+ - const: nvidia,tegra124-tsec
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ resets:
+ maxItems: 1
+
+ reset-names:
+ items:
+ - const: tsec
+
+ iommus:
+ maxItems: 1
+
+ operating-points-v2: true
+
+ power-domains:
+ items:
+ - description: phandle to the core power domain
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/tegra114-car.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ tsec@54500000 {
+ compatible = "nvidia,tegra114-tsec";
+ reg = <0x54500000 0x00040000>;
+ interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&tegra_car TEGRA114_CLK_TSEC>;
+ resets = <&tegra_car TEGRA114_CLK_TSEC>;
+ reset-names = "tsec";
+ };
diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-epp.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-epp.yaml
index 3c095a5491fe..334f5531b243 100644
--- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-epp.yaml
+++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-epp.yaml
@@ -15,10 +15,16 @@ properties:
pattern: "^epp@[0-9a-f]+$"
compatible:
- enum:
- - nvidia,tegra20-epp
- - nvidia,tegra30-epp
- - nvidia,tegra114-epp
+ oneOf:
+ - enum:
+ - nvidia,tegra20-epp
+ - nvidia,tegra30-epp
+ - nvidia,tegra114-epp
+ - nvidia,tegra124-epp
+
+ - items:
+ - const: nvidia,tegra132-epp
+ - const: nvidia,tegra124-epp
reg:
maxItems: 1
diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-isp.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-isp.yaml
index 3bc3b22e98e1..fbfcabb58fd5 100644
--- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-isp.yaml
+++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-isp.yaml
@@ -12,10 +12,16 @@ maintainers:
properties:
compatible:
- enum:
- - nvidia,tegra20-isp
- - nvidia,tegra30-isp
- - nvidia,tegra210-isp
+ oneOf:
+ - enum:
+ - nvidia,tegra20-isp
+ - nvidia,tegra30-isp
+ - nvidia,tegra114-isp
+ - nvidia,tegra124-isp
+
+ - items:
+ - const: nvidia,tegra132-isp
+ - const: nvidia,tegra124-isp
reg:
maxItems: 1
diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-mpe.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-mpe.yaml
index 2cd3e60cd0a8..36b76fa8f525 100644
--- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-mpe.yaml
+++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-mpe.yaml
@@ -12,13 +12,21 @@ maintainers:
properties:
$nodename:
- pattern: "^mpe@[0-9a-f]+$"
+ oneOf:
+ - pattern: "^mpe@[0-9a-f]+$"
+ - pattern: "^msenc@[0-9a-f]+$"
compatible:
- enum:
- - nvidia,tegra20-mpe
- - nvidia,tegra30-mpe
- - nvidia,tegra114-mpe
+ oneOf:
+ - enum:
+ - nvidia,tegra20-mpe
+ - nvidia,tegra30-mpe
+ - nvidia,tegra114-msenc
+ - nvidia,tegra124-msenc
+
+ - items:
+ - const: nvidia,tegra132-msenc
+ - const: nvidia,tegra124-msenc
reg:
maxItems: 1
--
2.43.0On Fri, Mar 14, 2025 at 09:45:55AM +0200, Svyatoslav Ryhel wrote:
> The current EPP, ISP and MPE schemas are largely compatible with Tegra114
> and Tegra124, requiring only minor adjustments. Additionally, the TSEC
> schema for the Security engine, which is available from Tegra114 onwards,
> is included.
>
> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
> ---
> .../display/tegra/nvidia,tegra114-tsec.yaml | 66 +++++++++++++++++++
> .../display/tegra/nvidia,tegra20-epp.yaml | 14 ++--
> .../display/tegra/nvidia,tegra20-isp.yaml | 14 ++--
> .../display/tegra/nvidia,tegra20-mpe.yaml | 18 +++--
> 4 files changed, 99 insertions(+), 13 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/display/tegra/nvidia,tegra114-tsec.yaml
>
> diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra114-tsec.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra114-tsec.yaml
> new file mode 100644
> index 000000000000..c66ac6a6538e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra114-tsec.yaml
> @@ -0,0 +1,66 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra114-tsec.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: NVIDIA Tegra Security co-processor
> +
> +maintainers:
> + - Svyatoslav Ryhel <clamor95@gmail.com>
> + - Thierry Reding <thierry.reding@gmail.com>
> +
> +description: Tegra Security co-processor, an embedded security processor used
> + mainly to manage the HDCP encryption and keys on the HDMI link.
> +
> +properties:
> + compatible:
> + oneOf:
> + - enum:
> + - nvidia,tegra114-tsec
> + - nvidia,tegra124-tsec
> +
> + - items:
> + - const: nvidia,tegra132-tsec
> + - const: nvidia,tegra124-tsec
nvidia,tegra210-tsec appears to be about the same, already in use, and
undocumented, so please add it to this binding.
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + clocks:
> + maxItems: 1
> +
> + resets:
> + maxItems: 1
> +
> + reset-names:
> + items:
> + - const: tsec
> +
> + iommus:
> + maxItems: 1
> +
> + operating-points-v2: true
> +
> + power-domains:
> + items:
> + - description: phandle to the core power domain
> +
> +additionalProperties: false
required properties?
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/tegra114-car.h>
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> + tsec@54500000 {
> + compatible = "nvidia,tegra114-tsec";
> + reg = <0x54500000 0x00040000>;
> + interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&tegra_car TEGRA114_CLK_TSEC>;
> + resets = <&tegra_car TEGRA114_CLK_TSEC>;
> + reset-names = "tsec";
> + };
пт, 21 бер. 2025 р. о 18:02 Rob Herring <robh@kernel.org> пише:
>
> On Fri, Mar 14, 2025 at 09:45:55AM +0200, Svyatoslav Ryhel wrote:
> > The current EPP, ISP and MPE schemas are largely compatible with Tegra114
> > and Tegra124, requiring only minor adjustments. Additionally, the TSEC
> > schema for the Security engine, which is available from Tegra114 onwards,
> > is included.
> >
> > Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
> > ---
> > .../display/tegra/nvidia,tegra114-tsec.yaml | 66 +++++++++++++++++++
> > .../display/tegra/nvidia,tegra20-epp.yaml | 14 ++--
> > .../display/tegra/nvidia,tegra20-isp.yaml | 14 ++--
> > .../display/tegra/nvidia,tegra20-mpe.yaml | 18 +++--
> > 4 files changed, 99 insertions(+), 13 deletions(-)
> > create mode 100644 Documentation/devicetree/bindings/display/tegra/nvidia,tegra114-tsec.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra114-tsec.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra114-tsec.yaml
> > new file mode 100644
> > index 000000000000..c66ac6a6538e
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra114-tsec.yaml
> > @@ -0,0 +1,66 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra114-tsec.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: NVIDIA Tegra Security co-processor
> > +
> > +maintainers:
> > + - Svyatoslav Ryhel <clamor95@gmail.com>
> > + - Thierry Reding <thierry.reding@gmail.com>
> > +
> > +description: Tegra Security co-processor, an embedded security processor used
> > + mainly to manage the HDCP encryption and keys on the HDMI link.
> > +
> > +properties:
> > + compatible:
> > + oneOf:
> > + - enum:
> > + - nvidia,tegra114-tsec
> > + - nvidia,tegra124-tsec
> > +
> > + - items:
> > + - const: nvidia,tegra132-tsec
> > + - const: nvidia,tegra124-tsec
>
> nvidia,tegra210-tsec appears to be about the same, already in use, and
> undocumented, so please add it to this binding.
>
Sure
> > +
> > + reg:
> > + maxItems: 1
> > +
> > + interrupts:
> > + maxItems: 1
> > +
> > + clocks:
> > + maxItems: 1
> > +
> > + resets:
> > + maxItems: 1
> > +
> > + reset-names:
> > + items:
> > + - const: tsec
> > +
> > + iommus:
> > + maxItems: 1
> > +
> > + operating-points-v2: true
> > +
> > + power-domains:
> > + items:
> > + - description: phandle to the core power domain
> > +
> > +additionalProperties: false
>
> required properties?
>
I will see what I can do about this.
> > +
> > +examples:
> > + - |
> > + #include <dt-bindings/clock/tegra114-car.h>
> > + #include <dt-bindings/interrupt-controller/arm-gic.h>
> > +
> > + tsec@54500000 {
> > + compatible = "nvidia,tegra114-tsec";
> > + reg = <0x54500000 0x00040000>;
> > + interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&tegra_car TEGRA114_CLK_TSEC>;
> > + resets = <&tegra_car TEGRA114_CLK_TSEC>;
> > + reset-names = "tsec";
> > + };
On 14/03/2025 08:45, Svyatoslav Ryhel wrote: > The current EPP, ISP and MPE schemas are largely compatible with Tegra114 > and Tegra124, requiring only minor adjustments. Additionally, the TSEC > schema for the Security engine, which is available from Tegra114 onwards, > is included. > > Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> <form letter> This is a friendly reminder during the review process. It seems my or other reviewer's previous comments were not fully addressed. Maybe the feedback got lost between the quotes, maybe you just forgot to apply it. Please go back to the previous discussion and either implement all requested changes or keep discussing them. Thank you. </form letter> Best regards, Krzysztof
пт, 14 бер. 2025 р. о 09:56 Krzysztof Kozlowski <krzk@kernel.org> пише: > > On 14/03/2025 08:45, Svyatoslav Ryhel wrote: > > The current EPP, ISP and MPE schemas are largely compatible with Tegra114 > > and Tegra124, requiring only minor adjustments. Additionally, the TSEC > > schema for the Security engine, which is available from Tegra114 onwards, > > is included. > > > > Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> > > <form letter> > This is a friendly reminder during the review process. > > It seems my or other reviewer's previous comments were not fully > addressed. Maybe the feedback got lost between the quotes, maybe you > just forgot to apply it. Please go back to the previous discussion and > either implement all requested changes or keep discussing them. > > Thank you. > </form letter> > I kept reset-names for TSEC since it seems that it is needed, ask Thierry Reding for more details. Else is applied. > Best regards, > Krzysztof
On 14/03/2025 08:59, Svyatoslav Ryhel wrote: > пт, 14 бер. 2025 р. о 09:56 Krzysztof Kozlowski <krzk@kernel.org> пише: >> >> On 14/03/2025 08:45, Svyatoslav Ryhel wrote: >>> The current EPP, ISP and MPE schemas are largely compatible with Tegra114 >>> and Tegra124, requiring only minor adjustments. Additionally, the TSEC >>> schema for the Security engine, which is available from Tegra114 onwards, >>> is included. >>> >>> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> >> >> <form letter> >> This is a friendly reminder during the review process. >> >> It seems my or other reviewer's previous comments were not fully >> addressed. Maybe the feedback got lost between the quotes, maybe you >> just forgot to apply it. Please go back to the previous discussion and >> either implement all requested changes or keep discussing them. >> >> Thank you. >> </form letter> >> > > I kept reset-names for TSEC since it seems that it is needed, ask reset-names are not needed and the rest is not applied. I don't see opp-table either. You didn't bother to acknowledge nor respond to comments, so it is expected you will implement it fully. Not me to keep checking if you read each comment and decided to silently ignore it. Best regards, Krzysztof
пт, 14 бер. 2025 р. о 10:11 Krzysztof Kozlowski <krzk@kernel.org> пише: > > On 14/03/2025 08:59, Svyatoslav Ryhel wrote: > > пт, 14 бер. 2025 р. о 09:56 Krzysztof Kozlowski <krzk@kernel.org> пише: > >> > >> On 14/03/2025 08:45, Svyatoslav Ryhel wrote: > >>> The current EPP, ISP and MPE schemas are largely compatible with Tegra114 > >>> and Tegra124, requiring only minor adjustments. Additionally, the TSEC > >>> schema for the Security engine, which is available from Tegra114 onwards, > >>> is included. > >>> > >>> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> > >> > >> <form letter> > >> This is a friendly reminder during the review process. > >> > >> It seems my or other reviewer's previous comments were not fully > >> addressed. Maybe the feedback got lost between the quotes, maybe you > >> just forgot to apply it. Please go back to the previous discussion and > >> either implement all requested changes or keep discussing them. > >> > >> Thank you. > >> </form letter> > >> > > > > I kept reset-names for TSEC since it seems that it is needed, ask > > > reset-names are not needed and the rest is not applied. I don't see > opp-table either. You are exaggerating, I have either changed as you asked or removed property if I cannot provide needed change. About reset-name I mentioned in the changelog and I would like to hear what Thierry thinks about this. About opp-table be more specific please, do I need to provide an opp table in the example, or include some yaml reference, or what? That would be really helpful. > > You didn't bother to acknowledge nor respond to comments, so it is > expected you will implement it fully. Not me to keep checking if you > read each comment and decided to silently ignore it. > > > Best regards, > Krzysztof
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