[PATCH v1 0/4] riscv: iommu: Support Svnapot

Xu Lu posted 4 patches 11 months ago
There is a newer version of this series
arch/riscv/include/asm/pgtable.h |   6 +
drivers/iommu/riscv/iommu.c      | 253 +++++++++++++++++++++++++------
include/linux/pgtable.h          |   8 +
mm/gup.c                         |  22 ++-
4 files changed, 235 insertions(+), 54 deletions(-)
[PATCH v1 0/4] riscv: iommu: Support Svnapot
Posted by Xu Lu 11 months ago
According to the RISC-V IOMMU hardware spec, the IOMMU implementation
has the same translation process as MMU and supports Svnapot standard
extension as well. These patches add support for Svnapot in the IOMMU
driver to make 64K also an available page size during DMA mapping.

Xu Lu (4):
  mm/gup: Handle huge pte for follow_page_pte()
  iommu/riscv: Use pte_t to represent page table entry
  iommu/riscv: Introduce IOMMU page table lock
  iommu/riscv: Add support for Svnapot

 arch/riscv/include/asm/pgtable.h |   6 +
 drivers/iommu/riscv/iommu.c      | 253 +++++++++++++++++++++++++------
 include/linux/pgtable.h          |   8 +
 mm/gup.c                         |  22 ++-
 4 files changed, 235 insertions(+), 54 deletions(-)

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2.20.1