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[PATCH RFC] riscv: introduce asm/swab.h

Ignacio Encinas posted 1 patch 11 months ago
There is a newer version of this series
arch/riscv/include/asm/swab.h | 81 +++++++++++++++++++++++++++++++++++++++++++
1 file changed, 81 insertions(+)
[PATCH RFC] riscv: introduce asm/swab.h
Posted by Ignacio Encinas 11 months ago 
Implement endianness swap macros for RISC-V.

Use the rev8 instruction when Zbb is available. Otherwise, rely on the
default mask-and-shift implementation.

Signed-off-by: Ignacio Encinas <ignacio@iencinas.com>
---
Motivated by [1]. A couple of things to note:

We need a default implementation to fall back on, but there isn't any in
`asm-generic/swab.h`. Should I introduce a first patch moving 
___constant_swab<XX> into include/uapi/asm-generic/swab.h?

I don't particularly like the ARCH_SWAB macro but I can't think of
anything better that doesn't result in code duplication.

Tested with crc_kunit as pointed out here [2]. I can't provide
performance numbers as I don't have RISC-V hardware yet.

Ccing everyone involved with [1].

[1] https://lore.kernel.org/all/20250302220426.GC2079@quark.localdomain/
[2] https://lore.kernel.org/all/20250216225530.306980-1-ebiggers@kernel.org/
---
 arch/riscv/include/asm/swab.h | 81 +++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 81 insertions(+)

diff --git a/arch/riscv/include/asm/swab.h b/arch/riscv/include/asm/swab.h
new file mode 100644
index 0000000000000000000000000000000000000000..8f8a13b343f6ffbefbb3c7747ab4e14243852014
--- /dev/null
+++ b/arch/riscv/include/asm/swab.h
@@ -0,0 +1,81 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+#ifndef _ASM_RISCV_SWAB_H
+#define _ASM_RISCV_SWAB_H
+
+#include <linux/types.h>
+#include <linux/compiler.h>
+#include <asm/alternative-macros.h>
+#include <asm/hwcap.h>
+
+#if defined(CONFIG_RISCV_ISA_ZBB) && !defined(NO_ALTERNATIVE)
+
+/*
+ * FIXME, RFC PATCH: This is copypasted from include/uapi/linux/swab.h
+ * should I move these `#defines` to include/uapi/asm-generic/swab.h
+ * and include that file here and in include/uapi/linux/swab.h ?
+ */
+#define ___constant_swab16(x) ((__u16)(				\
+	(((__u16)(x) & (__u16)0x00ffU) << 8) |			\
+	(((__u16)(x) & (__u16)0xff00U) >> 8)))
+
+#define ___constant_swab32(x) ((__u32)(				\
+	(((__u32)(x) & (__u32)0x000000ffUL) << 24) |		\
+	(((__u32)(x) & (__u32)0x0000ff00UL) <<  8) |		\
+	(((__u32)(x) & (__u32)0x00ff0000UL) >>  8) |		\
+	(((__u32)(x) & (__u32)0xff000000UL) >> 24)))
+
+#define ___constant_swab64(x) ((__u64)(				\
+	(((__u64)(x) & (__u64)0x00000000000000ffULL) << 56) |	\
+	(((__u64)(x) & (__u64)0x000000000000ff00ULL) << 40) |	\
+	(((__u64)(x) & (__u64)0x0000000000ff0000ULL) << 24) |	\
+	(((__u64)(x) & (__u64)0x00000000ff000000ULL) <<  8) |	\
+	(((__u64)(x) & (__u64)0x000000ff00000000ULL) >>  8) |	\
+	(((__u64)(x) & (__u64)0x0000ff0000000000ULL) >> 24) |	\
+	(((__u64)(x) & (__u64)0x00ff000000000000ULL) >> 40) |	\
+	(((__u64)(x) & (__u64)0xff00000000000000ULL) >> 56)))
+
+#define ___constant_swahw32(x) ((__u32)(			\
+	(((__u32)(x) & (__u32)0x0000ffffUL) << 16) |		\
+	(((__u32)(x) & (__u32)0xffff0000UL) >> 16)))
+
+#define ___constant_swahb32(x) ((__u32)(			\
+	(((__u32)(x) & (__u32)0x00ff00ffUL) << 8) |		\
+	(((__u32)(x) & (__u32)0xff00ff00UL) >> 8)))
+
+
+#define ARCH_SWAB(size) \
+static __always_inline unsigned long __arch_swab##size(__u##size value) \
+{									\
+	unsigned long x = value;					\
+									\
+	asm goto(ALTERNATIVE("j %l[legacy]", "nop", 0,			\
+			     RISCV_ISA_EXT_ZBB, 1)			\
+			     :::: legacy);				\
+									\
+	asm volatile (".option push\n"					\
+		      ".option arch,+zbb\n"				\
+		      "rev8 %0, %1\n"					\
+		      ".option pop\n"					\
+		      : "=r" (x) : "r" (x));				\
+									\
+	return x >> (BITS_PER_LONG - size);				\
+									\
+legacy:									\
+	return  ___constant_swab##size(value);				\
+}
+
+#ifdef CONFIG_64BIT
+ARCH_SWAB(64)
+#define __arch_swab64 __arch_swab64
+#endif
+
+ARCH_SWAB(32)
+#define __arch_swab32 __arch_swab32
+
+ARCH_SWAB(16)
+#define __arch_swab16 __arch_swab16
+
+#undef ARCH_SWAB
+
+#endif /* defined(CONFIG_RISCV_ISA_ZBB) && !defined(NO_ALTERNATIVE) */
+#endif /* _ASM_RISCV_SWAB_H */

---
base-commit: 2014c95afecee3e76ca4a56956a936e23283f05b
change-id: 20250307-riscv-swab-b81b94a9ac1b

Best regards,
-- 
Ignacio Encinas <ignacio@iencinas.com>
Re: [PATCH RFC] riscv: introduce asm/swab.h
Posted by Alexandre Ghiti 10 months, 3 weeks ago 
Hi Ignacio,

On 10/03/2025 23:03, Ignacio Encinas wrote:
> Implement endianness swap macros for RISC-V.
>
> Use the rev8 instruction when Zbb is available. Otherwise, rely on the
> default mask-and-shift implementation.
>
> Signed-off-by: Ignacio Encinas <ignacio@iencinas.com>
> ---
> Motivated by [1]. A couple of things to note:
>
> We need a default implementation to fall back on, but there isn't any in
> `asm-generic/swab.h`. Should I introduce a first patch moving
> ___constant_swab<XX> into include/uapi/asm-generic/swab.h?


Yes, that or something else to avoid the code duplication.


>
> I don't particularly like the ARCH_SWAB macro but I can't think of
> anything better that doesn't result in code duplication.
>
> Tested with crc_kunit as pointed out here [2]. I can't provide
> performance numbers as I don't have RISC-V hardware yet.
>
> Ccing everyone involved with [1].
>
> [1] https://lore.kernel.org/all/20250302220426.GC2079@quark.localdomain/
> [2] https://lore.kernel.org/all/20250216225530.306980-1-ebiggers@kernel.org/
> ---
>   arch/riscv/include/asm/swab.h | 81 +++++++++++++++++++++++++++++++++++++++++++
>   1 file changed, 81 insertions(+)
>
> diff --git a/arch/riscv/include/asm/swab.h b/arch/riscv/include/asm/swab.h
> new file mode 100644
> index 0000000000000000000000000000000000000000..8f8a13b343f6ffbefbb3c7747ab4e14243852014
> --- /dev/null
> +++ b/arch/riscv/include/asm/swab.h
> @@ -0,0 +1,81 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +#ifndef _ASM_RISCV_SWAB_H
> +#define _ASM_RISCV_SWAB_H
> +
> +#include <linux/types.h>
> +#include <linux/compiler.h>
> +#include <asm/alternative-macros.h>
> +#include <asm/hwcap.h>
> +
> +#if defined(CONFIG_RISCV_ISA_ZBB) && !defined(NO_ALTERNATIVE)


NO_ALTERNATIVE does not exist to my knowledge, and you don't need to 
check for ALTERNATIVE as alternative-macros.h will do the right thing in 
that case.


> +
> +/*
> + * FIXME, RFC PATCH: This is copypasted from include/uapi/linux/swab.h
> + * should I move these `#defines` to include/uapi/asm-generic/swab.h
> + * and include that file here and in include/uapi/linux/swab.h ?
> + */
> +#define ___constant_swab16(x) ((__u16)(				\
> +	(((__u16)(x) & (__u16)0x00ffU) << 8) |			\
> +	(((__u16)(x) & (__u16)0xff00U) >> 8)))
> +
> +#define ___constant_swab32(x) ((__u32)(				\
> +	(((__u32)(x) & (__u32)0x000000ffUL) << 24) |		\
> +	(((__u32)(x) & (__u32)0x0000ff00UL) <<  8) |		\
> +	(((__u32)(x) & (__u32)0x00ff0000UL) >>  8) |		\
> +	(((__u32)(x) & (__u32)0xff000000UL) >> 24)))
> +
> +#define ___constant_swab64(x) ((__u64)(				\
> +	(((__u64)(x) & (__u64)0x00000000000000ffULL) << 56) |	\
> +	(((__u64)(x) & (__u64)0x000000000000ff00ULL) << 40) |	\
> +	(((__u64)(x) & (__u64)0x0000000000ff0000ULL) << 24) |	\
> +	(((__u64)(x) & (__u64)0x00000000ff000000ULL) <<  8) |	\
> +	(((__u64)(x) & (__u64)0x000000ff00000000ULL) >>  8) |	\
> +	(((__u64)(x) & (__u64)0x0000ff0000000000ULL) >> 24) |	\
> +	(((__u64)(x) & (__u64)0x00ff000000000000ULL) >> 40) |	\
> +	(((__u64)(x) & (__u64)0xff00000000000000ULL) >> 56)))
> +
> +#define ___constant_swahw32(x) ((__u32)(			\
> +	(((__u32)(x) & (__u32)0x0000ffffUL) << 16) |		\
> +	(((__u32)(x) & (__u32)0xffff0000UL) >> 16)))
> +
> +#define ___constant_swahb32(x) ((__u32)(			\
> +	(((__u32)(x) & (__u32)0x00ff00ffUL) << 8) |		\
> +	(((__u32)(x) & (__u32)0xff00ff00UL) >> 8)))
> +
> +
> +#define ARCH_SWAB(size) \
> +static __always_inline unsigned long __arch_swab##size(__u##size value) \


I don't like the ARCH_SWAB macro neither but I don't have another 
solution too, maybe someone will come up with some macro magic.


> +{									\
> +	unsigned long x = value;					\
> +									\
> +	asm goto(ALTERNATIVE("j %l[legacy]", "nop", 0,			\
> +			     RISCV_ISA_EXT_ZBB, 1)			\
> +			     :::: legacy);				\
> +									\
> +	asm volatile (".option push\n"					\
> +		      ".option arch,+zbb\n"				\
> +		      "rev8 %0, %1\n"					\
> +		      ".option pop\n"					\
> +		      : "=r" (x) : "r" (x));				\
> +									\
> +	return x >> (BITS_PER_LONG - size);				\
> +									\
> +legacy:									\
> +	return  ___constant_swab##size(value);				\
> +}
> +
> +#ifdef CONFIG_64BIT
> +ARCH_SWAB(64)
> +#define __arch_swab64 __arch_swab64
> +#endif
> +
> +ARCH_SWAB(32)
> +#define __arch_swab32 __arch_swab32
> +
> +ARCH_SWAB(16)
> +#define __arch_swab16 __arch_swab16
> +
> +#undef ARCH_SWAB
> +
> +#endif /* defined(CONFIG_RISCV_ISA_ZBB) && !defined(NO_ALTERNATIVE) */
> +#endif /* _ASM_RISCV_SWAB_H */
>
> ---
> base-commit: 2014c95afecee3e76ca4a56956a936e23283f05b
> change-id: 20250307-riscv-swab-b81b94a9ac1b
>
> Best regards,


It would be nice to have some perf numbers too, maybe Bjorn will chime in :)

Thanks for your patch, looking forward the v2,

Alex
Re: [PATCH RFC] riscv: introduce asm/swab.h
Posted by Ignacio Encinas Rubio 10 months, 3 weeks ago 
On 17/3/25 17:36, Alexandre Ghiti wrote:
>> We need a default implementation to fall back on, but there isn't any in
>> `asm-generic/swab.h`. Should I introduce a first patch moving
>> ___constant_swab<XX> into include/uapi/asm-generic/swab.h?
> 
> Yes, that or something else to avoid the code duplication.

Thanks for double checking. I figured as much but I ended up getting a
bit confused with the include directories.

>> +#if defined(CONFIG_RISCV_ISA_ZBB) && !defined(NO_ALTERNATIVE)
> 
> NO_ALTERNATIVE does not exist to my knowledge, and you don't need to check for ALTERNATIVE as alternative-macros.h will do the right thing in that case.

It's a define hardcoded into drivers/firmware/efi/libstub/Makefile. It
was introduced in [1]. It helps avoid these types of warnings [2]:

  riscv64-unknown-linux-gnu-ld: warning: orphan section 
  `.init.alternative' from `./drivers/firmware/efi/libstub/riscv.stub.o' 
  being placed in section `.init.alternative'

Let me know if you think I should drop it.

[1] https://lore.kernel.org/all/20231031064553.2319688-3-xiao.w.wang@intel.com/
[2] https://lore.kernel.org/all/DM8PR11MB5751DA69DEEAAC9B06623E0BB80FA@DM8PR11MB5751.namprd11.prod.outlook.com/

> It would be nice to have some perf numbers too, maybe Bjorn will chime in :)
> 
> Thanks for your patch, looking forward the v2,

Thank you!

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