From: Lucas De Marchi <lucas.demarchi@intel.com>
Now that include/linux/bits.h implements fixed-width GENMASK_U*(), use
them to implement the i915/xe specific macros. Converting each driver
to use the generic macros are left for later, when/if other
driver-specific macros are also generalized.
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Acked-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Vincent Mailhol <mailhol.vincent@wanadoo.fr>
---
Changelog:
v5 -> v6:
- No changes.
v4 -> v5:
- Add braket to macro names in patch description,
e.g. 'REG_GENMASK*' -> 'REG_GENMASK*()'
v3 -> v4:
- Remove the prefixes in macro parameters,
e.g. 'REG_GENMASK(__high, __low)' -> 'REG_GENMASK(high, low)'
---
drivers/gpu/drm/i915/i915_reg_defs.h | 108 ++++-------------------------------
1 file changed, 11 insertions(+), 97 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg_defs.h b/drivers/gpu/drm/i915/i915_reg_defs.h
index e251bcc0c89f5710125bc70f07851b2cb978c89c..39e5ed9511174b8757b9201bff735fa362651b34 100644
--- a/drivers/gpu/drm/i915/i915_reg_defs.h
+++ b/drivers/gpu/drm/i915/i915_reg_defs.h
@@ -9,76 +9,19 @@
#include <linux/bitfield.h>
#include <linux/bits.h>
-/**
- * REG_BIT() - Prepare a u32 bit value
- * @__n: 0-based bit number
- *
- * Local wrapper for BIT() to force u32, with compile time checks.
- *
- * @return: Value with bit @__n set.
+/*
+ * Wrappers over the generic BIT_* and GENMASK_* implementations,
+ * for compatibility reasons with previous implementation
*/
-#define REG_BIT(__n) \
- ((u32)(BIT(__n) + \
- BUILD_BUG_ON_ZERO(__is_constexpr(__n) && \
- ((__n) < 0 || (__n) > 31))))
+#define REG_GENMASK(high, low) GENMASK_U32(high, low)
+#define REG_GENMASK64(high, low) GENMASK_U64(high, low)
+#define REG_GENMASK16(high, low) GENMASK_U16(high, low)
+#define REG_GENMASK8(high, low) GENMASK_U8(high, low)
-/**
- * REG_BIT8() - Prepare a u8 bit value
- * @__n: 0-based bit number
- *
- * Local wrapper for BIT() to force u8, with compile time checks.
- *
- * @return: Value with bit @__n set.
- */
-#define REG_BIT8(__n) \
- ((u8)(BIT(__n) + \
- BUILD_BUG_ON_ZERO(__is_constexpr(__n) && \
- ((__n) < 0 || (__n) > 7))))
-
-/**
- * REG_GENMASK() - Prepare a continuous u32 bitmask
- * @__high: 0-based high bit
- * @__low: 0-based low bit
- *
- * Local wrapper for GENMASK() to force u32, with compile time checks.
- *
- * @return: Continuous bitmask from @__high to @__low, inclusive.
- */
-#define REG_GENMASK(__high, __low) \
- ((u32)(GENMASK(__high, __low) + \
- BUILD_BUG_ON_ZERO(__is_constexpr(__high) && \
- __is_constexpr(__low) && \
- ((__low) < 0 || (__high) > 31 || (__low) > (__high)))))
-
-/**
- * REG_GENMASK64() - Prepare a continuous u64 bitmask
- * @__high: 0-based high bit
- * @__low: 0-based low bit
- *
- * Local wrapper for GENMASK_ULL() to force u64, with compile time checks.
- *
- * @return: Continuous bitmask from @__high to @__low, inclusive.
- */
-#define REG_GENMASK64(__high, __low) \
- ((u64)(GENMASK_ULL(__high, __low) + \
- BUILD_BUG_ON_ZERO(__is_constexpr(__high) && \
- __is_constexpr(__low) && \
- ((__low) < 0 || (__high) > 63 || (__low) > (__high)))))
-
-/**
- * REG_GENMASK8() - Prepare a continuous u8 bitmask
- * @__high: 0-based high bit
- * @__low: 0-based low bit
- *
- * Local wrapper for GENMASK() to force u8, with compile time checks.
- *
- * @return: Continuous bitmask from @__high to @__low, inclusive.
- */
-#define REG_GENMASK8(__high, __low) \
- ((u8)(GENMASK(__high, __low) + \
- BUILD_BUG_ON_ZERO(__is_constexpr(__high) && \
- __is_constexpr(__low) && \
- ((__low) < 0 || (__high) > 7 || (__low) > (__high)))))
+#define REG_BIT(n) BIT_U32(n)
+#define REG_BIT64(n) BIT_U64(n)
+#define REG_BIT16(n) BIT_U16(n)
+#define REG_BIT8(n) BIT_U8(n)
/*
* Local integer constant expression version of is_power_of_2().
@@ -143,35 +86,6 @@
*/
#define REG_FIELD_GET64(__mask, __val) ((u64)FIELD_GET(__mask, __val))
-/**
- * REG_BIT16() - Prepare a u16 bit value
- * @__n: 0-based bit number
- *
- * Local wrapper for BIT() to force u16, with compile time
- * checks.
- *
- * @return: Value with bit @__n set.
- */
-#define REG_BIT16(__n) \
- ((u16)(BIT(__n) + \
- BUILD_BUG_ON_ZERO(__is_constexpr(__n) && \
- ((__n) < 0 || (__n) > 15))))
-
-/**
- * REG_GENMASK16() - Prepare a continuous u8 bitmask
- * @__high: 0-based high bit
- * @__low: 0-based low bit
- *
- * Local wrapper for GENMASK() to force u16, with compile time
- * checks.
- *
- * @return: Continuous bitmask from @__high to @__low, inclusive.
- */
-#define REG_GENMASK16(__high, __low) \
- ((u16)(GENMASK(__high, __low) + \
- BUILD_BUG_ON_ZERO(__is_constexpr(__high) && \
- __is_constexpr(__low) && \
- ((__low) < 0 || (__high) > 15 || (__low) > (__high)))))
/**
* REG_FIELD_PREP16() - Prepare a u16 bitfield value
--
2.45.3On Sat, Mar 08, 2025 at 01:48:51AM +0900, Vincent Mailhol via B4 Relay wrote: > From: Lucas De Marchi <lucas.demarchi@intel.com> > > Now that include/linux/bits.h implements fixed-width GENMASK_U*(), use > them to implement the i915/xe specific macros. Converting each driver > to use the generic macros are left for later, when/if other > driver-specific macros are also generalized. > > Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> > Acked-by: Jani Nikula <jani.nikula@intel.com> > Signed-off-by: Vincent Mailhol <mailhol.vincent@wanadoo.fr> > --- > Changelog: > > v5 -> v6: > > - No changes. > > v4 -> v5: > > - Add braket to macro names in patch description, > e.g. 'REG_GENMASK*' -> 'REG_GENMASK*()' > > v3 -> v4: > > - Remove the prefixes in macro parameters, > e.g. 'REG_GENMASK(__high, __low)' -> 'REG_GENMASK(high, low)' > --- > drivers/gpu/drm/i915/i915_reg_defs.h | 108 ++++------------------------------- > 1 file changed, 11 insertions(+), 97 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_reg_defs.h b/drivers/gpu/drm/i915/i915_reg_defs.h > index e251bcc0c89f5710125bc70f07851b2cb978c89c..39e5ed9511174b8757b9201bff735fa362651b34 100644 > --- a/drivers/gpu/drm/i915/i915_reg_defs.h > +++ b/drivers/gpu/drm/i915/i915_reg_defs.h > @@ -9,76 +9,19 @@ > #include <linux/bitfield.h> > #include <linux/bits.h> > > -/** > - * REG_BIT() - Prepare a u32 bit value > - * @__n: 0-based bit number > - * > - * Local wrapper for BIT() to force u32, with compile time checks. > - * > - * @return: Value with bit @__n set. > +/* > + * Wrappers over the generic BIT_* and GENMASK_* implementations, > + * for compatibility reasons with previous implementation > */ > -#define REG_BIT(__n) \ > - ((u32)(BIT(__n) + \ > - BUILD_BUG_ON_ZERO(__is_constexpr(__n) && \ > - ((__n) < 0 || (__n) > 31)))) > +#define REG_GENMASK(high, low) GENMASK_U32(high, low) > +#define REG_GENMASK64(high, low) GENMASK_U64(high, low) > +#define REG_GENMASK16(high, low) GENMASK_U16(high, low) > +#define REG_GENMASK8(high, low) GENMASK_U8(high, low) Nit. Maybe just #define REG_GENMASK GENMASK_U32
On Tue, 18 Mar 2025, Yury Norov <yury.norov@gmail.com> wrote: > On Sat, Mar 08, 2025 at 01:48:51AM +0900, Vincent Mailhol via B4 Relay wrote: >> From: Lucas De Marchi <lucas.demarchi@intel.com> >> >> Now that include/linux/bits.h implements fixed-width GENMASK_U*(), use >> them to implement the i915/xe specific macros. Converting each driver >> to use the generic macros are left for later, when/if other >> driver-specific macros are also generalized. >> >> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> >> Acked-by: Jani Nikula <jani.nikula@intel.com> >> Signed-off-by: Vincent Mailhol <mailhol.vincent@wanadoo.fr> >> --- >> Changelog: >> >> v5 -> v6: >> >> - No changes. >> >> v4 -> v5: >> >> - Add braket to macro names in patch description, >> e.g. 'REG_GENMASK*' -> 'REG_GENMASK*()' >> >> v3 -> v4: >> >> - Remove the prefixes in macro parameters, >> e.g. 'REG_GENMASK(__high, __low)' -> 'REG_GENMASK(high, low)' >> --- >> drivers/gpu/drm/i915/i915_reg_defs.h | 108 ++++------------------------------- >> 1 file changed, 11 insertions(+), 97 deletions(-) >> >> diff --git a/drivers/gpu/drm/i915/i915_reg_defs.h b/drivers/gpu/drm/i915/i915_reg_defs.h >> index e251bcc0c89f5710125bc70f07851b2cb978c89c..39e5ed9511174b8757b9201bff735fa362651b34 100644 >> --- a/drivers/gpu/drm/i915/i915_reg_defs.h >> +++ b/drivers/gpu/drm/i915/i915_reg_defs.h >> @@ -9,76 +9,19 @@ >> #include <linux/bitfield.h> >> #include <linux/bits.h> >> >> -/** >> - * REG_BIT() - Prepare a u32 bit value >> - * @__n: 0-based bit number >> - * >> - * Local wrapper for BIT() to force u32, with compile time checks. >> - * >> - * @return: Value with bit @__n set. >> +/* >> + * Wrappers over the generic BIT_* and GENMASK_* implementations, >> + * for compatibility reasons with previous implementation >> */ >> -#define REG_BIT(__n) \ >> - ((u32)(BIT(__n) + \ >> - BUILD_BUG_ON_ZERO(__is_constexpr(__n) && \ >> - ((__n) < 0 || (__n) > 31)))) >> +#define REG_GENMASK(high, low) GENMASK_U32(high, low) >> +#define REG_GENMASK64(high, low) GENMASK_U64(high, low) >> +#define REG_GENMASK16(high, low) GENMASK_U16(high, low) >> +#define REG_GENMASK8(high, low) GENMASK_U8(high, low) > > Nit. Maybe just > > #define REG_GENMASK GENMASK_U32 Please just keep it as it is for clarity. BR, Jani. -- Jani Nikula, Intel
On 19/03/2025 at 07:32, Jani Nikula wrote:
> On Tue, 18 Mar 2025, Yury Norov <yury.norov@gmail.com> wrote:
>> On Sat, Mar 08, 2025 at 01:48:51AM +0900, Vincent Mailhol via B4 Relay wrote:
>>> From: Lucas De Marchi <lucas.demarchi@intel.com>
>>>
>>> Now that include/linux/bits.h implements fixed-width GENMASK_U*(), use
>>> them to implement the i915/xe specific macros. Converting each driver
>>> to use the generic macros are left for later, when/if other
>>> driver-specific macros are also generalized.
>>>
>>> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
>>> Acked-by: Jani Nikula <jani.nikula@intel.com>
>>> Signed-off-by: Vincent Mailhol <mailhol.vincent@wanadoo.fr>
>>> ---
>>> Changelog:
>>>
>>> v5 -> v6:
>>>
>>> - No changes.
>>>
>>> v4 -> v5:
>>>
>>> - Add braket to macro names in patch description,
>>> e.g. 'REG_GENMASK*' -> 'REG_GENMASK*()'
>>>
>>> v3 -> v4:
>>>
>>> - Remove the prefixes in macro parameters,
>>> e.g. 'REG_GENMASK(__high, __low)' -> 'REG_GENMASK(high, low)'
>>> ---
>>> drivers/gpu/drm/i915/i915_reg_defs.h | 108 ++++-------------------------------
>>> 1 file changed, 11 insertions(+), 97 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/i915_reg_defs.h b/drivers/gpu/drm/i915/i915_reg_defs.h
>>> index e251bcc0c89f5710125bc70f07851b2cb978c89c..39e5ed9511174b8757b9201bff735fa362651b34 100644
>>> --- a/drivers/gpu/drm/i915/i915_reg_defs.h
>>> +++ b/drivers/gpu/drm/i915/i915_reg_defs.h
>>> @@ -9,76 +9,19 @@
>>> #include <linux/bitfield.h>
>>> #include <linux/bits.h>
>>>
>>> -/**
>>> - * REG_BIT() - Prepare a u32 bit value
>>> - * @__n: 0-based bit number
>>> - *
>>> - * Local wrapper for BIT() to force u32, with compile time checks.
>>> - *
>>> - * @return: Value with bit @__n set.
>>> +/*
>>> + * Wrappers over the generic BIT_* and GENMASK_* implementations,
>>> + * for compatibility reasons with previous implementation
>>> */
>>> -#define REG_BIT(__n) \
>>> - ((u32)(BIT(__n) + \
>>> - BUILD_BUG_ON_ZERO(__is_constexpr(__n) && \
>>> - ((__n) < 0 || (__n) > 31))))
>>> +#define REG_GENMASK(high, low) GENMASK_U32(high, low)
>>> +#define REG_GENMASK64(high, low) GENMASK_U64(high, low)
>>> +#define REG_GENMASK16(high, low) GENMASK_U16(high, low)
>>> +#define REG_GENMASK8(high, low) GENMASK_U8(high, low)
>>
>> Nit. Maybe just
>>
>> #define REG_GENMASK GENMASK_U32
>
> Please just keep it as it is for clarity.
I also prefer when the argument is clearly displayed. It shows at first
glance that this is a function-like macro and reminds of the correct
order of the argument without having to look at the definitions in
bits.h. It also allows for people to grep "#define REG_GENMASK(" in
order to find the macro definition.
To be honest, I don't have a strong opinion either, but because Jani
also prefers it this way, I will keep as-is.
Yours sincerely,
Vincent Mailhol
On Wed, Mar 19, 2025 at 01:37:32PM +0900, Vincent Mailhol wrote:
> On 19/03/2025 at 07:32, Jani Nikula wrote:
> > On Tue, 18 Mar 2025, Yury Norov <yury.norov@gmail.com> wrote:
> >> On Sat, Mar 08, 2025 at 01:48:51AM +0900, Vincent Mailhol via B4 Relay wrote:
> >>> From: Lucas De Marchi <lucas.demarchi@intel.com>
> >>>
> >>> Now that include/linux/bits.h implements fixed-width GENMASK_U*(), use
> >>> them to implement the i915/xe specific macros. Converting each driver
> >>> to use the generic macros are left for later, when/if other
> >>> driver-specific macros are also generalized.
> >>>
> >>> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> >>> Acked-by: Jani Nikula <jani.nikula@intel.com>
> >>> Signed-off-by: Vincent Mailhol <mailhol.vincent@wanadoo.fr>
> >>> ---
> >>> Changelog:
> >>>
> >>> v5 -> v6:
> >>>
> >>> - No changes.
> >>>
> >>> v4 -> v5:
> >>>
> >>> - Add braket to macro names in patch description,
> >>> e.g. 'REG_GENMASK*' -> 'REG_GENMASK*()'
> >>>
> >>> v3 -> v4:
> >>>
> >>> - Remove the prefixes in macro parameters,
> >>> e.g. 'REG_GENMASK(__high, __low)' -> 'REG_GENMASK(high, low)'
> >>> ---
> >>> drivers/gpu/drm/i915/i915_reg_defs.h | 108 ++++-------------------------------
> >>> 1 file changed, 11 insertions(+), 97 deletions(-)
> >>>
> >>> diff --git a/drivers/gpu/drm/i915/i915_reg_defs.h b/drivers/gpu/drm/i915/i915_reg_defs.h
> >>> index e251bcc0c89f5710125bc70f07851b2cb978c89c..39e5ed9511174b8757b9201bff735fa362651b34 100644
> >>> --- a/drivers/gpu/drm/i915/i915_reg_defs.h
> >>> +++ b/drivers/gpu/drm/i915/i915_reg_defs.h
> >>> @@ -9,76 +9,19 @@
> >>> #include <linux/bitfield.h>
> >>> #include <linux/bits.h>
> >>>
> >>> -/**
> >>> - * REG_BIT() - Prepare a u32 bit value
> >>> - * @__n: 0-based bit number
> >>> - *
> >>> - * Local wrapper for BIT() to force u32, with compile time checks.
> >>> - *
> >>> - * @return: Value with bit @__n set.
> >>> +/*
> >>> + * Wrappers over the generic BIT_* and GENMASK_* implementations,
> >>> + * for compatibility reasons with previous implementation
> >>> */
> >>> -#define REG_BIT(__n) \
> >>> - ((u32)(BIT(__n) + \
> >>> - BUILD_BUG_ON_ZERO(__is_constexpr(__n) && \
> >>> - ((__n) < 0 || (__n) > 31))))
> >>> +#define REG_GENMASK(high, low) GENMASK_U32(high, low)
> >>> +#define REG_GENMASK64(high, low) GENMASK_U64(high, low)
> >>> +#define REG_GENMASK16(high, low) GENMASK_U16(high, low)
> >>> +#define REG_GENMASK8(high, low) GENMASK_U8(high, low)
> >>
> >> Nit. Maybe just
> >>
> >> #define REG_GENMASK GENMASK_U32
> >
> > Please just keep it as it is for clarity.
>
> I also prefer when the argument is clearly displayed. It shows at first
> glance that this is a function-like macro and reminds of the correct
> order of the argument without having to look at the definitions in
> bits.h. It also allows for people to grep "#define REG_GENMASK(" in
> order to find the macro definition.
>
> To be honest, I don't have a strong opinion either, but because Jani
> also prefers it this way, I will keep as-is.
Please go with the original version. It was just a minor nitpick.
On Sat, Mar 08, 2025 at 01:48:51AM +0900, Vincent Mailhol via B4 Relay wrote: > From: Lucas De Marchi <lucas.demarchi@intel.com> > > Now that include/linux/bits.h implements fixed-width GENMASK_U*(), use > them to implement the i915/xe specific macros. Converting each driver > to use the generic macros are left for later, when/if other > driver-specific macros are also generalized. ... > +/* > + * Wrappers over the generic BIT_* and GENMASK_* implementations, BIT_U*(), GENMASK_U*() as far as I can see. Also "...generic fixed-width...". > + * for compatibility reasons with previous implementation > */ -- With Best Regards, Andy Shevchenko
On 08/03/2025 at 02:54, Andy Shevchenko wrote: > On Sat, Mar 08, 2025 at 01:48:51AM +0900, Vincent Mailhol via B4 Relay wrote: >> From: Lucas De Marchi <lucas.demarchi@intel.com> >> >> Now that include/linux/bits.h implements fixed-width GENMASK_U*(), use >> them to implement the i915/xe specific macros. Converting each driver >> to use the generic macros are left for later, when/if other >> driver-specific macros are also generalized. > > ... > >> +/* >> + * Wrappers over the generic BIT_* and GENMASK_* implementations, > > BIT_U*(), GENMASK_U*() as far as I can see. > > Also "...generic fixed-width...". Ack. I will address both in next version. Yours sincerely, Vincent Mailhol
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