From: Clark Wang <xiaoning.wang@nxp.com>

Add ecspi2 node to support ECSPI on i.MX8MP EVK board.

Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 30 ++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
index c26954e5a6056..566fcf6aa5ef6 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
@@ -309,6 +309,22 @@ &aud2htx {
 	status = "okay";
 };
 
+&ecspi2 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	num-cs = <1>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_ecspi2 &pinctrl_ecspi2_cs>;
+	cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
+	status = "okay";
+
+	spidev1: spi@0 {
+		compatible = "rohm,dh2228fv";
+		reg = <0>;
+		spi-max-frequency = <500000>;
+	};
+};
+
 &eqos {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_eqos>;
@@ -835,6 +851,20 @@ MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29		0xd6
 		>;
 	};
 
+	pinctrl_ecspi2: ecspi2grp {
+		fsl,pins = <
+			MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK		0x82
+			MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI		0x82
+			MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO		0x82
+		>;
+	};
+
+	pinctrl_ecspi2_cs: ecspi2csgrp {
+		fsl,pins = <
+			MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13		0x40000
+		>;
+	};
+
 	pinctrl_eqos: eqosgrp {
 		fsl,pins = <
 			MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC				0x2
-- 
2.34.1

On 06/03/2025 23:23, Frank Li wrote:
> +&ecspi2 {
> +	#address-cells = <1>;
> +	#size-cells = <0>;
> +	num-cs = <1>;
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_ecspi2 &pinctrl_ecspi2_cs>;
> +	cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
> +	status = "okay";
> +
> +	spidev1: spi@0 {
> +		compatible = "rohm,dh2228fv";

NAK, not true. You do not have there DH2228FV.

Stop sending blindly your downstream commits.

Best regards,
Krzysztof

On Thu, Mar 6, 2025 at 7:24 PM Frank Li <Frank.Li@nxp.com> wrote:

> +&ecspi2 {
> +       #address-cells = <1>;
> +       #size-cells = <0>;
> +       num-cs = <1>;
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&pinctrl_ecspi2 &pinctrl_ecspi2_cs>;
> +       cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
> +       status = "okay";
> +
> +       spidev1: spi@0 {
> +               compatible = "rohm,dh2228fv";

That's not a correct description of the hardware.

Conor's effort was to clean up the abuses of using "rohm,dh2228fv" to
get spidev support.

Please check:

fc28d1c1fe3b3 ("spi: spidev: add correct compatible for Rohm BH2228FV")

On Thu, Mar 06, 2025 at 07:55:36PM -0300, Fabio Estevam wrote:
> On Thu, Mar 6, 2025 at 7:24 PM Frank Li <Frank.Li@nxp.com> wrote:
>
> > +&ecspi2 {
> > +       #address-cells = <1>;
> > +       #size-cells = <0>;
> > +       num-cs = <1>;
> > +       pinctrl-names = "default";
> > +       pinctrl-0 = <&pinctrl_ecspi2 &pinctrl_ecspi2_cs>;
> > +       cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
> > +       status = "okay";
> > +
> > +       spidev1: spi@0 {
> > +               compatible = "rohm,dh2228fv";
>
> That's not a correct description of the hardware.
>
> Conor's effort was to clean up the abuses of using "rohm,dh2228fv" to
> get spidev support.
>
> Please check:
>
> fc28d1c1fe3b3 ("spi: spidev: add correct compatible for Rohm BH2228FV")

Thanks! It is actually to get spidev. From commit message, I don't know
what next steps should be did, use "rohm,bh2228fv" or other method to
support spidev?

Frank

On Thu, Mar 6, 2025 at 8:06 PM Frank Li <Frank.li@nxp.com> wrote:

> Thanks! It is actually to get spidev. From commit message, I don't know
> what next steps should be did, use "rohm,bh2228fv" or other method to
> support spidev?

You can add a specific spidev entry. Take a look at:

https://web.git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git/commit/?id=10254a6c6073b0be171d434a3aeeff0256e59443
or
https://web.git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git/commit/?id=9783da2384c5623d376e4641bbce9339be1001eb