Cixtech P1 (internal name sky1) is high performance generic Armv9 SoC.
Orion O6 is the world's first open source Arm V9 Motherboard built by
Radxa. You could find brief introduction for SoC and related boards at:
https://radxa.com/products/orion/o6#overview

In this series, we add initial SoC and board support for Kernel building.
Patch 1-2: Add dt-binding doc for CIX and its sky1 SoC
Patch 3: add related maintainter entry
Patch 4-5: add Arm64 build support
Patch 6: add initial dts support for SoC and Orion O6 board

To run upstream kernel at Orion O6 board, you need to use BIOS
released by Radxa:
https://docs.radxa.com/en/orion/o6/bios/install-bios

Changes for v2:
- Pass dts build check with below commands:
make O=$OUTKNL dt_binding_check DT_SCHEMA_FILES=vendor-prefixes.yaml
make O=$OUTKNL dt_binding_check DT_SCHEMA_FILES=arm/cix.yaml
make O=$OUTKNL CHECK_DTBS=y W=1 cix/sky1-orion-o6.dtb
- Re-order the patch set, and move vendor-perfixes to the 1st patch.
- Patch 4: Ordered Kconfig config entry by alpha-numerically
- Patch 5: Corrects the Ack tag's name
- Patch 6: see below.
1) Corrects the SoF tag's name
2) Fix several coding sytle issues
3) move linux,cma node to dts file
4) delete memory node, memory size is passed by firmware
5) delete uart2 node which will be added in future patches
6) Improve for pmu and cpu node to stands for more specific cpu model
7) Improve the timer node and add hypervisor virtual timer irq

Fugang Duan (1):
  arm64: Kconfig: add ARCH_CIX for cix silicons

Peter Chen (5):
  dt-bindings: vendor-prefixes: Add CIX Technology Group Co., Ltd.
  dt-bindings: arm: add CIX P1 (SKY1) SoC
  MAINTAINERS: Add CIX SoC maintainer entry
  arm64: defconfig: Enable CIX SoC
  arm64: dts: cix: add initial CIX P1(SKY1) dts support

 .../devicetree/bindings/arm/cix.yaml          |  26 +++
 .../devicetree/bindings/vendor-prefixes.yaml  |   2 +
 MAINTAINERS                                   |   8 +
 arch/arm64/Kconfig.platforms                  |   6 +
 arch/arm64/boot/dts/Makefile                  |   1 +
 arch/arm64/boot/dts/cix/Makefile              |   2 +
 arch/arm64/boot/dts/cix/sky1-orion-o6.dts     |  26 +++
 arch/arm64/boot/dts/cix/sky1.dtsi             | 217 ++++++++++++++++++
 arch/arm64/configs/defconfig                  |   1 +
 9 files changed, 289 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/cix.yaml
 create mode 100644 arch/arm64/boot/dts/cix/Makefile
 create mode 100644 arch/arm64/boot/dts/cix/sky1-orion-o6.dts
 create mode 100644 arch/arm64/boot/dts/cix/sky1.dtsi

-- 
2.25.1

Hi Peter,

I'm really happy to see the linux mainline upstream work sent. And I have
also reveived radxa orion o6 before the Chinese new year. I have heard
that CIX is testing vendor kernel with ACPI. And now the mainline upstream
work is based on devicetree. I want to know what the upstream work of CIX
would go in the future, are we going to toggle to ACPI instead of
devicetree?

And it would be good to let outsiders know the plan/roadmap of upstream.
For example collaboara is doing good job on upstreaming rockchip[1][2] and
mediatek[3] socs.

[1] https://gitlab.collabora.com/hardware-enablement/rockchip-3588/notes-for-rockchip-3588/-/blob/main/mainline-status.md
[2] https://gitlab.collabora.com/hardware-enablement/rockchip-3588/notes-for-rockchip-3576/-/blob/main/mainline-status.md?ref_type=heads
[3] https://gitlab.collabora.com/mediatek/aiot/wiki/-/blob/main/mainline-status.md

Best regards,
Jianfeng

On 25-02-27 12:52:36, Jianfeng Liu wrote:
> Hi Peter,
> 
> I'm really happy to see the linux mainline upstream work sent. And I have
> also reveived radxa orion o6 before the Chinese new year. I have heard
> that CIX is testing vendor kernel with ACPI. And now the mainline upstream
> work is based on devicetree. I want to know what the upstream work of CIX
> would go in the future, are we going to toggle to ACPI instead of
> devicetree?
> 
> And it would be good to let outsiders know the plan/roadmap of upstream.
> For example collaboara is doing good job on upstreaming rockchip[1][2] and
> mediatek[3] socs.
> 
> [1] https://gitlab.collabora.com/hardware-enablement/rockchip-3588/notes-for-rockchip-3588/-/blob/main/mainline-status.md
> [2] https://gitlab.collabora.com/hardware-enablement/rockchip-3588/notes-for-rockchip-3576/-/blob/main/mainline-status.md?ref_type=heads
> [3] https://gitlab.collabora.com/mediatek/aiot/wiki/-/blob/main/mainline-status.md
> 

Hi Jianfeng,

Thanks for your interesting of our hardware. Radxa will open our
v6.1 device tree vendor kernel source code at the beginning of next month.
For ACPI vendor kernel source code based on v6.6, it has planned to open
at Q2 of this year.

For upstream, we will submit support based on device tree first, since
some common code changes are needed for supporting ACPI well at Arm,
it may involve lots of discussion. After most of IP drivers are
supported by upstream kernel, we will start ACPI upstream work.

For upstream status record for CIX SoC, we will find some public place
for it.

-- 

Best regards,
Peter