.../interrupt-controller/nxp,lpc3220-mic.txt | 58 ------------- .../interrupt-controller/nxp,lpc3220-mic.yaml | 86 +++++++++++++++++++ 2 files changed, 86 insertions(+), 58 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/nxp,lpc3220-mic.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/nxp,lpc3220-mic.yaml
Convert NXP LPC3220-MIC to DT schema.
Signed-off-by: Leonardo Felipe Takao Hirata <leofthirata@gmail.com>
---
.../interrupt-controller/nxp,lpc3220-mic.txt | 58 -------------
.../interrupt-controller/nxp,lpc3220-mic.yaml | 86 +++++++++++++++++++
2 files changed, 86 insertions(+), 58 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/nxp,lpc3220-mic.txt
create mode 100644 Documentation/devicetree/bindings/interrupt-controller/nxp,lpc3220-mic.yaml
diff --git a/Documentation/devicetree/bindings/interrupt-controller/nxp,lpc3220-mic.txt b/Documentation/devicetree/bindings/interrupt-controller/nxp,lpc3220-mic.txt
deleted file mode 100644
index 0bfb3ba55f4c..000000000000
--- a/Documentation/devicetree/bindings/interrupt-controller/nxp,lpc3220-mic.txt
+++ /dev/null
@@ -1,58 +0,0 @@
-* NXP LPC32xx MIC, SIC1 and SIC2 Interrupt Controllers
-
-Required properties:
-- compatible: "nxp,lpc3220-mic" or "nxp,lpc3220-sic".
-- reg: should contain IC registers location and length.
-- interrupt-controller: identifies the node as an interrupt controller.
-- #interrupt-cells: the number of cells to define an interrupt, should be 2.
- The first cell is the IRQ number, the second cell is used to specify
- one of the supported IRQ types:
- IRQ_TYPE_EDGE_RISING = low-to-high edge triggered,
- IRQ_TYPE_EDGE_FALLING = high-to-low edge triggered,
- IRQ_TYPE_LEVEL_HIGH = active high level-sensitive,
- IRQ_TYPE_LEVEL_LOW = active low level-sensitive.
- Reset value is IRQ_TYPE_LEVEL_LOW.
-
-Optional properties:
-- interrupts: empty for MIC interrupt controller, cascaded MIC
- hardware interrupts for SIC1 and SIC2
-
-Examples:
-
- /* LPC32xx MIC, SIC1 and SIC2 interrupt controllers */
- mic: interrupt-controller@40008000 {
- compatible = "nxp,lpc3220-mic";
- reg = <0x40008000 0x4000>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- sic1: interrupt-controller@4000c000 {
- compatible = "nxp,lpc3220-sic";
- reg = <0x4000c000 0x4000>;
- interrupt-controller;
- #interrupt-cells = <2>;
-
- interrupt-parent = <&mic>;
- interrupts = <0 IRQ_TYPE_LEVEL_LOW>,
- <30 IRQ_TYPE_LEVEL_LOW>;
- };
-
- sic2: interrupt-controller@40010000 {
- compatible = "nxp,lpc3220-sic";
- reg = <0x40010000 0x4000>;
- interrupt-controller;
- #interrupt-cells = <2>;
-
- interrupt-parent = <&mic>;
- interrupts = <1 IRQ_TYPE_LEVEL_LOW>,
- <31 IRQ_TYPE_LEVEL_LOW>;
- };
-
- /* ADC */
- adc@40048000 {
- compatible = "nxp,lpc3220-adc";
- reg = <0x40048000 0x1000>;
- interrupt-parent = <&sic1>;
- interrupts = <7 IRQ_TYPE_LEVEL_HIGH>;
- };
diff --git a/Documentation/devicetree/bindings/interrupt-controller/nxp,lpc3220-mic.yaml b/Documentation/devicetree/bindings/interrupt-controller/nxp,lpc3220-mic.yaml
new file mode 100644
index 000000000000..c57478b8982f
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/nxp,lpc3220-mic.yaml
@@ -0,0 +1,86 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/interrupt-controller/nxp,lpc3220-mic.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP LPC32xx MIC, SIC1 and SIC2 Interrupt Controllers
+
+maintainers:
+ - Vladimir Zapolskiy <vz@mleia.com>
+
+properties:
+ compatible:
+ enum:
+ - nxp,lpc3220-mic
+ - nxp,lpc3220-sic
+
+ reg:
+ description:
+ Should contain IC registers location and length.
+ maxItems: 1
+
+ interrupt-controller: true
+
+ '#interrupt-cells':
+ const: 2
+ description:
+ The number of cells to define an interrupt, should be 2.
+ The first cell is the IRQ number, the second cell is used to specify
+ one of the supported IRQ types.
+ IRQ_TYPE_EDGE_RISING = low-to-high edge triggered,
+ IRQ_TYPE_EDGE_FALLING = high-to-low edge triggered,
+ IRQ_TYPE_LEVEL_HIGH = active high level-sensitive,
+ IRQ_TYPE_LEVEL_LOW = active low level-sensitive.
+ Reset value is IRQ_TYPE_LEVEL_LOW.
+
+ interrupts:
+ description:
+ Empty for MIC interrupt controller, cascaded MIC hardware interrupts for
+ SIC1 and SIC2
+
+required:
+ - compatible
+ - reg
+ - interrupt-controller
+ - '#interrupt-cells'
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+
+ mic: interrupt-controller@40008000 {
+ compatible = "nxp,lpc3220-mic";
+ reg = <0x40008000 0x4000>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ sic1: interrupt-controller@4000c000 {
+ compatible = "nxp,lpc3220-sic";
+ reg = <0x4000c000 0x4000>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupt-parent = <&mic>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>,
+ <30 IRQ_TYPE_LEVEL_LOW>;
+ };
+
+ sic2: interrupt-controller@40010000 {
+ compatible = "nxp,lpc3220-sic";
+ reg = <0x40010000 0x4000>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupt-parent = <&mic>;
+ interrupts = <1 IRQ_TYPE_LEVEL_LOW>,
+ <31 IRQ_TYPE_LEVEL_LOW>;
+ };
+
+ adc@40048000 {
+ compatible = "nxp,lpc3220-adc";
+ reg = <0x40048000 0x1000>;
+ interrupt-parent = <&sic1>;
+ interrupts = <7 IRQ_TYPE_LEVEL_HIGH>;
+ };
--
2.43.0
On Mon, Feb 24, 2025 at 06:04:30PM -0300, Leonardo Felipe Takao Hirata wrote:
> Convert NXP LPC3220-MIC to DT schema.
>
> Signed-off-by: Leonardo Felipe Takao Hirata <leofthirata@gmail.com>
SoB mismatch.
Run checkpatch.
> ---
> .../interrupt-controller/nxp,lpc3220-mic.txt | 58 -------------
> .../interrupt-controller/nxp,lpc3220-mic.yaml | 86 +++++++++++++++++++
> 2 files changed, 86 insertions(+), 58 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/nxp,lpc3220-mic.txt
> create mode 100644 Documentation/devicetree/bindings/interrupt-controller/nxp,lpc3220-mic.yaml
...
> +title: NXP LPC32xx MIC, SIC1 and SIC2 Interrupt Controllers
> +
> +maintainers:
> + - Vladimir Zapolskiy <vz@mleia.com>
> +
> +properties:
> + compatible:
> + enum:
> + - nxp,lpc3220-mic
> + - nxp,lpc3220-sic
> +
> + reg:
> + description:
> + Should contain IC registers location and length.
Drop description
> + maxItems: 1
> +
> + interrupt-controller: true
> +
> + '#interrupt-cells':
> + const: 2
> + description:
> + The number of cells to define an interrupt, should be 2.
Don't repeat constraints in free form text. Drop.
> + The first cell is the IRQ number, the second cell is used to specify
> + one of the supported IRQ types.
> + IRQ_TYPE_EDGE_RISING = low-to-high edge triggered,
> + IRQ_TYPE_EDGE_FALLING = high-to-low edge triggered,
> + IRQ_TYPE_LEVEL_HIGH = active high level-sensitive,
> + IRQ_TYPE_LEVEL_LOW = active low level-sensitive.
> + Reset value is IRQ_TYPE_LEVEL_LOW.
> +
> + interrupts:
Need to list and describe the items.
> + description:
> + Empty for MIC interrupt controller, cascaded MIC hardware interrupts for
> + SIC1 and SIC2
And then allOf:if:then restricting it per variant (interrupts: false).
> +
> +required:
> + - compatible
> + - reg
> + - interrupt-controller
> + - '#interrupt-cells'
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/irq.h>
> +
> + mic: interrupt-controller@40008000 {
> + compatible = "nxp,lpc3220-mic";
> + reg = <0x40008000 0x4000>;
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +
> + sic1: interrupt-controller@4000c000 {
> + compatible = "nxp,lpc3220-sic";
> + reg = <0x4000c000 0x4000>;
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + interrupt-parent = <&mic>;
> + interrupts = <0 IRQ_TYPE_LEVEL_LOW>,
> + <30 IRQ_TYPE_LEVEL_LOW>;
> + };
> +
> + sic2: interrupt-controller@40010000 {
Drop, two examples are enough.
> + compatible = "nxp,lpc3220-sic";
> + reg = <0x40010000 0x4000>;
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + interrupt-parent = <&mic>;
> + interrupts = <1 IRQ_TYPE_LEVEL_LOW>,
> + <31 IRQ_TYPE_LEVEL_LOW>;
> + };
> +
> + adc@40048000 {
> + compatible = "nxp,lpc3220-adc";
Drop, not relevant.
Best regards,
Krzysztof
Hello Krzysztof,
On 25/02/2025 9:06 AM, Krzysztof Kozlowski wrote:
> On Mon, Feb 24, 2025 at 06:04:30PM -0300, Leonardo Felipe Takao Hirata wrote:
>> Convert NXP LPC3220-MIC to DT schema.
>>
>> Signed-off-by: Leonardo Felipe Takao Hirata <leofthirata@gmail.com>
> SoB mismatch.
>
> Run checkpatch.
>
>> ---
>> .../interrupt-controller/nxp,lpc3220-mic.txt | 58 -------------
>> .../interrupt-controller/nxp,lpc3220-mic.yaml | 86 +++++++++++++++++++
>> 2 files changed, 86 insertions(+), 58 deletions(-)
>> delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/nxp,lpc3220-mic.txt
>> create mode 100644 Documentation/devicetree/bindings/interrupt-controller/nxp,lpc3220-mic.yaml
> ...
>
>> +title: NXP LPC32xx MIC, SIC1 and SIC2 Interrupt Controllers
>> +
>> +maintainers:
>> + - Vladimir Zapolskiy <vz@mleia.com>
>> +
>> +properties:
>> + compatible:
>> + enum:
>> + - nxp,lpc3220-mic
>> + - nxp,lpc3220-sic
>> +
>> + reg:
>> + description:
>> + Should contain IC registers location and length.
> Drop description
>
>> + maxItems: 1
>> +
>> + interrupt-controller: true
>> +
>> + '#interrupt-cells':
>> + const: 2
>> + description:
>> + The number of cells to define an interrupt, should be 2.
> Don't repeat constraints in free form text. Drop.
>
>> + The first cell is the IRQ number, the second cell is used to specify
>> + one of the supported IRQ types.
>> + IRQ_TYPE_EDGE_RISING = low-to-high edge triggered,
>> + IRQ_TYPE_EDGE_FALLING = high-to-low edge triggered,
>> + IRQ_TYPE_LEVEL_HIGH = active high level-sensitive,
>> + IRQ_TYPE_LEVEL_LOW = active low level-sensitive.
>> + Reset value is IRQ_TYPE_LEVEL_LOW.
>> +
>> + interrupts:
> Need to list and describe the items.
>
>> + description:
>> + Empty for MIC interrupt controller, cascaded MIC hardware interrupts for
>> + SIC1 and SIC2
> And then allOf:if:then restricting it per variant (interrupts: false).
>
>> +
>> +required:
>> + - compatible
>> + - reg
>> + - interrupt-controller
>> + - '#interrupt-cells'
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> + - |
>> + #include <dt-bindings/interrupt-controller/irq.h>
>> +
>> + mic: interrupt-controller@40008000 {
>> + compatible = "nxp,lpc3220-mic";
>> + reg = <0x40008000 0x4000>;
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + };
>> +
>> + sic1: interrupt-controller@4000c000 {
>> + compatible = "nxp,lpc3220-sic";
>> + reg = <0x4000c000 0x4000>;
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + interrupt-parent = <&mic>;
>> + interrupts = <0 IRQ_TYPE_LEVEL_LOW>,
>> + <30 IRQ_TYPE_LEVEL_LOW>;
>> + };
>> +
>> + sic2: interrupt-controller@40010000 {
> Drop, two examples are enough.
>
>> + compatible = "nxp,lpc3220-sic";
>> + reg = <0x40010000 0x4000>;
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + interrupt-parent = <&mic>;
>> + interrupts = <1 IRQ_TYPE_LEVEL_LOW>,
>> + <31 IRQ_TYPE_LEVEL_LOW>;
>> + };
>> +
>> + adc@40048000 {
>> + compatible = "nxp,lpc3220-adc";
> Drop, not relevant.
>
> Best regards,
> Krzysztof
>
Thanks for the feedback. The fixes will be in v2.
Best regards,
Leonardo Hirata
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