Convert the Xilinx Audio Formatter 1.0 device tree binding documentation
to json-schema.
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
---
.../bindings/sound/xlnx,audio-formatter.txt | 29 -------
.../bindings/sound/xlnx,audio-formatter.yaml | 77 +++++++++++++++++++
2 files changed, 77 insertions(+), 29 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/sound/xlnx,audio-formatter.txt
create mode 100644 Documentation/devicetree/bindings/sound/xlnx,audio-formatter.yaml
diff --git a/Documentation/devicetree/bindings/sound/xlnx,audio-formatter.txt b/Documentation/devicetree/bindings/sound/xlnx,audio-formatter.txt
deleted file mode 100644
index cbc93c8f4963..000000000000
--- a/Documentation/devicetree/bindings/sound/xlnx,audio-formatter.txt
+++ /dev/null
@@ -1,29 +0,0 @@
-Device-Tree bindings for Xilinx PL audio formatter
-
-The IP core supports DMA, data formatting(AES<->PCM conversion)
-of audio samples.
-
-Required properties:
- - compatible: "xlnx,audio-formatter-1.0"
- - interrupt-names: Names specified to list of interrupts in same
- order mentioned under "interrupts".
- List of supported interrupt names are:
- "irq_mm2s" : interrupt from MM2S block
- "irq_s2mm" : interrupt from S2MM block
- - interrupts-parent: Phandle for interrupt controller.
- - interrupts: List of Interrupt numbers.
- - reg: Base address and size of the IP core instance.
- - clock-names: List of input clocks.
- Required elements: "s_axi_lite_aclk", "aud_mclk"
- - clocks: Input clock specifier. Refer to common clock bindings.
-
-Example:
- audio_ss_0_audio_formatter_0: audio_formatter@80010000 {
- compatible = "xlnx,audio-formatter-1.0";
- interrupt-names = "irq_mm2s", "irq_s2mm";
- interrupt-parent = <&gic>;
- interrupts = <0 104 4>, <0 105 4>;
- reg = <0x0 0x80010000 0x0 0x1000>;
- clock-names = "s_axi_lite_aclk", "aud_mclk";
- clocks = <&clk 71>, <&clk_wiz_1 0>;
- };
diff --git a/Documentation/devicetree/bindings/sound/xlnx,audio-formatter.yaml b/Documentation/devicetree/bindings/sound/xlnx,audio-formatter.yaml
new file mode 100644
index 000000000000..a83af71401aa
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/xlnx,audio-formatter.yaml
@@ -0,0 +1,77 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/sound/xlnx,audio-formatter.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Xilinx PL audio formatter
+
+description: |
+ The IP core supports DMA, data formatting(AES<->PCM conversion)
+ of audio samples.
+
+maintainers:
+ - Vincenzo Frascino <vincenzo.frascino@arm.com>
+
+allOf:
+ - $ref: dai-common.yaml#
+
+properties:
+ compatible:
+ enum:
+ - xlnx,audio-formatter-1.0
+
+ reg:
+ maxItems: 1
+
+ interrupt-names:
+ minItems: 1
+ items:
+ - const: irq_mm2s
+ - const: irq_s2mm
+ description: |
+ Names specified to list of interrupts in same order mentioned under
+ "interrupts". List of supported interrupt names are:
+ - "irq_mm2s" : interrupt from MM2S block
+ - "irq_s2mm" : interrupt from S2MM block
+
+ interrupts:
+ minItems: 1
+ maxItems: 2
+
+ clock-names:
+ minItems: 1
+ items:
+ - const: s_axi_lite_aclk
+ - const: aud_mclk
+ description: |
+ List of input clocks.
+
+ clocks:
+ minItems: 1
+ maxItems: 2
+ description: |
+ Input clock specifier. Refer to common clock bindings.
+
+required:
+ - compatible
+ - reg
+ - interrupt-names
+ - interrupts
+ - clock-names
+ - clocks
+
+additionalProperties: false
+
+examples:
+ - |
+ audio_ss_0_audio_formatter_0: audio_formatter@80010000 {
+ compatible = "xlnx,audio-formatter-1.0";
+ interrupt-names = "irq_mm2s", "irq_s2mm";
+ interrupt-parent = <&gic>;
+ interrupts = <0 104 4>, <0 105 4>;
+ reg = <0x80010000 0x1000>;
+ clock-names = "s_axi_lite_aclk", "aud_mclk";
+ clocks = <&clk 71>, <&clk_wiz_1 0>;
+ };
+...
--
2.43.0
On Mon, Feb 24, 2025 at 06:25:46PM +0000, Vincenzo Frascino wrote:
> Convert the Xilinx Audio Formatter 1.0 device tree binding documentation
> to json-schema.
>
> Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
> ---
> .../bindings/sound/xlnx,audio-formatter.txt | 29 -------
> .../bindings/sound/xlnx,audio-formatter.yaml | 77 +++++++++++++++++++
> 2 files changed, 77 insertions(+), 29 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/sound/xlnx,audio-formatter.txt
> create mode 100644 Documentation/devicetree/bindings/sound/xlnx,audio-formatter.yaml
>
> diff --git a/Documentation/devicetree/bindings/sound/xlnx,audio-formatter.txt b/Documentation/devicetree/bindings/sound/xlnx,audio-formatter.txt
> deleted file mode 100644
> index cbc93c8f4963..000000000000
> --- a/Documentation/devicetree/bindings/sound/xlnx,audio-formatter.txt
> +++ /dev/null
> @@ -1,29 +0,0 @@
> -Device-Tree bindings for Xilinx PL audio formatter
> -
> -The IP core supports DMA, data formatting(AES<->PCM conversion)
> -of audio samples.
> -
> -Required properties:
> - - compatible: "xlnx,audio-formatter-1.0"
> - - interrupt-names: Names specified to list of interrupts in same
> - order mentioned under "interrupts".
> - List of supported interrupt names are:
> - "irq_mm2s" : interrupt from MM2S block
> - "irq_s2mm" : interrupt from S2MM block
> - - interrupts-parent: Phandle for interrupt controller.
> - - interrupts: List of Interrupt numbers.
> - - reg: Base address and size of the IP core instance.
> - - clock-names: List of input clocks.
> - Required elements: "s_axi_lite_aclk", "aud_mclk"
> - - clocks: Input clock specifier. Refer to common clock bindings.
> -
> -Example:
> - audio_ss_0_audio_formatter_0: audio_formatter@80010000 {
> - compatible = "xlnx,audio-formatter-1.0";
> - interrupt-names = "irq_mm2s", "irq_s2mm";
> - interrupt-parent = <&gic>;
> - interrupts = <0 104 4>, <0 105 4>;
> - reg = <0x0 0x80010000 0x0 0x1000>;
> - clock-names = "s_axi_lite_aclk", "aud_mclk";
> - clocks = <&clk 71>, <&clk_wiz_1 0>;
> - };
> diff --git a/Documentation/devicetree/bindings/sound/xlnx,audio-formatter.yaml b/Documentation/devicetree/bindings/sound/xlnx,audio-formatter.yaml
> new file mode 100644
> index 000000000000..a83af71401aa
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/sound/xlnx,audio-formatter.yaml
> @@ -0,0 +1,77 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/sound/xlnx,audio-formatter.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Xilinx PL audio formatter
> +
> +description: |
Don't need '|'
> + The IP core supports DMA, data formatting(AES<->PCM conversion)
> + of audio samples.
> +
> +maintainers:
> + - Vincenzo Frascino <vincenzo.frascino@arm.com>
> +
> +allOf:
> + - $ref: dai-common.yaml#
> +
> +properties:
> + compatible:
> + enum:
> + - xlnx,audio-formatter-1.0
> +
> + reg:
> + maxItems: 1
> +
> + interrupt-names:
> + minItems: 1
> + items:
> + - const: irq_mm2s
> + - const: irq_s2mm
> + description: |
> + Names specified to list of interrupts in same order mentioned under
> + "interrupts". List of supported interrupt names are:
> + - "irq_mm2s" : interrupt from MM2S block
> + - "irq_s2mm" : interrupt from S2MM block
Don't repeat constraints in prose and don't describe how common
properties work. IOW, drop the description completely.
> +
> + interrupts:
> + minItems: 1
> + maxItems: 2
If you want to describe each interrupt, then here put:
minItems: 1
items:
- description: describe 1st interrupt...
- description: ...
> +
> + clock-names:
> + minItems: 1
> + items:
> + - const: s_axi_lite_aclk
> + - const: aud_mclk
> + description: |
> + List of input clocks.
Drop
> +
> + clocks:
> + minItems: 1
> + maxItems: 2
> + description: |
> + Input clock specifier. Refer to common clock bindings.
Drop
> +
> +required:
> + - compatible
> + - reg
> + - interrupt-names
> + - interrupts
> + - clock-names
> + - clocks
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + audio_ss_0_audio_formatter_0: audio_formatter@80010000 {
> + compatible = "xlnx,audio-formatter-1.0";
> + interrupt-names = "irq_mm2s", "irq_s2mm";
> + interrupt-parent = <&gic>;
> + interrupts = <0 104 4>, <0 105 4>;
> + reg = <0x80010000 0x1000>;
> + clock-names = "s_axi_lite_aclk", "aud_mclk";
> + clocks = <&clk 71>, <&clk_wiz_1 0>;
> + };
> +...
> --
> 2.43.0
>
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