As a followup to getting basic HDMI1 output support [1] merged upstream,
make use of the HDMI1 PHY PLL to provide better VOP2 display modes
handling for the second HDMI output port on RK3588 SoC, similarly to
what has been achieved recently for HDMI0 [2].
Please note Heiko's fix [3] in of_clk_get_hw_from_clkspec() is also
required for boards that do not provide HDMI0 output, that is to ensure
devm_clk_get_optional() returns NULL instead of ERR_PTR(-EPROBE_DEFER),
which otherwise would put rockchip-drm module in a permanent deferred
probe mode.
Additionally, enable HDMI1 output on Rockchip RK3588 EVB1.
[1] https://lore.kernel.org/lkml/20241211-rk3588-hdmi1-v2-0-02cdca22ff68@collabora.com/
[2] https://lore.kernel.org/lkml/20250204-vop2-hdmi0-disp-modes-v3-0-d71c6a196e58@collabora.com/
[3] https://lore.kernel.org/lkml/20250222223733.2990179-1-heiko@sntech.de/
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
---
Changes in v2:
- Make use of dev_err_probe() for handling failures when trying to get
pll_hdmiphy1 optional clock (Sebastian)
- Add a new patch to replace drm_err() calls in vop2_bind() and
vop2_create_crtcs() with dev_err_probe(), to simplify error handling
and improve consistency, along with some related fixes
- Link to v1: https://lore.kernel.org/r/20250215-vop2-hdmi1-disp-modes-v1-0-81962a7151d6@collabora.com
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Cristian Ciocaltea (5):
drm/rockchip: vop2: Improve display modes handling on RK3588 HDMI1
drm/rockchip: vop2: Consistently use dev_err_probe()
arm64: dts: rockchip: Enable HDMI1 PHY clk provider on RK3588
arm64: dts: rockchip: Add HDMI1 PHY PLL clock source to VOP2 on RK3588
arm64: dts: rockchip: Enable HDMI1 on rk3588-evb1
arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts | 42 ++++++++-
arch/arm64/boot/dts/rockchip/rk3588-extra.dtsi | 22 +++++
drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 108 +++++++++++++----------
3 files changed, 123 insertions(+), 49 deletions(-)
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base-commit: 0ae0fa3bf0b44c8611d114a9f69985bf451010c3
change-id: 20250215-vop2-hdmi1-disp-modes-ea8da428bc8e