Use a compiler attribute to align the areg field to 16 bytes instead of
using a zero-length alignment array.

Signed-off-by: Thorsten Blum <thorsten.blum@linux.dev>
---
 arch/xtensa/include/asm/ptrace.h | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/arch/xtensa/include/asm/ptrace.h b/arch/xtensa/include/asm/ptrace.h
index 86c70117371b..4871e5a4d6fb 100644
--- a/arch/xtensa/include/asm/ptrace.h
+++ b/arch/xtensa/include/asm/ptrace.h
@@ -72,13 +72,10 @@ struct pt_regs {
 	/* Additional configurable registers that are used by the compiler. */
 	xtregs_opt_t xtregs_opt;
 
-	/* Make sure the areg field is 16 bytes aligned. */
-	int align[0] __attribute__ ((aligned(16)));
-
 	/* current register frame.
 	 * Note: The ESF for kernel exceptions ends after 16 registers!
 	 */
-	unsigned long areg[XCHAL_NUM_AREGS];
+	unsigned long areg[XCHAL_NUM_AREGS] __aligned(16);
 };
 
 # define arch_has_single_step()	(1)
-- 
2.48.1

On Wed, Feb 19, 2025 at 3:50 AM Thorsten Blum <thorsten.blum@linux.dev> wrote:
>
> Use a compiler attribute to align the areg field to 16 bytes instead of
> using a zero-length alignment array.
>
> Signed-off-by: Thorsten Blum <thorsten.blum@linux.dev>
> ---
>  arch/xtensa/include/asm/ptrace.h | 5 +----
>  1 file changed, 1 insertion(+), 4 deletions(-)

Thanks. Applied to my xtensa tree.

-- Max