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[PATCH 1/3] clk: renesas: rzv2h-cpg: Move PLL access macros to source file

Prabhakar posted 3 patches 10 months ago
[PATCH 1/3] clk: renesas: rzv2h-cpg: Move PLL access macros to source file
Posted by Prabhakar 10 months ago 
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Move the `PLL_CLK_ACCESS()`, `PLL_CLK1_OFFSET()`, and `PLL_CLK2_OFFSET()`
macros from `rzv2h-cpg.h` to `rzv2h-cpg.c`, as they are not intended for
use by SoC-specific CPG drivers.

Additionally, update `PLL_CLK1_OFFSET()` and `PLL_CLK2_OFFSET()` to use
the `FIELD_GET()` macro for better readability and simplify the
`PLL_CLK_ACCESS()` macro.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 drivers/clk/renesas/rzv2h-cpg.c | 4 ++++
 drivers/clk/renesas/rzv2h-cpg.h | 3 ---
 2 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/clk/renesas/rzv2h-cpg.c b/drivers/clk/renesas/rzv2h-cpg.c
index 419dc8cd2766..1ebaefb36133 100644
--- a/drivers/clk/renesas/rzv2h-cpg.c
+++ b/drivers/clk/renesas/rzv2h-cpg.c
@@ -56,6 +56,10 @@
 
 #define CPG_CLKSTATUS0		(0x700)
 
+#define PLL_CLK_ACCESS(n)	(!!((n) & BIT(31)))
+#define PLL_CLK1_OFFSET(n)	FIELD_GET(GENMASK(15, 0), (n))
+#define PLL_CLK2_OFFSET(n)	(PLL_CLK1_OFFSET(n) + (0x4))
+
 /**
  * struct rzv2h_cpg_priv - Clock Pulse Generator Private Data
  *
diff --git a/drivers/clk/renesas/rzv2h-cpg.h b/drivers/clk/renesas/rzv2h-cpg.h
index fd8eb985c75b..81f44b94f6d5 100644
--- a/drivers/clk/renesas/rzv2h-cpg.h
+++ b/drivers/clk/renesas/rzv2h-cpg.h
@@ -87,9 +87,6 @@ enum clk_types {
 
 /* BIT(31) indicates if CLK1/2 are accessible or not */
 #define PLL_CONF(n)		(BIT(31) | ((n) & ~GENMASK(31, 16)))
-#define PLL_CLK_ACCESS(n)	((n) & BIT(31) ? 1 : 0)
-#define PLL_CLK1_OFFSET(n)	((n) & ~GENMASK(31, 16))
-#define PLL_CLK2_OFFSET(n)	(((n) & ~GENMASK(31, 16)) + (0x4))
 
 #define DEF_TYPE(_name, _id, _type...) \
 	{ .name = _name, .id = _id, .type = _type }
-- 
2.43.0
Re: [PATCH 1/3] clk: renesas: rzv2h-cpg: Move PLL access macros to source file
Posted by Geert Uytterhoeven 9 months, 2 weeks ago 
Hi Prabhakar,

On Tue, 18 Feb 2025 at 12:44, Prabhakar <prabhakar.csengg@gmail.com> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Move the `PLL_CLK_ACCESS()`, `PLL_CLK1_OFFSET()`, and `PLL_CLK2_OFFSET()`
> macros from `rzv2h-cpg.h` to `rzv2h-cpg.c`, as they are not intended for
> use by SoC-specific CPG drivers.
>
> Additionally, update `PLL_CLK1_OFFSET()` and `PLL_CLK2_OFFSET()` to use
> the `FIELD_GET()` macro for better readability and simplify the
> `PLL_CLK_ACCESS()` macro.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Thanks for your patch!

The changes look correct to me, so
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
but I still have some comments...

> --- a/drivers/clk/renesas/rzv2h-cpg.c
> +++ b/drivers/clk/renesas/rzv2h-cpg.c
> @@ -56,6 +56,10 @@
>
>  #define CPG_CLKSTATUS0         (0x700)
>
> +#define PLL_CLK_ACCESS(n)      (!!((n) & BIT(31)))

OK

> +#define PLL_CLK1_OFFSET(n)     FIELD_GET(GENMASK(15, 0), (n))
> +#define PLL_CLK2_OFFSET(n)     (PLL_CLK1_OFFSET(n) + (0x4))

IMO, the original versions are more readable, as they clearly show
the symmetry between encoding and decoding.

Perhaps a good alternative would be a structure with bitfields and
a PACK() macro, like is used for DDIV and SMUX?

> +
>  /**
>   * struct rzv2h_cpg_priv - Clock Pulse Generator Private Data
>   *
> diff --git a/drivers/clk/renesas/rzv2h-cpg.h b/drivers/clk/renesas/rzv2h-cpg.h
> index fd8eb985c75b..81f44b94f6d5 100644
> --- a/drivers/clk/renesas/rzv2h-cpg.h
> +++ b/drivers/clk/renesas/rzv2h-cpg.h
> @@ -87,9 +87,6 @@ enum clk_types {
>
>  /* BIT(31) indicates if CLK1/2 are accessible or not */
>  #define PLL_CONF(n)            (BIT(31) | ((n) & ~GENMASK(31, 16)))
> -#define PLL_CLK_ACCESS(n)      ((n) & BIT(31) ? 1 : 0)
> -#define PLL_CLK1_OFFSET(n)     ((n) & ~GENMASK(31, 16))
> -#define PLL_CLK2_OFFSET(n)     (((n) & ~GENMASK(31, 16)) + (0x4))
>
>  #define DEF_TYPE(_name, _id, _type...) \
>         { .name = _name, .id = _id, .type = _type }

Gr{oetje,eeting}s,

                        Geert


--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
Re: [PATCH 1/3] clk: renesas: rzv2h-cpg: Move PLL access macros to source file
Posted by Lad, Prabhakar 9 months, 2 weeks ago 
Hi Geert,

Thank you for the review.

On Wed, Mar 5, 2025 at 4:19 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
>
> Hi Prabhakar,
>
> On Tue, 18 Feb 2025 at 12:44, Prabhakar <prabhakar.csengg@gmail.com> wrote:
> > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> >
> > Move the `PLL_CLK_ACCESS()`, `PLL_CLK1_OFFSET()`, and `PLL_CLK2_OFFSET()`
> > macros from `rzv2h-cpg.h` to `rzv2h-cpg.c`, as they are not intended for
> > use by SoC-specific CPG drivers.
> >
> > Additionally, update `PLL_CLK1_OFFSET()` and `PLL_CLK2_OFFSET()` to use
> > the `FIELD_GET()` macro for better readability and simplify the
> > `PLL_CLK_ACCESS()` macro.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Thanks for your patch!
>
> The changes look correct to me, so
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> but I still have some comments...
>
> > --- a/drivers/clk/renesas/rzv2h-cpg.c
> > +++ b/drivers/clk/renesas/rzv2h-cpg.c
> > @@ -56,6 +56,10 @@
> >
> >  #define CPG_CLKSTATUS0         (0x700)
> >
> > +#define PLL_CLK_ACCESS(n)      (!!((n) & BIT(31)))
>
> OK
>
> > +#define PLL_CLK1_OFFSET(n)     FIELD_GET(GENMASK(15, 0), (n))
> > +#define PLL_CLK2_OFFSET(n)     (PLL_CLK1_OFFSET(n) + (0x4))
>
> IMO, the original versions are more readable, as they clearly show
> the symmetry between encoding and decoding.
>
> Perhaps a good alternative would be a structure with bitfields and
> a PACK() macro, like is used for DDIV and SMUX?
>
Sure, I'll do that. Is it OK if I make that change on top of this
series or do you want me to rework and send a v2?

Cheers,
Prabhakar
Re: [PATCH 1/3] clk: renesas: rzv2h-cpg: Move PLL access macros to source file
Posted by Geert Uytterhoeven 9 months, 2 weeks ago 
Hi Prabhakar,

On Wed, 5 Mar 2025 at 17:38, Lad, Prabhakar <prabhakar.csengg@gmail.com> wrote:
> On Wed, Mar 5, 2025 at 4:19 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
> > On Tue, 18 Feb 2025 at 12:44, Prabhakar <prabhakar.csengg@gmail.com> wrote:
> > > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > >
> > > Move the `PLL_CLK_ACCESS()`, `PLL_CLK1_OFFSET()`, and `PLL_CLK2_OFFSET()`
> > > macros from `rzv2h-cpg.h` to `rzv2h-cpg.c`, as they are not intended for
> > > use by SoC-specific CPG drivers.
> > >
> > > Additionally, update `PLL_CLK1_OFFSET()` and `PLL_CLK2_OFFSET()` to use
> > > the `FIELD_GET()` macro for better readability and simplify the
> > > `PLL_CLK_ACCESS()` macro.
> > >
> > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> >
> > Thanks for your patch!
> >
> > The changes look correct to me, so
> > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > but I still have some comments...
> >
> > > --- a/drivers/clk/renesas/rzv2h-cpg.c
> > > +++ b/drivers/clk/renesas/rzv2h-cpg.c
> > > @@ -56,6 +56,10 @@
> > >
> > >  #define CPG_CLKSTATUS0         (0x700)
> > >
> > > +#define PLL_CLK_ACCESS(n)      (!!((n) & BIT(31)))
> >
> > OK
> >
> > > +#define PLL_CLK1_OFFSET(n)     FIELD_GET(GENMASK(15, 0), (n))
> > > +#define PLL_CLK2_OFFSET(n)     (PLL_CLK1_OFFSET(n) + (0x4))
> >
> > IMO, the original versions are more readable, as they clearly show
> > the symmetry between encoding and decoding.
> >
> > Perhaps a good alternative would be a structure with bitfields and
> > a PACK() macro, like is used for DDIV and SMUX?
> >
> Sure, I'll do that. Is it OK if I make that change on top of this
> series or do you want me to rework and send a v2?

I think there will be a v2 ;-)

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

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