[PATCH v3] arm64: dts: socfpga: agilex5: add led and memory nodes

niravkumar.l.rabara@intel.com posted 1 patch 10 months ago
.../boot/dts/intel/socfpga_agilex5_socdk.dts  | 20 +++++++++++++++++++
1 file changed, 20 insertions(+)
[PATCH v3] arm64: dts: socfpga: agilex5: add led and memory nodes
Posted by niravkumar.l.rabara@intel.com 10 months ago
From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>

Add LED and memory nodes, and enabled GPIO0 for Agilex5 devkit.

Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
---

Changes in v3:
  * Update commit log for better clarity.

Changes in v2:
  * Add mising blank line.
  * Changed the name to led-0 instad of led1.

 .../boot/dts/intel/socfpga_agilex5_socdk.dts  | 20 +++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts b/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts
index c533e5a3a610..e106e48f1e3f 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts
@@ -15,6 +15,26 @@ aliases {
 	chosen {
 		stdout-path = "serial0:115200n8";
 	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led-0 {
+			label = "hps_led0";
+			gpios = <&porta 11 GPIO_ACTIVE_HIGH>;
+		};
+
+	};
+
+	memory@80000000 {
+		device_type = "memory";
+		/* We expect the bootloader to fill in the reg */
+		reg = <0x0 0x80000000 0x0 0x0>;
+	};
+};
+
+&gpio0 {
+	status = "okay";
 };
 
 &gpio1 {
-- 
2.25.1