.../devicetree/bindings/clock/canaan,k230-clk.yaml | 43 + arch/riscv/boot/dts/canaan/k230.dtsi | 32 + drivers/clk/Kconfig | 6 + drivers/clk/Makefile | 1 + drivers/clk/clk-k230.c | 1347 ++++++++++++++++++++ include/dt-bindings/clock/canaan,k230-clk.h | 49 + 6 files changed, 1478 insertions(+)
This patch series adds clock controller support for the Canaan Kendryte
K230 SoC. The K230 SoC includes an external 24MHz OSC and 4 internal
PLLs, with the controller managing these sources and their derived clocks.
The clock tree and hardware-specific definition can be found in the
vendor's DTS [1],
and this series is based on the K230 initial series [2].
Link: https://github.com/kendryte/k230_sdk/blob/main/src/little/linux/arch/riscv/boot/dts/kendryte/clock_provider.dtsi [1]
Link: https://lore.kernel.org/linux-clk/tencent_F76EB8D731C521C18D5D7C4F8229DAA58E08@qq.com/ [2]
Co-developed-by: Troy Mitchell <TroyMitchell988@gmail.com>
Signed-off-by: Troy Mitchell <TroyMitchell988@gmail.com>
Signed-off-by: Xukai Wang <kingxukai@zohomail.com>
---
Changes in v4:
- Remove redundant onecell_get callback and add_provider function
for pll_divs.
- Modify the base-commit in cover letter.
- Link to v3: https://lore.kernel.org/r/20250203-b4-k230-clk-v3-0-362c79124572@zohomail.com
Changes in v3:
- Reorder the defination and declaration in drivers code.
- Reorder the properties in dts node.
- Replace global variable `k230_sysclk` with dynamic memory allocation.
- Rename the macro K230_NUM_CLKS to K230_CLK_NUM.
- Use dev_err_probe for error handling.
- Remove unused includes.
- Link to v2: https://lore.kernel.org/r/20250108-b4-k230-clk-v2-0-27b30a2ca52d@zohomail.com
Changes in v2:
- Add items and description.
- Rename k230-clk.h to canaan,k230-clk.h
- Link to v1: https://lore.kernel.org/r/20241229-b4-k230-clk-v1-0-221a917e80ed@zohomail.com
---
Xukai Wang (3):
dt-bindings: clock: Add bindings for Canaan K230 clock controller
clk: canaan: Add clock driver for Canaan K230
riscv: dts: canaan: Add clock initial support for K230
.../devicetree/bindings/clock/canaan,k230-clk.yaml | 43 +
arch/riscv/boot/dts/canaan/k230.dtsi | 32 +
drivers/clk/Kconfig | 6 +
drivers/clk/Makefile | 1 +
drivers/clk/clk-k230.c | 1347 ++++++++++++++++++++
include/dt-bindings/clock/canaan,k230-clk.h | 49 +
6 files changed, 1478 insertions(+)
---
base-commit: 7fdb24bbac37ce692346d60b89f5aa29844b8b88
change-id: 20241206-b4-k230-clk-925f33fed6c2
Best regards,
--
Xukai Wang <kingxukai@zohomail.com>
Stephen, Is the driver in this series satisfactory to you? If it is, can I send you a PR containing it and the binding so that I can apply the final patch in the series (and merge the basic support for the k230 soc)? Cheers, Conor. On Mon, Feb 17, 2025 at 10:45:15PM +0800, Xukai Wang wrote: > This patch series adds clock controller support for the Canaan Kendryte > K230 SoC. The K230 SoC includes an external 24MHz OSC and 4 internal > PLLs, with the controller managing these sources and their derived clocks. > > The clock tree and hardware-specific definition can be found in the > vendor's DTS [1], > and this series is based on the K230 initial series [2]. > > Link: https://github.com/kendryte/k230_sdk/blob/main/src/little/linux/arch/riscv/boot/dts/kendryte/clock_provider.dtsi [1] > Link: https://lore.kernel.org/linux-clk/tencent_F76EB8D731C521C18D5D7C4F8229DAA58E08@qq.com/ [2] > > Co-developed-by: Troy Mitchell <TroyMitchell988@gmail.com> > Signed-off-by: Troy Mitchell <TroyMitchell988@gmail.com> > Signed-off-by: Xukai Wang <kingxukai@zohomail.com> > > --- > Changes in v4: > - Remove redundant onecell_get callback and add_provider function > for pll_divs. > - Modify the base-commit in cover letter. > - Link to v3: https://lore.kernel.org/r/20250203-b4-k230-clk-v3-0-362c79124572@zohomail.com > > Changes in v3: > - Reorder the defination and declaration in drivers code. > - Reorder the properties in dts node. > - Replace global variable `k230_sysclk` with dynamic memory allocation. > - Rename the macro K230_NUM_CLKS to K230_CLK_NUM. > - Use dev_err_probe for error handling. > - Remove unused includes. > - Link to v2: https://lore.kernel.org/r/20250108-b4-k230-clk-v2-0-27b30a2ca52d@zohomail.com > > Changes in v2: > - Add items and description. > - Rename k230-clk.h to canaan,k230-clk.h > - Link to v1: https://lore.kernel.org/r/20241229-b4-k230-clk-v1-0-221a917e80ed@zohomail.com > > --- > Xukai Wang (3): > dt-bindings: clock: Add bindings for Canaan K230 clock controller > clk: canaan: Add clock driver for Canaan K230 > riscv: dts: canaan: Add clock initial support for K230 > > .../devicetree/bindings/clock/canaan,k230-clk.yaml | 43 + > arch/riscv/boot/dts/canaan/k230.dtsi | 32 + > drivers/clk/Kconfig | 6 + > drivers/clk/Makefile | 1 + > drivers/clk/clk-k230.c | 1347 ++++++++++++++++++++ > include/dt-bindings/clock/canaan,k230-clk.h | 49 + > 6 files changed, 1478 insertions(+) > --- > base-commit: 7fdb24bbac37ce692346d60b89f5aa29844b8b88 > change-id: 20241206-b4-k230-clk-925f33fed6c2 > > Best regards, > -- > Xukai Wang <kingxukai@zohomail.com> >
Quoting Conor Dooley (2025-02-18 09:02:32) > Stephen, > > Is the driver in this series satisfactory to you? If it is, can I send > you a PR containing it and the binding so that I can apply the final > patch in the series (and merge the basic support for the k230 soc)? > Sorry, the driver is not ready.
On Tue, Feb 18, 2025 at 01:51:38PM -0800, Stephen Boyd wrote: > Quoting Conor Dooley (2025-02-18 09:02:32) > > Stephen, > > > > Is the driver in this series satisfactory to you? If it is, can I send > > you a PR containing it and the binding so that I can apply the final > > patch in the series (and merge the basic support for the k230 soc)? > > > > Sorry, the driver is not ready. That's cool, was just basing off the v4 changelog being minimal, no worries.
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