Rockchip 356x SoC's GIC has two hardware integration issues that
affect MSI functionality of the GIC. Previously, both these GIC
limitations were worked around by using MBI for MSI instead of ITS
because kernel GIC driver didn't have necessary quirks.

The first limitation is about RK356x GIC not supporting programmable
shareability. Rockchip assigned Errata ID #3568001 for this issue.

Second limitation is about GIC AXI master interface addressing only
first 4GB of DRAM. Rockchip assigned Errata ID #3568002 for this issue.

Now that kernel supports quirks for both of the erratums, add
MSI controller node to RK356x device-tree.

Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
---
 arch/arm64/boot/dts/rockchip/rk356x-base.dtsi | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi
index 28be38b7182e..423185686600 100644
--- a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi
@@ -284,7 +284,18 @@ gic: interrupt-controller@fd400000 {
 		mbi-alias = <0x0 0xfd410000>;
 		mbi-ranges = <296 24>;
 		msi-controller;
+		ranges;
+		#address-cells = <2>;
+		#size-cells = <2>;
 		dma-noncoherent;
+
+		its: msi-controller@fd440000 {
+			compatible = "arm,gic-v3-its";
+			reg = <0x0 0xfd440000 0 0x20000>;
+			dma-noncoherent;
+			msi-controller;
+			#msi-cells = <1>;
+		};
 	};
 
 	usb_host0_ehci: usb@fd800000 {
-- 
2.48.1

On Sat, 15 Feb 2025 23:54:30 +0000,
Dmitry Osipenko <dmitry.osipenko@collabora.com> wrote:
> 
> Rockchip 356x SoC's GIC has two hardware integration issues that
> affect MSI functionality of the GIC. Previously, both these GIC
> limitations were worked around by using MBI for MSI instead of ITS
> because kernel GIC driver didn't have necessary quirks.
> 
> The first limitation is about RK356x GIC not supporting programmable
> shareability. Rockchip assigned Errata ID #3568001 for this issue.
> 
> Second limitation is about GIC AXI master interface addressing only
> first 4GB of DRAM. Rockchip assigned Errata ID #3568002 for this issue.
> 
> Now that kernel supports quirks for both of the erratums, add
> MSI controller node to RK356x device-tree.
> 
> Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
> ---
>  arch/arm64/boot/dts/rockchip/rk356x-base.dtsi | 11 +++++++++++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi
> index 28be38b7182e..423185686600 100644
> --- a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi
> @@ -284,7 +284,18 @@ gic: interrupt-controller@fd400000 {
>  		mbi-alias = <0x0 0xfd410000>;
>  		mbi-ranges = <296 24>;
>  		msi-controller;
> +		ranges;
> +		#address-cells = <2>;
> +		#size-cells = <2>;
>  		dma-noncoherent;
> +
> +		its: msi-controller@fd440000 {
> +			compatible = "arm,gic-v3-its";
> +			reg = <0x0 0xfd440000 0 0x20000>;
> +			dma-noncoherent;
> +			msi-controller;
> +			#msi-cells = <1>;
> +		};
>  	};
>  
>  	usb_host0_ehci: usb@fd800000 {

You can merge this patch with the previous one. Marking the GIC
non-coherent is pointless if no ITS is available, because there is no
point in allocating memory for them.

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.

On 2/16/25 12:59, Marc Zyngier wrote:
> On Sat, 15 Feb 2025 23:54:30 +0000,
> Dmitry Osipenko <dmitry.osipenko@collabora.com> wrote:
>>
>> Rockchip 356x SoC's GIC has two hardware integration issues that
>> affect MSI functionality of the GIC. Previously, both these GIC
>> limitations were worked around by using MBI for MSI instead of ITS
>> because kernel GIC driver didn't have necessary quirks.
>>
>> The first limitation is about RK356x GIC not supporting programmable
>> shareability. Rockchip assigned Errata ID #3568001 for this issue.
>>
>> Second limitation is about GIC AXI master interface addressing only
>> first 4GB of DRAM. Rockchip assigned Errata ID #3568002 for this issue.
>>
>> Now that kernel supports quirks for both of the erratums, add
>> MSI controller node to RK356x device-tree.
>>
>> Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
>> ---
>>  arch/arm64/boot/dts/rockchip/rk356x-base.dtsi | 11 +++++++++++
>>  1 file changed, 11 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi
>> index 28be38b7182e..423185686600 100644
>> --- a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi
>> +++ b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi
>> @@ -284,7 +284,18 @@ gic: interrupt-controller@fd400000 {
>>  		mbi-alias = <0x0 0xfd410000>;
>>  		mbi-ranges = <296 24>;
>>  		msi-controller;
>> +		ranges;
>> +		#address-cells = <2>;
>> +		#size-cells = <2>;
>>  		dma-noncoherent;
>> +
>> +		its: msi-controller@fd440000 {
>> +			compatible = "arm,gic-v3-its";
>> +			reg = <0x0 0xfd440000 0 0x20000>;
>> +			dma-noncoherent;
>> +			msi-controller;
>> +			#msi-cells = <1>;
>> +		};
>>  	};
>>  
>>  	usb_host0_ehci: usb@fd800000 {
> 
> You can merge this patch with the previous one. Marking the GIC
> non-coherent is pointless if no ITS is available, because there is no
> point in allocating memory for them.

Ack

-- 
Best regards,
Dmitry