From: Cheng Ming Lin <chengminglin@mxic.com.tw>
Although certain Macronix NOR flash support the Quad Input Page Program
feature, the corresponding information in the 4-byte Address Instruction
Table of these flash is not properly filled. As a result, this feature
cannot be enabled as expected.
To address this issue, a post_sfdp fixups implementation is required to
correct the missing information.
Signed-off-by: Cheng Ming Lin <chengminglin@mxic.com.tw>
---
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id
c22019
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer
macronix
zynq> hexdump -Cv /sys/bus/spi/devices/spi0.0/spi-nor/sfdp
00000000 53 46 44 50 06 01 02 ff 00 06 01 10 30 00 00 ff |SFDP........0...|
00000010 c2 00 01 04 10 01 00 ff 84 00 01 02 c0 00 00 ff |................|
00000020 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
00000030 e5 20 fb ff ff ff ff 0f 44 eb 08 6b 08 3b 04 bb |. ......D..k.;..|
00000040 fe ff ff ff ff ff 00 ff ff ff 44 eb 0c 20 0f 52 |..........D.. .R|
00000050 10 d8 00 ff d6 59 dd 00 82 9f 03 db 44 03 67 38 |.....Y......D.g8|
00000060 30 b0 30 b0 f7 bd d5 5c 4a 9e 29 ff f0 50 f9 85 |0.0....\J.)..P..|
00000070 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
00000080 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
00000090 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
000000a0 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
000000b0 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
000000c0 7f 8f ff ff 21 5c dc ff ff ff ff ff ff ff ff ff |....!\..........|
(wrong bit here, 7f should be ff)
000000d0 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
000000e0 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
000000f0 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
00000100 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
00000110 00 36 00 27 9d f9 c0 64 85 cb ff ff ff ff ff ff |.6.'...d........|
00000120
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id
c2201a
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer
macronix
zynq> hexdump -Cv /sys/bus/spi/devices/spi0.0/spi-nor/sfdp
00000000 53 46 44 50 06 01 02 ff 00 06 01 10 30 00 00 ff |SFDP........0...|
00000010 c2 00 01 04 10 01 00 ff 84 00 01 02 c0 00 00 ff |................|
00000020 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
00000030 e5 20 fb ff ff ff ff 1f 44 eb 08 6b 08 3b 04 bb |. ......D..k.;..|
00000040 fe ff ff ff ff ff 00 ff ff ff 44 eb 0c 20 0f 52 |..........D.. .R|
00000050 10 d8 00 ff d6 49 c5 00 81 df 04 e3 44 03 67 38 |.....I......D.g8|
00000060 30 b0 30 b0 f7 bd d5 5c 4a 9e 29 ff f0 50 f9 85 |0.0....\J.)..P..|
00000070 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
00000080 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
00000090 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
000000a0 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
000000b0 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
000000c0 7f ef ff ff 21 5c dc ff ff ff ff ff ff ff ff ff |....!\..........|
(wrong bit here, 7f should be ff)
000000d0 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
000000e0 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
000000f0 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
00000100 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
00000110 00 36 00 27 9d f9 c0 64 85 cb ff ff ff ff ff ff |.6.'...d........|
00000120
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id
c2201b
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer
macronix
zynq> hexdump -Cv /sys/bus/spi/devices/spi0.0/spi-nor/sfdp
00000000 53 46 44 50 06 01 02 ff 00 06 01 10 30 00 00 ff |SFDP........0...|
00000010 c2 00 01 04 10 01 00 ff 84 00 01 02 c0 00 00 ff |................|
00000020 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
00000030 e5 20 fb ff ff ff ff 3f 44 eb 08 6b 08 3b 04 bb |. .....?D..k.;..|
00000040 fe ff ff ff ff ff 00 ff ff ff 44 eb 0c 20 0f 52 |..........D.. .R|
00000050 10 d8 00 ff d6 49 c5 00 85 df 04 e3 44 03 67 38 |.....I......D.g8|
00000060 30 b0 30 b0 f7 bd d5 5c 4a 9e 29 ff f0 50 f9 85 |0.0....\J.)..P..|
00000070 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
00000080 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
00000090 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
000000a0 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
000000b0 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
000000c0 7f ef ff ff 21 5c dc ff ff ff ff ff ff ff ff ff |....!\..........|
(wrong bit here, 7f should be ff)
000000d0 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
000000e0 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
000000f0 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
00000100 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
00000110 00 36 00 27 9d f9 c0 64 85 cb ff ff ff ff ff ff |.6.'...d........|
00000120
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id
c2253a
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer
macronix
zynq> hexdump -Cv /sys/bus/spi/devices/spi0.0/spi-nor/sfdp
00000000 53 46 44 50 06 01 02 ff 00 06 01 10 30 00 00 ff |SFDP........0...|
00000010 c2 00 01 04 10 01 00 ff 84 00 01 02 c0 00 00 ff |................|
00000020 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
00000030 e5 20 fb ff ff ff ff 1f 44 eb 08 6b 08 3b 04 bb |. ......D..k.;..|
00000040 fe ff ff ff ff ff 00 ff ff ff 44 eb 0c 20 0f 52 |..........D.. .R|
00000050 10 d8 00 ff 87 49 b5 00 82 df 04 e2 44 03 67 38 |.....I......D.g8|
00000060 30 b0 30 b0 f7 bd d5 5c 4a 9e 29 ff f0 50 f9 85 |0.0....\J.)..P..|
00000070 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
00000080 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
00000090 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
000000a0 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
000000b0 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
000000c0 7f 8f ff ff 21 5c dc ff ff ff ff ff ff ff ff ff |....!\..........|
(wrong bit here, 7f should be ff)
000000d0 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
000000e0 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
000000f0 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
00000100 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
00000110 00 20 50 16 9d f9 c0 64 85 cb ff ff ff ff ff ff |. P....d........|
00000120
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id
c2253c
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer
macronix
zynq> hexdump -Cv /sys/bus/spi/devices/spi0.0/spi-nor/sfdp
00000000 53 46 44 50 06 01 02 ff 00 06 01 10 30 00 00 ff |SFDP........0...|
00000010 c2 00 01 04 10 01 00 ff 84 00 01 02 c0 00 00 ff |................|
00000020 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
00000030 e5 20 fb ff ff ff ff 7f 44 eb 08 6b 08 3b 04 bb |. ......D..k.;..|
00000040 fe ff ff ff ff ff 00 ff ff ff 44 eb 0c 20 0f 52 |..........D.. .R|
00000050 10 d8 00 ff 89 49 bd 00 8d 12 00 e2 44 03 67 44 |.....I......D.gD|
00000060 30 b0 30 b0 f7 bd d5 5c 4a 9e 29 ff f0 50 f9 85 |0.0....\J.)..P..|
00000070 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
00000080 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
00000090 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
000000a0 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
000000b0 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
000000c0 7f 8f ff ff 21 5c dc ff ff ff ff ff ff ff ff ff |....!\..........|
(wrong bit here, 7f should be ff)
000000d0 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
000000e0 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
000000f0 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
00000100 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
00000110 00 20 00 17 9d f9 c0 64 85 cb ff ff ff ff ff ff |. .....d........|
00000120
drivers/mtd/spi-nor/macronix.c | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c
index 830da21eea08..ada17999ccbb 100644
--- a/drivers/mtd/spi-nor/macronix.c
+++ b/drivers/mtd/spi-nor/macronix.c
@@ -45,8 +45,26 @@ mx25l25635_post_bfpt_fixups(struct spi_nor *nor,
return 0;
}
+static int
+macronix_qpp4b_post_sfdp_fixups(struct spi_nor *nor)
+{
+ /* PP_1_1_4_4B is supported but missing in 4BAIT. */
+ struct spi_nor_flash_parameter *params = nor->params;
+
+ params->hwcaps.mask |= SNOR_HWCAPS_PP_1_1_4;
+ spi_nor_set_pp_settings(¶ms->page_programs[SNOR_CMD_PP_1_1_4],
+ SPINOR_OP_PP_1_1_4_4B, SNOR_PROTO_1_1_4);
+
+ return 0;
+}
+
static const struct spi_nor_fixups mx25l25635_fixups = {
.post_bfpt = mx25l25635_post_bfpt_fixups,
+ .post_sfdp = macronix_qpp4b_post_sfdp_fixups,
+};
+
+static const struct spi_nor_fixups macronix_qpp4b_fixups = {
+ .post_sfdp = macronix_qpp4b_post_sfdp_fixups,
};
static const struct flash_info macronix_nor_parts[] = {
@@ -102,11 +120,13 @@ static const struct flash_info macronix_nor_parts[] = {
.size = SZ_64M,
.no_sfdp_flags = SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
.fixup_flags = SPI_NOR_4B_OPCODES,
+ .fixups = ¯onix_qpp4b_fixups,
}, {
.id = SNOR_ID(0xc2, 0x20, 0x1b),
.name = "mx66l1g45g",
.size = SZ_128M,
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ .fixups = ¯onix_qpp4b_fixups,
}, {
.id = SNOR_ID(0xc2, 0x23, 0x14),
.name = "mx25v8035f",
@@ -154,18 +174,21 @@ static const struct flash_info macronix_nor_parts[] = {
.size = SZ_64M,
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
.fixup_flags = SPI_NOR_4B_OPCODES,
+ .fixups = ¯onix_qpp4b_fixups,
}, {
.id = SNOR_ID(0xc2, 0x25, 0x3a),
.name = "mx66u51235f",
.size = SZ_64M,
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
.fixup_flags = SPI_NOR_4B_OPCODES,
+ .fixups = ¯onix_qpp4b_fixups,
}, {
.id = SNOR_ID(0xc2, 0x25, 0x3c),
.name = "mx66u2g45g",
.size = SZ_256M,
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
.fixup_flags = SPI_NOR_4B_OPCODES,
+ .fixups = ¯onix_qpp4b_fixups,
}, {
.id = SNOR_ID(0xc2, 0x26, 0x18),
.name = "mx25l12855e",
--
2.25.1
Haven't checked the actual bit, but I trust you you verified thoroughly. Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> On 2/11/25 6:30 AM, Cheng Ming Lin wrote: > .fixup_flags = SPI_NOR_4B_OPCODES, > + .fixups = ¯onix_qpp4b_fixups, For your next patch that'll drop the redundant flash info fields, you can drop SPI_NOR_4B_OPCODES as well if these flashes define the 4bait sfdp table.
On 2/11/25 7:20 AM, Tudor Ambarus wrote: > On 2/11/25 6:30 AM, Cheng Ming Lin wrote: >> .fixup_flags = SPI_NOR_4B_OPCODES, >> + .fixups = ¯onix_qpp4b_fixups, > For your next patch that'll drop the redundant flash info fields, you > can drop SPI_NOR_4B_OPCODES as well if these flashes define the 4bait > sfdp table. Any plan in doing this, please?
Hi Tudor, Tudor Ambarus <tudor.ambarus@linaro.org> 於 2025年3月6日 週四 下午7:01寫道: > > > > On 2/11/25 7:20 AM, Tudor Ambarus wrote: > > On 2/11/25 6:30 AM, Cheng Ming Lin wrote: > >> .fixup_flags = SPI_NOR_4B_OPCODES, > >> + .fixups = ¯onix_qpp4b_fixups, > > For your next patch that'll drop the redundant flash info fields, you > > can drop SPI_NOR_4B_OPCODES as well if these flashes define the 4bait > > sfdp table. > > Any plan in doing this, please? Sorry for the late reply. This matter is currently in progress. Since collecting all the chips will take some more time, the project has been delayed. Once I have all the chips, I will start the verification process immediately. Thanks for the reminder. Thanks, Cheng Ming Lin
On 3/6/25 11:39 AM, Cheng Ming Lin wrote: > Hi Tudor, > > Tudor Ambarus <tudor.ambarus@linaro.org> 於 2025年3月6日 週四 下午7:01寫道: >> >> >> >> On 2/11/25 7:20 AM, Tudor Ambarus wrote: >>> On 2/11/25 6:30 AM, Cheng Ming Lin wrote: >>>> .fixup_flags = SPI_NOR_4B_OPCODES, >>>> + .fixups = ¯onix_qpp4b_fixups, >>> For your next patch that'll drop the redundant flash info fields, you >>> can drop SPI_NOR_4B_OPCODES as well if these flashes define the 4bait >>> sfdp table. >> >> Any plan in doing this, please? > > Sorry for the late reply. > > This matter is currently in progress. Since collecting all the chips > will take some more time, the project has been delayed. Once I > have all the chips, I will start the verification process immediately. > Thanks for the reminder. > Thanks, Cheng. Switching them one by one is fine too.
Hi Tudor, Tudor Ambarus <tudor.ambarus@linaro.org> 於 2025年3月6日 週四 下午10:42寫道: > > > > On 3/6/25 11:39 AM, Cheng Ming Lin wrote: > > Hi Tudor, > > > > Tudor Ambarus <tudor.ambarus@linaro.org> 於 2025年3月6日 週四 下午7:01寫道: > >> > >> > >> > >> On 2/11/25 7:20 AM, Tudor Ambarus wrote: > >>> On 2/11/25 6:30 AM, Cheng Ming Lin wrote: > >>>> .fixup_flags = SPI_NOR_4B_OPCODES, > >>>> + .fixups = ¯onix_qpp4b_fixups, > >>> For your next patch that'll drop the redundant flash info fields, you > >>> can drop SPI_NOR_4B_OPCODES as well if these flashes define the 4bait > >>> sfdp table. > >> > >> Any plan in doing this, please? > > > > Sorry for the late reply. > > > > This matter is currently in progress. Since collecting all the chips > > will take some more time, the project has been delayed. Once I > > have all the chips, I will start the verification process immediately. > > Thanks for the reminder. > > > > Thanks, Cheng. Switching them one by one is fine too. Got it, no problem. I will start the verification with the chips I have on hand. Thanks, Cheng Ming Lin
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