From: Cheng Ming Lin <chengminglin@mxic.com.tw>
Although certain Macronix NOR flash support the Quad Input Page Program
feature, the corresponding information in the 4-byte Address Instruction
Table of these flash is not properly filled. As a result, this feature
cannot be enabled as expected.
To address this issue, a post_sfdp fixups implementation is required to
correct the missing information.
Signed-off-by: Cheng Ming Lin <chengminglin@mxic.com.tw>
---
drivers/mtd/spi-nor/macronix.c | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c
index 830da21eea08..ada17999ccbb 100644
--- a/drivers/mtd/spi-nor/macronix.c
+++ b/drivers/mtd/spi-nor/macronix.c
@@ -45,8 +45,26 @@ mx25l25635_post_bfpt_fixups(struct spi_nor *nor,
return 0;
}
+static int
+macronix_qpp4b_post_sfdp_fixups(struct spi_nor *nor)
+{
+ /* PP_1_1_4_4B is supported but missing in 4BAIT. */
+ struct spi_nor_flash_parameter *params = nor->params;
+
+ params->hwcaps.mask |= SNOR_HWCAPS_PP_1_1_4;
+ spi_nor_set_pp_settings(¶ms->page_programs[SNOR_CMD_PP_1_1_4],
+ SPINOR_OP_PP_1_1_4_4B, SNOR_PROTO_1_1_4);
+
+ return 0;
+}
+
static const struct spi_nor_fixups mx25l25635_fixups = {
.post_bfpt = mx25l25635_post_bfpt_fixups,
+ .post_sfdp = macronix_qpp4b_post_sfdp_fixups,
+};
+
+static const struct spi_nor_fixups macronix_qpp4b_fixups = {
+ .post_sfdp = macronix_qpp4b_post_sfdp_fixups,
};
static const struct flash_info macronix_nor_parts[] = {
@@ -102,11 +120,13 @@ static const struct flash_info macronix_nor_parts[] = {
.size = SZ_64M,
.no_sfdp_flags = SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
.fixup_flags = SPI_NOR_4B_OPCODES,
+ .fixups = ¯onix_qpp4b_fixups,
}, {
.id = SNOR_ID(0xc2, 0x20, 0x1b),
.name = "mx66l1g45g",
.size = SZ_128M,
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ .fixups = ¯onix_qpp4b_fixups,
}, {
.id = SNOR_ID(0xc2, 0x23, 0x14),
.name = "mx25v8035f",
@@ -154,18 +174,21 @@ static const struct flash_info macronix_nor_parts[] = {
.size = SZ_64M,
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
.fixup_flags = SPI_NOR_4B_OPCODES,
+ .fixups = ¯onix_qpp4b_fixups,
}, {
.id = SNOR_ID(0xc2, 0x25, 0x3a),
.name = "mx66u51235f",
.size = SZ_64M,
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
.fixup_flags = SPI_NOR_4B_OPCODES,
+ .fixups = ¯onix_qpp4b_fixups,
}, {
.id = SNOR_ID(0xc2, 0x25, 0x3c),
.name = "mx66u2g45g",
.size = SZ_256M,
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
.fixup_flags = SPI_NOR_4B_OPCODES,
+ .fixups = ¯onix_qpp4b_fixups,
}, {
.id = SNOR_ID(0xc2, 0x26, 0x18),
.name = "mx25l12855e",
--
2.25.1
Hi, Cheng, On 2/7/25 8:18 AM, Cheng Ming Lin wrote: > Although certain Macronix NOR flash support the Quad Input Page Program > feature, the corresponding information in the 4-byte Address Instruction > Table of these flash is not properly filled. As a result, this feature > cannot be enabled as expected. You need to prove that all the flashes that you touch need this fixup, i.e. dump their SFDP and show where's the wrong bit in the SFDP table. Identifying wrong bit in the SFDP tables would be easy to spot if we had a SFDP decoder. Something that we all agree that'd be a good thing to have, but nobody can allocate time to do it. Pratyush I remember has started a draft. Are you interested in introducing a SFDP decoder in mtd-utils? Also, if you touch all these flashes, will you please update them and get rid of the stray flash info fields? I'm thinking of name, size, and no_sfdp_flags. Cheers, ta
Hi Tudor, Tudor Ambarus <tudor.ambarus@linaro.org> 於 2025年2月7日 週五 下午4:37寫道: > > Hi, Cheng, > > On 2/7/25 8:18 AM, Cheng Ming Lin wrote: > > Although certain Macronix NOR flash support the Quad Input Page Program > > feature, the corresponding information in the 4-byte Address Instruction > > Table of these flash is not properly filled. As a result, this feature > > cannot be enabled as expected. > > You need to prove that all the flashes that you touch need this fixup, > i.e. dump their SFDP and show where's the wrong bit in the SFDP table. Okay, I will dump the SFDP for each of them and point out the specific errors in the SFDP tables. > > Identifying wrong bit in the SFDP tables would be easy to spot if we had > a SFDP decoder. Something that we all agree that'd be a good thing to > have, but nobody can allocate time to do it. Pratyush I remember has > started a draft. Are you interested in introducing a SFDP decoder in > mtd-utils? > > Also, if you touch all these flashes, will you please update them and > get rid of the stray flash info fields? I'm thinking of name, size, and > no_sfdp_flags. No problem. Would removing these stray flash info fields from the Macronix flash warrant a separate patch series, or should it be included with the current changes? > > Cheers, > ta Thanks, Cheng Ming Lin
On 2/10/25 3:27 AM, Cheng Ming Lin wrote: >> Also, if you touch all these flashes, will you please update them and >> get rid of the stray flash info fields? I'm thinking of name, size, and >> no_sfdp_flags. > No problem. Would removing these stray flash info fields from the > Macronix flash warrant a separate patch series, or should it be included > with the current changes? separate patch please, because removing those fields may introduce regressions if SFDP data is not sane. You'll need to do the usual mandatory tests when removing these fields too. But it's worth it, you'll have cleaner code paths. Thanks!
Hi Tudor, Tudor Ambarus <tudor.ambarus@linaro.org> 於 2025年2月10日 週一 下午3:48寫道: > > > > On 2/10/25 3:27 AM, Cheng Ming Lin wrote: > >> Also, if you touch all these flashes, will you please update them and > >> get rid of the stray flash info fields? I'm thinking of name, size, and > >> no_sfdp_flags. > > No problem. Would removing these stray flash info fields from the > > Macronix flash warrant a separate patch series, or should it be included > > with the current changes? > > separate patch please, because removing those fields may introduce > regressions if SFDP data is not sane. You'll need to do the usual > mandatory tests when removing these fields too. But it's worth it, > you'll have cleaner code paths. Thanks! Understood. I will submit a separate patch series to remove those fields, as you suggested. Thank you for your guidance. Thanks, Cheng Ming Lin
On Fri, Feb 07 2025, Tudor Ambarus wrote:
> Hi, Cheng,
>
> On 2/7/25 8:18 AM, Cheng Ming Lin wrote:
>> Although certain Macronix NOR flash support the Quad Input Page Program
>> feature, the corresponding information in the 4-byte Address Instruction
>> Table of these flash is not properly filled. As a result, this feature
>> cannot be enabled as expected.
>
> You need to prove that all the flashes that you touch need this fixup,
> i.e. dump their SFDP and show where's the wrong bit in the SFDP table.
>
> Identifying wrong bit in the SFDP tables would be easy to spot if we had
> a SFDP decoder. Something that we all agree that'd be a good thing to
> have, but nobody can allocate time to do it. Pratyush I remember has
> started a draft. Are you interested in introducing a SFDP decoder in
> mtd-utils?
Yes, will do. For now, you can find it here [0]. It doesn't yet support
all the tables but does have the basic ones. Feel free to give it a spin
and let me know if you find any bugs or issues.
I ran it on the SFDP for the first flash in the cover letter and this is
what it says:
--------------------------------
4-byte Address Instruction Table
--------------------------------
ID: 0xff84
Major Version: 0x1
Minor Version: 0x0
Length (in bytes): 0x08
+--------------------------------------------------------------------------------------------------+
| DWORD 1 |
+-------+---------------------------------------------------------------------------------+--------+
| Bits | Description | Value |
+-------+---------------------------------------------------------------------------------+--------+
| 0 | Support for (1S-1S-1S) READ Command, Instruction=13h | 0b1 |
| 1 | Support for (1S-1S-1S) FAST_READ Command, Instruction=0Ch | 0b1 |
| 2 | Support for (1S-1S-2S) FAST_READ Command, Instruction=3Ch | 0b1 |
| 3 | Support for (1S-2S-2S) FAST_READ Command, Instruction=BCh | 0b1 |
| 4 | Support for (1S-1S-4S) FAST_READ Command, Instruction=6Ch | 0b1 |
| 5 | Support for (1S-4S-4S) FAST_READ Command, Instruction=ECh | 0b1 |
| 6 | Support for (1S-1S-1S) Page Program Command, Instruction=12h | 0b1 |
| 7 | Support for (1S-1S-4S) Page Program Command, Instruction=34h | 0b0 |
| 8 | Support for (1S-4S-4S) Page Program Command, Instruction=3Eh | 0b1 |
| 9 | Support for Erase Command – Type 1 size, Instruction lookup in next Dword | 0b1 |
| 10 | Support for Erase Command – Type 2 size, Instruction lookup in next Dword | 0b1 |
| 11 | Support for Erase Command – Type 3 size, Instruction lookup in next Dword | 0b1 |
| 12 | Support for Erase Command – Type 4 size, Instruction lookup in next Dword | 0b0 |
| 13 | Support for (1S-1D-1D) DTR_Read Command, Instruction=0Eh | 0b0 |
| 14 | Support for (1S-2D-2D) DTR_Read Command, Instruction=BEh | 0b0 |
| 15 | Support for (1S-4D-4D) DTR_Read Command, Instruction=EEh | 0b1 |
| 16 | Support for volatile individual sector lock Read command, Instruction=E0h | 0b1 |
| 17 | Support for volatile individual sector lock Write command, Instruction=E1h | 0b1 |
| 18 | Support for non-volatile individual sector lock read command, Instruction=E2h | 0b1 |
| 19 | Support for non-volatile individual sector lock write command, Instruction=E3h | 0b1 |
| 20 | Support for (1S-1S-8S) FAST_READ Command, Instruction=7Ch | 0b1 |
| 21 | Support for (1S-8S-8S) FAST_READ Command, Instruction=CCh | 0b1 |
| 22 | Support for (1S-8D-8D) DTR_READ Command, Instruction=FDh | 0b1 |
| 23 | Support for (1S-1S-8S) Page Program Command, Instruction=84h | 0b1 |
| 24 | Support for (1S-8S-8S) Page Program Command, Instruction=8Eh | 0b1 |
| 31:25 | Reserved | 0x7f |
+-------+---------------------------------------------------------------------------------+--------+
+--------------------------------------------------------------------------------------------------+
| DWORD 2 |
+-------------+--------------------------------------------------------------------+---------------+
| Bits | Description | Value |
+-------------+--------------------------------------------------------------------+---------------+
| 7:0 | Instruction for Erase Type 1 | 0x21 |
| 15:8 | Instruction for Erase Type 2 | 0x5c |
| 23:16 | Instruction for Erase Type 3 | 0xdc |
| 31:24 | Instruction for Erase Type 4 | 0xff |
+-------------+--------------------------------------------------------------------+---------------+
>
> Also, if you touch all these flashes, will you please update them and
> get rid of the stray flash info fields? I'm thinking of name, size, and
> no_sfdp_flags.
>
[0] https://github.com/prati0100/parse-sfdp.git
--
Regards,
Pratyush Yadav
Hi Cheng,
> Although certain Macronix NOR flash support the Quad Input Page Program
> feature, the corresponding information in the 4-byte Address
> Instruction
> Table of these flash is not properly filled. As a result, this feature
> cannot be enabled as expected.
>
> To address this issue, a post_sfdp fixups implementation is required to
> correct the missing information.
>
> Signed-off-by: Cheng Ming Lin <chengminglin@mxic.com.tw>
> ---
> drivers/mtd/spi-nor/macronix.c | 23 +++++++++++++++++++++++
> 1 file changed, 23 insertions(+)
>
> diff --git a/drivers/mtd/spi-nor/macronix.c
> b/drivers/mtd/spi-nor/macronix.c
> index 830da21eea08..ada17999ccbb 100644
> --- a/drivers/mtd/spi-nor/macronix.c
> +++ b/drivers/mtd/spi-nor/macronix.c
> @@ -45,8 +45,26 @@ mx25l25635_post_bfpt_fixups(struct spi_nor *nor,
> return 0;
> }
>
> +static int
> +macronix_qpp4b_post_sfdp_fixups(struct spi_nor *nor)
> +{
> + /* PP_1_1_4_4B is supported but missing in 4BAIT. */
> + struct spi_nor_flash_parameter *params = nor->params;
> +
> + params->hwcaps.mask |= SNOR_HWCAPS_PP_1_1_4;
> + spi_nor_set_pp_settings(¶ms->page_programs[SNOR_CMD_PP_1_1_4],
> + SPINOR_OP_PP_1_1_4_4B, SNOR_PROTO_1_1_4);
> +
> + return 0;
> +}
> +
> static const struct spi_nor_fixups mx25l25635_fixups = {
> .post_bfpt = mx25l25635_post_bfpt_fixups,
> + .post_sfdp = macronix_qpp4b_post_sfdp_fixups,
> +};
> +
> +static const struct spi_nor_fixups macronix_qpp4b_fixups = {
> + .post_sfdp = macronix_qpp4b_post_sfdp_fixups,
> };
>
> static const struct flash_info macronix_nor_parts[] = {
> @@ -102,11 +120,13 @@ static const struct flash_info
> macronix_nor_parts[] = {
> .size = SZ_64M,
> .no_sfdp_flags = SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
> .fixup_flags = SPI_NOR_4B_OPCODES,
> + .fixups = ¯onix_qpp4b_fixups,
> }, {
> .id = SNOR_ID(0xc2, 0x20, 0x1b),
> .name = "mx66l1g45g",
> .size = SZ_128M,
> .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
> + .fixups = ¯onix_qpp4b_fixups,
> }, {
> .id = SNOR_ID(0xc2, 0x23, 0x14),
> .name = "mx25v8035f",
> @@ -154,18 +174,21 @@ static const struct flash_info
> macronix_nor_parts[] = {
> .size = SZ_64M,
> .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
> .fixup_flags = SPI_NOR_4B_OPCODES,
> + .fixups = ¯onix_qpp4b_fixups,
> }, {
> .id = SNOR_ID(0xc2, 0x25, 0x3a),
> .name = "mx66u51235f",
> .size = SZ_64M,
> .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
> .fixup_flags = SPI_NOR_4B_OPCODES,
> + .fixups = ¯onix_qpp4b_fixups,
> }, {
> .id = SNOR_ID(0xc2, 0x25, 0x3c),
> .name = "mx66u2g45g",
> .size = SZ_256M,
> .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
> .fixup_flags = SPI_NOR_4B_OPCODES,
> + .fixups = ¯onix_qpp4b_fixups,
> }, {
> .id = SNOR_ID(0xc2, 0x26, 0x18),
> .name = "mx25l12855e",
Could you also please share the SFDP dumps of these flashes with us?
Thanks,
-michael
Hi Michael,
Michael Walle <mwalle@kernel.org> 於 2025年2月7日 週五 下午4:36寫道:
>
> Hi Cheng,
>
> > Although certain Macronix NOR flash support the Quad Input Page Program
> > feature, the corresponding information in the 4-byte Address
> > Instruction
> > Table of these flash is not properly filled. As a result, this feature
> > cannot be enabled as expected.
> >
> > To address this issue, a post_sfdp fixups implementation is required to
> > correct the missing information.
> >
> > Signed-off-by: Cheng Ming Lin <chengminglin@mxic.com.tw>
> > ---
> > drivers/mtd/spi-nor/macronix.c | 23 +++++++++++++++++++++++
> > 1 file changed, 23 insertions(+)
> >
> > diff --git a/drivers/mtd/spi-nor/macronix.c
> > b/drivers/mtd/spi-nor/macronix.c
> > index 830da21eea08..ada17999ccbb 100644
> > --- a/drivers/mtd/spi-nor/macronix.c
> > +++ b/drivers/mtd/spi-nor/macronix.c
> > @@ -45,8 +45,26 @@ mx25l25635_post_bfpt_fixups(struct spi_nor *nor,
> > return 0;
> > }
> >
> > +static int
> > +macronix_qpp4b_post_sfdp_fixups(struct spi_nor *nor)
> > +{
> > + /* PP_1_1_4_4B is supported but missing in 4BAIT. */
> > + struct spi_nor_flash_parameter *params = nor->params;
> > +
> > + params->hwcaps.mask |= SNOR_HWCAPS_PP_1_1_4;
> > + spi_nor_set_pp_settings(¶ms->page_programs[SNOR_CMD_PP_1_1_4],
> > + SPINOR_OP_PP_1_1_4_4B, SNOR_PROTO_1_1_4);
> > +
> > + return 0;
> > +}
> > +
> > static const struct spi_nor_fixups mx25l25635_fixups = {
> > .post_bfpt = mx25l25635_post_bfpt_fixups,
> > + .post_sfdp = macronix_qpp4b_post_sfdp_fixups,
> > +};
> > +
> > +static const struct spi_nor_fixups macronix_qpp4b_fixups = {
> > + .post_sfdp = macronix_qpp4b_post_sfdp_fixups,
> > };
> >
> > static const struct flash_info macronix_nor_parts[] = {
> > @@ -102,11 +120,13 @@ static const struct flash_info
> > macronix_nor_parts[] = {
> > .size = SZ_64M,
> > .no_sfdp_flags = SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
> > .fixup_flags = SPI_NOR_4B_OPCODES,
> > + .fixups = ¯onix_qpp4b_fixups,
> > }, {
> > .id = SNOR_ID(0xc2, 0x20, 0x1b),
> > .name = "mx66l1g45g",
> > .size = SZ_128M,
> > .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
> > + .fixups = ¯onix_qpp4b_fixups,
> > }, {
> > .id = SNOR_ID(0xc2, 0x23, 0x14),
> > .name = "mx25v8035f",
> > @@ -154,18 +174,21 @@ static const struct flash_info
> > macronix_nor_parts[] = {
> > .size = SZ_64M,
> > .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
> > .fixup_flags = SPI_NOR_4B_OPCODES,
> > + .fixups = ¯onix_qpp4b_fixups,
> > }, {
> > .id = SNOR_ID(0xc2, 0x25, 0x3a),
> > .name = "mx66u51235f",
> > .size = SZ_64M,
> > .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
> > .fixup_flags = SPI_NOR_4B_OPCODES,
> > + .fixups = ¯onix_qpp4b_fixups,
> > }, {
> > .id = SNOR_ID(0xc2, 0x25, 0x3c),
> > .name = "mx66u2g45g",
> > .size = SZ_256M,
> > .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
> > .fixup_flags = SPI_NOR_4B_OPCODES,
> > + .fixups = ¯onix_qpp4b_fixups,
> > }, {
> > .id = SNOR_ID(0xc2, 0x26, 0x18),
> > .name = "mx25l12855e",
>
> Could you also please share the SFDP dumps of these flashes with us?
Certainly, I can share the SFDP dumps of these flashes with you.
I will send them over shortly.
>
> Thanks,
> -michael
Thanks,
Cheng Ming Lin
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