Radxa Rock 5C supports both CRU-based (default) and PMIC-based reset
upon thermal runaway conditions. The former resets the SoC by internally
poking the CRU from TSADC, while the latter power-cycles the whole board
by pulling the PMIC reset line low in case of uncontrolled overheating.

Switch to a PMIC-based reset, as the more 'thorough' of the two.

Tested by temporarily setting rockchip,hw-tshut-temp to 65C to simulate
overheating - this causes the board to reset when any of the on-chip
temperature sensors surpasses the tshut temperature.

Requires Alexander's patch [1] fixing TSADC pinctrl assignment

[1] https://lore.kernel.org/r/20250130053849.4902-1-eagle.alexander923@gmail.com

Signed-off-by: Alexey Charkov <alchark@gmail.com>
---
 arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts
index 6e56d7704cbe0dc06242cb39df56b2fc9d6bc774..00b2d87a6bce4af883a3e7c7e606ea5b96c68b19 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts
@@ -873,6 +873,8 @@ regulator-state-mem {
 };
 
 &tsadc {
+	rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
+	rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
 	status = "okay";
 };
 

---
base-commit: 6399b505aad2531d6244f3e943ad384b56095710
change-id: 20250204-rock-5c-tshut-15c6b8f96e42

Best regards,
-- 
Alexey Charkov <alchark@gmail.com>

On Tue, 04 Feb 2025 13:02:28 +0400, Alexey Charkov wrote:
> Radxa Rock 5C supports both CRU-based (default) and PMIC-based reset
> upon thermal runaway conditions. The former resets the SoC by internally
> poking the CRU from TSADC, while the latter power-cycles the whole board
> by pulling the PMIC reset line low in case of uncontrolled overheating.
> 
> Switch to a PMIC-based reset, as the more 'thorough' of the two.
> 
> [...]

Applied, thanks!

[1/1] arm64: dts: rockchip: switch Rock 5C to PMIC-based TSHUT reset
      commit: b2e537749524f09ae34e9e11a5f020eccc8aff22

Best regards,
-- 
Heiko Stuebner <heiko@sntech.de>

Hello Alexey,

On 2025-02-04 10:02, Alexey Charkov wrote:
> Radxa Rock 5C supports both CRU-based (default) and PMIC-based reset
> upon thermal runaway conditions. The former resets the SoC by 
> internally
> poking the CRU from TSADC, while the latter power-cycles the whole 
> board
> by pulling the PMIC reset line low in case of uncontrolled overheating.
> 
> Switch to a PMIC-based reset, as the more 'thorough' of the two.
> 
> Tested by temporarily setting rockchip,hw-tshut-temp to 65C to simulate
> overheating - this causes the board to reset when any of the on-chip
> temperature sensors surpasses the tshut temperature.
> 
> Requires Alexander's patch [1] fixing TSADC pinctrl assignment
> 
> [1] 
> https://lore.kernel.org/r/20250130053849.4902-1-eagle.alexander923@gmail.com
> 
> Signed-off-by: Alexey Charkov <alchark@gmail.com>
> ---
>  arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts
> b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts
> index
> 6e56d7704cbe0dc06242cb39df56b2fc9d6bc774..00b2d87a6bce4af883a3e7c7e606ea5b96c68b19
> 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts
> @@ -873,6 +873,8 @@ regulator-state-mem {
>  };
> 
>  &tsadc {
> +	rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
> +	rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
>  	status = "okay";
>  };

Looking good to me, thanks for the patch!  I just went through
the Radxa ROCK 5C schematic and it all matches these DT additions.
Thus, please feel free to include:

Reviewed-by: Dragan Simic <dsimic@manjaro.org>