Provide dt-schema documentation for Exynos7870 SoC clock controller.
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
---
.../bindings/clock/samsung,exynos7870-clock.yaml | 246 +++++++++++++++++++++
1 file changed, 246 insertions(+)
diff --git a/Documentation/devicetree/bindings/clock/samsung,exynos7870-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynos7870-clock.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..697e03ca191d685b71672d35257b022c663244ed
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/samsung,exynos7870-clock.yaml
@@ -0,0 +1,246 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/samsung,exynos7870-clock.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Samsung Exynos7870 SoC clock controller
+
+maintainers:
+ - Chanwoo Choi <cw00.choi@samsung.com>
+ - Krzysztof Kozlowski <krzk@kernel.org>
+ - Sylwester Nawrocki <s.nawrocki@samsung.com>
+ - Tomasz Figa <tomasz.figa@gmail.com>
+
+description: |
+ Exynos7870 clock controller is comprised of several CMU units, generating
+ clocks for different domains. Those CMU units are modeled as separate device
+ tree nodes, and might depend on each other. The root clock in that root tree
+ is an external clock: OSCCLK (26 MHz). This external clock must be defined
+ as a fixed-rate clock in dts.
+
+ Each clock is assigned an identifier and client nodes can use this identifier
+ to specify the clock which they consume. All clocks available for usage
+ in clock consumer nodes are defined as preprocessor macros in
+ 'dt-bindings/clock/exynos7870.h' header.
+
+properties:
+ compatible:
+ enum:
+ - samsung,exynos7870-cmu-mif
+ - samsung,exynos7870-cmu-dispaud
+ - samsung,exynos7870-cmu-fsys
+ - samsung,exynos7870-cmu-g3d
+ - samsung,exynos7870-cmu-isp
+ - samsung,exynos7870-cmu-mfcmscl
+ - samsung,exynos7870-cmu-peri
+
+ clocks:
+ minItems: 1
+ maxItems: 10
+
+ clock-names:
+ minItems: 1
+ maxItems: 10
+
+ "#clock-cells":
+ const: 1
+
+ reg:
+ maxItems: 1
+
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: samsung,exynos7870-cmu-mif
+
+ then:
+ properties:
+ clocks:
+ items:
+ - description: External reference clock (26 MHz)
+
+ clock-names:
+ items:
+ - const: oscclk
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: samsung,exynos7870-cmu-dispaud
+
+ then:
+ properties:
+ clocks:
+ items:
+ - description: External reference clock (26 MHz)
+ - description: CMU_DISPAUD bus clock (from CMU_MIF)
+ - description: DECON external clock (from CMU_MIF)
+ - description: DECON vertical clock (from CMU_MIF)
+
+ clock-names:
+ items:
+ - const: oscclk
+ - const: gout_mif_cmu_dispaud_bus
+ - const: gout_mif_cmu_dispaud_decon_eclk
+ - const: gout_mif_cmu_dispaud_decon_vclk
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: samsung,exynos7870-cmu-fsys
+
+ then:
+ properties:
+ clocks:
+ items:
+ - description: External reference clock (26 MHz)
+ - description: CMU_FSYS bus clock (from CMU_MIF)
+ - description: USB20DRD clock (from CMU_MIF)
+
+ clock-names:
+ items:
+ - const: oscclk
+ - const: gout_mif_cmu_fsys_bus
+ - const: gout_mif_cmu_fsys_usb20drd_refclk
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: samsung,exynos7870-cmu-g3d
+
+ then:
+ properties:
+ clocks:
+ items:
+ - description: External reference clock (26 MHz)
+ - description: G3D switch clock (from CMU_MIF)
+
+ clock-names:
+ items:
+ - const: oscclk
+ - const: gout_mif_cmu_g3d_switch
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: samsung,exynos7870-cmu-isp
+
+ then:
+ properties:
+ clocks:
+ items:
+ - description: External reference clock (26 MHz)
+ - description: ISP camera clock (from CMU_MIF)
+ - description: ISP clock (from CMU_MIF)
+ - description: ISP VRA clock (from CMU_MIF)
+
+ clock-names:
+ items:
+ - const: oscclk
+ - const: gout_mif_cmu_isp_cam
+ - const: gout_mif_cmu_isp_isp
+ - const: gout_mif_cmu_isp_vra
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: samsung,exynos7870-cmu-mfcmscl
+
+ then:
+ properties:
+ clocks:
+ items:
+ - description: External reference clock (26 MHz)
+ - description: MSCL clock (from CMU_MIF)
+ - description: MFC clock (from CMU_MIF)
+
+ clock-names:
+ items:
+ - const: oscclk
+ - const: gout_mif_cmu_mfcmscl_mfc
+ - const: gout_mif_cmu_mfcmscl_mscl
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: samsung,exynos7870-cmu-peri
+
+ then:
+ properties:
+ clocks:
+ items:
+ - description: External reference clock (26 MHz)
+ - description: CMU_PERI bus clock (from CMU_MIF)
+ - description: SPI0 clock (from CMU_MIF)
+ - description: SPI1 clock (from CMU_MIF)
+ - description: SPI2 clock (from CMU_MIF)
+ - description: SPI3 clock (from CMU_MIF)
+ - description: SPI4 clock (from CMU_MIF)
+ - description: UART0 clock (from CMU_MIF)
+ - description: UART1 clock (from CMU_MIF)
+ - description: UART2 clock (from CMU_MIF)
+
+ clock-names:
+ items:
+ - const: oscclk
+ - const: gout_mif_cmu_peri_bus
+ - const: gout_mif_cmu_peri_spi0
+ - const: gout_mif_cmu_peri_spi1
+ - const: gout_mif_cmu_peri_spi2
+ - const: gout_mif_cmu_peri_spi3
+ - const: gout_mif_cmu_peri_spi4
+ - const: gout_mif_cmu_peri_uart0
+ - const: gout_mif_cmu_peri_uart1
+ - const: gout_mif_cmu_peri_uart2
+
+required:
+ - compatible
+ - "#clock-cells"
+ - clocks
+ - clock-names
+ - reg
+
+additionalProperties: false
+
+examples:
+ # Clock controller node for CMU_PERI
+ - |
+ #include <dt-bindings/clock/exynos7870.h>
+
+ cmu_peri: clock-controller@101F0000 {
+ compatible = "samsung,exynos7870-cmu-peri";
+ reg = <0x101f0000 0x1000>;
+ #clock-cells = <1>;
+
+ clock-names = "oscclk",
+ "gout_mif_cmu_peri_bus",
+ "gout_mif_cmu_peri_spi0",
+ "gout_mif_cmu_peri_spi1",
+ "gout_mif_cmu_peri_spi2",
+ "gout_mif_cmu_peri_spi3",
+ "gout_mif_cmu_peri_spi4",
+ "gout_mif_cmu_peri_uart0",
+ "gout_mif_cmu_peri_uart1",
+ "gout_mif_cmu_peri_uart2";
+ clocks = <&oscclk>,
+ <&cmu_mif CLK_GOUT_MIF_CMU_PERI_BUS>,
+ <&cmu_mif CLK_GOUT_MIF_CMU_PERI_SPI0>,
+ <&cmu_mif CLK_GOUT_MIF_CMU_PERI_SPI1>,
+ <&cmu_mif CLK_GOUT_MIF_CMU_PERI_SPI2>,
+ <&cmu_mif CLK_GOUT_MIF_CMU_PERI_SPI3>,
+ <&cmu_mif CLK_GOUT_MIF_CMU_PERI_SPI4>,
+ <&cmu_mif CLK_GOUT_MIF_CMU_PERI_UART0>,
+ <&cmu_mif CLK_GOUT_MIF_CMU_PERI_UART1>,
+ <&cmu_mif CLK_GOUT_MIF_CMU_PERI_UART2>;
+ };
+
+...
--
2.48.1On Tue, Feb 04, 2025 at 02:07:30AM +0530, Kaustabh Chakraborty wrote: > Provide dt-schema documentation for Exynos7870 SoC clock controller. > > Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org> > --- > .../bindings/clock/samsung,exynos7870-clock.yaml | 246 +++++++++++++++++++++ > 1 file changed, 246 insertions(+) > > diff --git a/Documentation/devicetree/bindings/clock/samsung,exynos7870-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynos7870-clock.yaml > new file mode 100644 > index 0000000000000000000000000000000000000000..697e03ca191d685b71672d35257b022c663244ed > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/samsung,exynos7870-clock.yaml > @@ -0,0 +1,246 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/clock/samsung,exynos7870-clock.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Samsung Exynos7870 SoC clock controller > + > +maintainers: > + - Chanwoo Choi <cw00.choi@samsung.com> > + - Krzysztof Kozlowski <krzk@kernel.org> > + - Sylwester Nawrocki <s.nawrocki@samsung.com> > + - Tomasz Figa <tomasz.figa@gmail.com> This should be someone responsible for this device rather. > + > +description: | > + Exynos7870 clock controller is comprised of several CMU units, generating > + clocks for different domains. Those CMU units are modeled as separate device > + tree nodes, and might depend on each other. The root clock in that root tree > + is an external clock: OSCCLK (26 MHz). This external clock must be defined > + as a fixed-rate clock in dts. > + > + Each clock is assigned an identifier and client nodes can use this identifier > + to specify the clock which they consume. All clocks available for usage > + in clock consumer nodes are defined as preprocessor macros in > + 'dt-bindings/clock/exynos7870.h' header. > + > +properties: > + compatible: > + enum: > + - samsung,exynos7870-cmu-mif > + - samsung,exynos7870-cmu-dispaud > + - samsung,exynos7870-cmu-fsys > + - samsung,exynos7870-cmu-g3d > + - samsung,exynos7870-cmu-isp > + - samsung,exynos7870-cmu-mfcmscl > + - samsung,exynos7870-cmu-peri > + > + clocks: > + minItems: 1 > + maxItems: 10 > + > + clock-names: > + minItems: 1 > + maxItems: 10 > + > + "#clock-cells": > + const: 1 > + > + reg: > + maxItems: 1 > + > +allOf: > + - if: > + properties: > + compatible: > + contains: > + const: samsung,exynos7870-cmu-mif > + > + then: > + properties: > + clocks: > + items: > + - description: External reference clock (26 MHz) > + > + clock-names: > + items: > + - const: oscclk > + > + - if: > + properties: > + compatible: > + contains: > + const: samsung,exynos7870-cmu-dispaud > + > + then: > + properties: > + clocks: > + items: > + - description: External reference clock (26 MHz) > + - description: CMU_DISPAUD bus clock (from CMU_MIF) > + - description: DECON external clock (from CMU_MIF) > + - description: DECON vertical clock (from CMU_MIF) > + > + clock-names: > + items: > + - const: oscclk > + - const: gout_mif_cmu_dispaud_busa We switched some time ago to what is usually recommended, so purpose of the clock, not the actual source clock name. See Exynos8895. I do not see any of my other comments implemented and you sent it AFTER I replied already. Also, this is not v1, but v2. Implement the feedback, add proper changelog and version the patches. Best regards, Krzysztof
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