.../bindings/dma/atmel,at91sam9g45-dma.yaml | 66 ++++++++++++++++++++++ .../devicetree/bindings/dma/atmel-dma.txt | 42 -------------- .../devicetree/bindings/misc/atmel-ssc.txt | 2 +- MAINTAINERS | 2 +- 4 files changed, 68 insertions(+), 44 deletions(-)
From: Durai Manickam KR <durai.manickamkr@microchip.com>
Add a description, required properties, appropriate compatibles and
missing properties like clocks and clock-names which are not defined in
the text binding for all the SoCs that are supported by microchip.
Update the text binding name `atmel-dma.txt` to
`atmel,at91sam9g45-dma.yaml` for the files which reference to
`atmel-dma.txt`. Drop Tudor name from maintainers.
Signed-off-by: Durai Manickam KR <durai.manickamkr@microchip.com>
Signed-off-by: Charan Pedumuru <charan.pedumuru@microchip.com>
---
Changes in v3:
- Renamed the text binding name `atmel-dma.txt` to
`atmel,at91sam9g45-dma.yaml` for the files which reference to
`atmel-dma.txt`.
- Removed `oneOf` and add a blank line in properties.
- Dropped Tudor name from maintainers.
- Link to v2: https://lore.kernel.org/r/20250123-dma-v1-1-054f1a77e733@microchip.com
Changes in v2:
- Renamed the yaml file to a compatible.
- Removed `|` and description for common properties.
- Modified the commit message.
- Dropped the label for the node in examples.
- Link to v1: https://lore.kernel.org/all/20240215-dmac-v1-1-8f1c6f031c98@microchip.com
---
.../bindings/dma/atmel,at91sam9g45-dma.yaml | 66 ++++++++++++++++++++++
.../devicetree/bindings/dma/atmel-dma.txt | 42 --------------
.../devicetree/bindings/misc/atmel-ssc.txt | 2 +-
MAINTAINERS | 2 +-
4 files changed, 68 insertions(+), 44 deletions(-)
diff --git a/Documentation/devicetree/bindings/dma/atmel,at91sam9g45-dma.yaml b/Documentation/devicetree/bindings/dma/atmel,at91sam9g45-dma.yaml
new file mode 100644
index 000000000000..d6d16869b7db
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/atmel,at91sam9g45-dma.yaml
@@ -0,0 +1,66 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/dma/atmel,at91sam9g45-dma.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Atmel Direct Memory Access Controller (DMA)
+
+maintainers:
+ - Ludovic Desroches <ludovic.desroches@microchip.com>
+
+description:
+ The Atmel Direct Memory Access Controller (DMAC) transfers data from a source
+ peripheral to a destination peripheral over one or more AMBA buses. One channel
+ is required for each source/destination pair. In the most basic configuration,
+ the DMAC has one master interface and one channel. The master interface reads
+ the data from a source and writes it to a destination. Two AMBA transfers are
+ required for each DMAC data transfer. This is also known as a dual-access transfer.
+ The DMAC is programmed via the APB interface.
+
+properties:
+ compatible:
+ enum:
+ - atmel,at91sam9g45-dma
+ - atmel,at91sam9rl-dma
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ "#dma-cells":
+ description:
+ Must be <2>, used to represent the number of integer cells in the dmas
+ property of client devices.
+ const: 2
+
+ clocks:
+ maxItems: 1
+
+ clock-names:
+ const: dma_clk
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - "#dma-cells"
+ - clocks
+ - clock-names
+
+additionalProperties: false
+
+examples:
+ - |
+ dma-controller@ffffec00 {
+ compatible = "atmel,at91sam9g45-dma";
+ reg = <0xffffec00 0x200>;
+ interrupts = <21>;
+ #dma-cells = <2>;
+ clocks = <&pmc 2 20>;
+ clock-names = "dma_clk";
+ };
+
+...
diff --git a/Documentation/devicetree/bindings/dma/atmel-dma.txt b/Documentation/devicetree/bindings/dma/atmel-dma.txt
deleted file mode 100644
index f69bcf5a6343..000000000000
--- a/Documentation/devicetree/bindings/dma/atmel-dma.txt
+++ /dev/null
@@ -1,42 +0,0 @@
-* Atmel Direct Memory Access Controller (DMA)
-
-Required properties:
-- compatible: Should be "atmel,<chip>-dma".
-- reg: Should contain DMA registers location and length.
-- interrupts: Should contain DMA interrupt.
-- #dma-cells: Must be <2>, used to represent the number of integer cells in
-the dmas property of client devices.
-
-Example:
-
-dma0: dma@ffffec00 {
- compatible = "atmel,at91sam9g45-dma";
- reg = <0xffffec00 0x200>;
- interrupts = <21>;
- #dma-cells = <2>;
-};
-
-DMA clients connected to the Atmel DMA controller must use the format
-described in the dma.txt file, using a three-cell specifier for each channel:
-a phandle plus two integer cells.
-The three cells in order are:
-
-1. A phandle pointing to the DMA controller.
-2. The memory interface (16 most significant bits), the peripheral interface
-(16 less significant bits).
-3. Parameters for the at91 DMA configuration register which are device
-dependent:
- - bit 7-0: peripheral identifier for the hardware handshaking interface. The
- identifier can be different for tx and rx.
- - bit 11-8: FIFO configuration. 0 for half FIFO, 1 for ALAP, 2 for ASAP.
-
-Example:
-
-i2c0@i2c@f8010000 {
- compatible = "atmel,at91sam9x5-i2c";
- reg = <0xf8010000 0x100>;
- interrupts = <9 4 6>;
- dmas = <&dma0 1 7>,
- <&dma0 1 8>;
- dma-names = "tx", "rx";
-};
diff --git a/Documentation/devicetree/bindings/misc/atmel-ssc.txt b/Documentation/devicetree/bindings/misc/atmel-ssc.txt
index f9fb412642fe..b159dc2298b6 100644
--- a/Documentation/devicetree/bindings/misc/atmel-ssc.txt
+++ b/Documentation/devicetree/bindings/misc/atmel-ssc.txt
@@ -14,7 +14,7 @@ Required properties:
Required properties for devices compatible with "atmel,at91sam9g45-ssc":
- dmas: DMA specifier, consisting of a phandle to DMA controller node,
the memory interface and SSC DMA channel ID (for tx and rx).
- See Documentation/devicetree/bindings/dma/atmel-dma.txt for details.
+ See Documentation/devicetree/bindings/dma/atmel,at91sam9g45-dma.yaml for details.
- dma-names: Must be "tx", "rx".
Optional properties:
diff --git a/MAINTAINERS b/MAINTAINERS
index 962eab2ce359..f1f4e3956f45 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -15348,7 +15348,7 @@ M: Ludovic Desroches <ludovic.desroches@microchip.com>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
L: dmaengine@vger.kernel.org
S: Supported
-F: Documentation/devicetree/bindings/dma/atmel-dma.txt
+F: Documentation/devicetree/bindings/dma/atmel,at91sam9g45-dma.yaml
F: drivers/dma/at_hdmac.c
F: drivers/dma/at_xdmac.c
F: include/dt-bindings/dma/at91.h
---
base-commit: 232f121837ad8b1c21cc80f2c8842a4090c5a2a0
change-id: 20250127-test-80e5c48cf747
Best regards,
--
Charan Pedumuru <charan.pedumuru@microchip.com>On Mon, Jan 27, 2025 at 03:51:58PM +0530, Charan Pedumuru wrote: > From: Durai Manickam KR <durai.manickamkr@microchip.com> > > Add a description, required properties, appropriate compatibles and > missing properties like clocks and clock-names which are not defined in > the text binding for all the SoCs that are supported by microchip. > Update the text binding name `atmel-dma.txt` to > `atmel,at91sam9g45-dma.yaml` for the files which reference to > `atmel-dma.txt`. Drop Tudor name from maintainers. > > Signed-off-by: Durai Manickam KR <durai.manickamkr@microchip.com> > Signed-off-by: Charan Pedumuru <charan.pedumuru@microchip.com> > --- > Changes in v3: > - Renamed the text binding name `atmel-dma.txt` to > `atmel,at91sam9g45-dma.yaml` for the files which reference to > `atmel-dma.txt`. > - Removed `oneOf` and add a blank line in properties. > - Dropped Tudor name from maintainers. > - Link to v2: https://lore.kernel.org/r/20250123-dma-v1-1-054f1a77e733@microchip.com > > Changes in v2: > - Renamed the yaml file to a compatible. > - Removed `|` and description for common properties. > - Modified the commit message. > - Dropped the label for the node in examples. > - Link to v1: https://lore.kernel.org/all/20240215-dmac-v1-1-8f1c6f031c98@microchip.com > --- > .../bindings/dma/atmel,at91sam9g45-dma.yaml | 66 ++++++++++++++++++++++ > .../devicetree/bindings/dma/atmel-dma.txt | 42 -------------- > .../devicetree/bindings/misc/atmel-ssc.txt | 2 +- > MAINTAINERS | 2 +- > 4 files changed, 68 insertions(+), 44 deletions(-) > > diff --git a/Documentation/devicetree/bindings/dma/atmel,at91sam9g45-dma.yaml b/Documentation/devicetree/bindings/dma/atmel,at91sam9g45-dma.yaml > new file mode 100644 > index 000000000000..d6d16869b7db > --- /dev/null > +++ b/Documentation/devicetree/bindings/dma/atmel,at91sam9g45-dma.yaml > @@ -0,0 +1,66 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/dma/atmel,at91sam9g45-dma.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Atmel Direct Memory Access Controller (DMA) > + > +maintainers: > + - Ludovic Desroches <ludovic.desroches@microchip.com> > + > +description: > + The Atmel Direct Memory Access Controller (DMAC) transfers data from a source > + peripheral to a destination peripheral over one or more AMBA buses. One channel > + is required for each source/destination pair. In the most basic configuration, > + the DMAC has one master interface and one channel. The master interface reads > + the data from a source and writes it to a destination. Two AMBA transfers are > + required for each DMAC data transfer. This is also known as a dual-access transfer. > + The DMAC is programmed via the APB interface. > + > +properties: > + compatible: > + enum: > + - atmel,at91sam9g45-dma > + - atmel,at91sam9rl-dma > + > + reg: > + maxItems: 1 > + > + interrupts: > + maxItems: 1 > + > + "#dma-cells": > + description: > + Must be <2>, used to represent the number of integer cells in the dmas > + property of client devices. You failed to address Conor's comment on this. The above is useless because the schema says it is 2 and the description is for any #dma-cells. What's missing is answering "what do the 2 cells contain exactly?" That was captured in this text: > -The three cells in order are: > - > -1. A phandle pointing to the DMA controller. > -2. The memory interface (16 most significant bits), the peripheral interface > -(16 less significant bits). > -3. Parameters for the at91 DMA configuration register which are device > -dependent: > - - bit 7-0: peripheral identifier for the hardware handshaking interface. The > - identifier can be different for tx and rx. > - - bit 11-8: FIFO configuration. 0 for half FIFO, 1 for ALAP, 2 for ASAP. Adapt this for the description. (Note it is phandle plus 2 cells, not 3 cells, so you *can* omit the phandle part.) Rob
On 28/01/25 02:16, Rob Herring wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > On Mon, Jan 27, 2025 at 03:51:58PM +0530, Charan Pedumuru wrote: >> From: Durai Manickam KR <durai.manickamkr@microchip.com> >> >> Add a description, required properties, appropriate compatibles and >> missing properties like clocks and clock-names which are not defined in >> the text binding for all the SoCs that are supported by microchip. >> Update the text binding name `atmel-dma.txt` to >> `atmel,at91sam9g45-dma.yaml` for the files which reference to >> `atmel-dma.txt`. Drop Tudor name from maintainers. >> >> Signed-off-by: Durai Manickam KR <durai.manickamkr@microchip.com> >> Signed-off-by: Charan Pedumuru <charan.pedumuru@microchip.com> >> --- >> Changes in v3: >> - Renamed the text binding name `atmel-dma.txt` to >> `atmel,at91sam9g45-dma.yaml` for the files which reference to >> `atmel-dma.txt`. >> - Removed `oneOf` and add a blank line in properties. >> - Dropped Tudor name from maintainers. >> - Link to v2: https://lore.kernel.org/r/20250123-dma-v1-1-054f1a77e733@microchip.com >> >> Changes in v2: >> - Renamed the yaml file to a compatible. >> - Removed `|` and description for common properties. >> - Modified the commit message. >> - Dropped the label for the node in examples. >> - Link to v1: https://lore.kernel.org/all/20240215-dmac-v1-1-8f1c6f031c98@microchip.com >> --- >> .../bindings/dma/atmel,at91sam9g45-dma.yaml | 66 ++++++++++++++++++++++ >> .../devicetree/bindings/dma/atmel-dma.txt | 42 -------------- >> .../devicetree/bindings/misc/atmel-ssc.txt | 2 +- >> MAINTAINERS | 2 +- >> 4 files changed, 68 insertions(+), 44 deletions(-) >> >> diff --git a/Documentation/devicetree/bindings/dma/atmel,at91sam9g45-dma.yaml b/Documentation/devicetree/bindings/dma/atmel,at91sam9g45-dma.yaml >> new file mode 100644 >> index 000000000000..d6d16869b7db >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/dma/atmel,at91sam9g45-dma.yaml >> @@ -0,0 +1,66 @@ >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/dma/atmel,at91sam9g45-dma.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Atmel Direct Memory Access Controller (DMA) >> + >> +maintainers: >> + - Ludovic Desroches <ludovic.desroches@microchip.com> >> + >> +description: >> + The Atmel Direct Memory Access Controller (DMAC) transfers data from a source >> + peripheral to a destination peripheral over one or more AMBA buses. One channel >> + is required for each source/destination pair. In the most basic configuration, >> + the DMAC has one master interface and one channel. The master interface reads >> + the data from a source and writes it to a destination. Two AMBA transfers are >> + required for each DMAC data transfer. This is also known as a dual-access transfer. >> + The DMAC is programmed via the APB interface. >> + >> +properties: >> + compatible: >> + enum: >> + - atmel,at91sam9g45-dma >> + - atmel,at91sam9rl-dma >> + >> + reg: >> + maxItems: 1 >> + >> + interrupts: >> + maxItems: 1 >> + >> + "#dma-cells": >> + description: >> + Must be <2>, used to represent the number of integer cells in the dmas >> + property of client devices. > You failed to address Conor's comment on this. The above is useless > because the schema says it is 2 and the description is for any #dma-cells. > > What's missing is answering "what do the 2 cells contain exactly?" That > was captured in this text: Sure, thanks for pointing it out, I will rewrite the description following the below format excluding the phandle part. > >> -The three cells in order are: >> - >> -1. A phandle pointing to the DMA controller. >> -2. The memory interface (16 most significant bits), the peripheral interface >> -(16 less significant bits). >> -3. Parameters for the at91 DMA configuration register which are device >> -dependent: >> - - bit 7-0: peripheral identifier for the hardware handshaking interface. The >> - identifier can be different for tx and rx. >> - - bit 11-8: FIFO configuration. 0 for half FIFO, 1 for ALAP, 2 for ASAP. > Adapt this for the description. (Note it is phandle plus 2 cells, not 3 > cells, so you *can* omit the phandle part.) > > Rob -- Best Regards, Charan.
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