From: "J. Neuschäfer" <j.ne@posteo.net>
Convert the Freescale PowerQUICC SATA controller binding from text form
to YAML. The list of compatible strings reflects current usage.
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
---
.../devicetree/bindings/ata/fsl,pq-sata.yaml | 59 ++++++++++++++++++++++
Documentation/devicetree/bindings/ata/fsl-sata.txt | 28 ----------
2 files changed, 59 insertions(+), 28 deletions(-)
diff --git a/Documentation/devicetree/bindings/ata/fsl,pq-sata.yaml b/Documentation/devicetree/bindings/ata/fsl,pq-sata.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..6af31ffbcad5e9cc83118a0bd8eaf45351a2823f
--- /dev/null
+++ b/Documentation/devicetree/bindings/ata/fsl,pq-sata.yaml
@@ -0,0 +1,59 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/ata/fsl,pq-sata.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale 8xxx/3.0 Gb/s SATA nodes
+
+maintainers:
+ - J. Neuschäfer <j.ne@posteo.net>
+
+description: |
+ SATA nodes are defined to describe on-chip Serial ATA controllers.
+ Each SATA port should have its own node.
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - fsl,mpc8377-sata
+ - fsl,mpc8536-sata
+ - fsl,mpc8315-sata
+ - fsl,mpc8379-sata
+ - const: fsl,pq-sata
+ - const: fsl,pq-sata-v2
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ cell-index:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum: [1, 2, 3, 4]
+ description: |
+ 1 for controller @ 0x18000
+ 2 for controller @ 0x19000
+ 3 for controller @ 0x1a000
+ 4 for controller @ 0x1b000
+
+required:
+ - compatible
+ - interrupts
+ - cell-index
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+ sata@18000 {
+ compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
+ reg = <0x18000 0x1000>;
+ cell-index = <1>;
+ interrupts = <44 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-parent = <&ipic>;
+ };
diff --git a/Documentation/devicetree/bindings/ata/fsl-sata.txt b/Documentation/devicetree/bindings/ata/fsl-sata.txt
deleted file mode 100644
index fd63bb3becc9363c520a8fd06629fdc52c4d4299..0000000000000000000000000000000000000000
--- a/Documentation/devicetree/bindings/ata/fsl-sata.txt
+++ /dev/null
@@ -1,28 +0,0 @@
-* Freescale 8xxx/3.0 Gb/s SATA nodes
-
-SATA nodes are defined to describe on-chip Serial ATA controllers.
-Each SATA port should have its own node.
-
-Required properties:
-- compatible : compatible list, contains 2 entries, first is
- "fsl,CHIP-sata", where CHIP is the processor
- (mpc8315, mpc8379, etc.) and the second is
- "fsl,pq-sata"
-- interrupts : <interrupt mapping for SATA IRQ>
-- cell-index : controller index.
- 1 for controller @ 0x18000
- 2 for controller @ 0x19000
- 3 for controller @ 0x1a000
- 4 for controller @ 0x1b000
-
-Optional properties:
-- reg : <registers mapping>
-
-Example:
- sata@18000 {
- compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
- reg = <0x18000 0x1000>;
- cell-index = <1>;
- interrupts = <2c 8>;
- interrupt-parent = < &ipic >;
- };
--
2.48.0.rc1.219.gb6b6757d772
On Sun, Jan 26, 2025 at 07:58:57PM +0100, J. Neuschäfer wrote:
> Convert the Freescale PowerQUICC SATA controller binding from text form
> to YAML. The list of compatible strings reflects current usage.
>
> Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
> ---
> .../devicetree/bindings/ata/fsl,pq-sata.yaml | 59 ++++++++++++++++++++++
> Documentation/devicetree/bindings/ata/fsl-sata.txt | 28 ----------
> 2 files changed, 59 insertions(+), 28 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/ata/fsl,pq-sata.yaml b/Documentation/devicetree/bindings/ata/fsl,pq-sata.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..6af31ffbcad5e9cc83118a0bd8eaf45351a2823f
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/ata/fsl,pq-sata.yaml
> @@ -0,0 +1,59 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/ata/fsl,pq-sata.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Freescale 8xxx/3.0 Gb/s SATA nodes
> +
> +maintainers:
> + - J. Neuschäfer <j.ne@posteo.net>
> +
> +description: |
Don't need '|'
Otherwise,
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
> + SATA nodes are defined to describe on-chip Serial ATA controllers.
> + Each SATA port should have its own node.
> +
> +properties:
> + compatible:
> + oneOf:
> + - items:
> + - enum:
> + - fsl,mpc8377-sata
> + - fsl,mpc8536-sata
> + - fsl,mpc8315-sata
> + - fsl,mpc8379-sata
> + - const: fsl,pq-sata
> + - const: fsl,pq-sata-v2
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + cell-index:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + enum: [1, 2, 3, 4]
> + description: |
> + 1 for controller @ 0x18000
> + 2 for controller @ 0x19000
> + 3 for controller @ 0x1a000
> + 4 for controller @ 0x1b000
> +
> +required:
> + - compatible
> + - interrupts
> + - cell-index
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/irq.h>
> + sata@18000 {
> + compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
> + reg = <0x18000 0x1000>;
> + cell-index = <1>;
> + interrupts = <44 IRQ_TYPE_LEVEL_LOW>;
> + interrupt-parent = <&ipic>;
> + };
> diff --git a/Documentation/devicetree/bindings/ata/fsl-sata.txt b/Documentation/devicetree/bindings/ata/fsl-sata.txt
> deleted file mode 100644
> index fd63bb3becc9363c520a8fd06629fdc52c4d4299..0000000000000000000000000000000000000000
> --- a/Documentation/devicetree/bindings/ata/fsl-sata.txt
> +++ /dev/null
> @@ -1,28 +0,0 @@
> -* Freescale 8xxx/3.0 Gb/s SATA nodes
> -
> -SATA nodes are defined to describe on-chip Serial ATA controllers.
> -Each SATA port should have its own node.
> -
> -Required properties:
> -- compatible : compatible list, contains 2 entries, first is
> - "fsl,CHIP-sata", where CHIP is the processor
> - (mpc8315, mpc8379, etc.) and the second is
> - "fsl,pq-sata"
> -- interrupts : <interrupt mapping for SATA IRQ>
> -- cell-index : controller index.
> - 1 for controller @ 0x18000
> - 2 for controller @ 0x19000
> - 3 for controller @ 0x1a000
> - 4 for controller @ 0x1b000
> -
> -Optional properties:
> -- reg : <registers mapping>
> -
> -Example:
> - sata@18000 {
> - compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
> - reg = <0x18000 0x1000>;
> - cell-index = <1>;
> - interrupts = <2c 8>;
> - interrupt-parent = < &ipic >;
> - };
>
> --
> 2.48.0.rc1.219.gb6b6757d772
>
On 1/27/25 03:58, J. Neuschäfer via B4 Relay wrote:
> From: "J. Neuschäfer" <j.ne@posteo.net>
>
> Convert the Freescale PowerQUICC SATA controller binding from text form
> to YAML. The list of compatible strings reflects current usage.
>
> Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
> ---
> .../devicetree/bindings/ata/fsl,pq-sata.yaml | 59 ++++++++++++++++++++++
> Documentation/devicetree/bindings/ata/fsl-sata.txt | 28 ----------
> 2 files changed, 59 insertions(+), 28 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/ata/fsl,pq-sata.yaml b/Documentation/devicetree/bindings/ata/fsl,pq-sata.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..6af31ffbcad5e9cc83118a0bd8eaf45351a2823f
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/ata/fsl,pq-sata.yaml
> @@ -0,0 +1,59 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/ata/fsl,pq-sata.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Freescale 8xxx/3.0 Gb/s SATA nodes
> +
> +maintainers:
> + - J. Neuschäfer <j.ne@posteo.net>
> +
> +description: |
> + SATA nodes are defined to describe on-chip Serial ATA controllers.
> + Each SATA port should have its own node.
Very unclear. The SATA nodes define ports or controllers ? Normally, a single
controller can have multiple ports, so the distinction is important.
> +
> +properties:
> + compatible:
> + oneOf:
> + - items:
> + - enum:
> + - fsl,mpc8377-sata
> + - fsl,mpc8536-sata
> + - fsl,mpc8315-sata
> + - fsl,mpc8379-sata
> + - const: fsl,pq-sata
> + - const: fsl,pq-sata-v2
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + cell-index:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + enum: [1, 2, 3, 4]
> + description: |
> + 1 for controller @ 0x18000
> + 2 for controller @ 0x19000
> + 3 for controller @ 0x1a000
> + 4 for controller @ 0x1b000
Are you sure these are different controllers ? Are they not different ports of
the same controller ? Given that the previous text description define this as
"controller index", I suspect these are the port offsets and you SATA nodes
define ports, and not controllers.
> +
> +required:
> + - compatible
> + - interrupts
> + - cell-index
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/irq.h>
> + sata@18000 {
> + compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
> + reg = <0x18000 0x1000>;
> + cell-index = <1>;
> + interrupts = <44 IRQ_TYPE_LEVEL_LOW>;
> + interrupt-parent = <&ipic>;
> + };
> diff --git a/Documentation/devicetree/bindings/ata/fsl-sata.txt b/Documentation/devicetree/bindings/ata/fsl-sata.txt
> deleted file mode 100644
> index fd63bb3becc9363c520a8fd06629fdc52c4d4299..0000000000000000000000000000000000000000
> --- a/Documentation/devicetree/bindings/ata/fsl-sata.txt
> +++ /dev/null
> @@ -1,28 +0,0 @@
> -* Freescale 8xxx/3.0 Gb/s SATA nodes
> -
> -SATA nodes are defined to describe on-chip Serial ATA controllers.
> -Each SATA port should have its own node.
> -
> -Required properties:
> -- compatible : compatible list, contains 2 entries, first is
> - "fsl,CHIP-sata", where CHIP is the processor
> - (mpc8315, mpc8379, etc.) and the second is
> - "fsl,pq-sata"
> -- interrupts : <interrupt mapping for SATA IRQ>
> -- cell-index : controller index.
> - 1 for controller @ 0x18000
> - 2 for controller @ 0x19000
> - 3 for controller @ 0x1a000
> - 4 for controller @ 0x1b000
> -
> -Optional properties:
> -- reg : <registers mapping>
> -
> -Example:
> - sata@18000 {
> - compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
> - reg = <0x18000 0x1000>;
> - cell-index = <1>;
> - interrupts = <2c 8>;
> - interrupt-parent = < &ipic >;
> - };
>
--
Damien Le Moal
Western Digital Research
On Mon, Jan 27, 2025 at 08:22:55AM +0900, Damien Le Moal wrote: > On 1/27/25 03:58, J. Neuschäfer via B4 Relay wrote: > > From: "J. Neuschäfer" <j.ne@posteo.net> > > > > Convert the Freescale PowerQUICC SATA controller binding from text form > > to YAML. The list of compatible strings reflects current usage. > > > > Signed-off-by: J. Neuschäfer <j.ne@posteo.net> > > --- > > .../devicetree/bindings/ata/fsl,pq-sata.yaml | 59 ++++++++++++++++++++++ [...] > > +description: | > > + SATA nodes are defined to describe on-chip Serial ATA controllers. > > + Each SATA port should have its own node. > > Very unclear. The SATA nodes define ports or controllers ? Normally, a single > controller can have multiple ports, so the distinction is important. I'll change it to "Each SATA controller ...", see below. > > + cell-index: > > + $ref: /schemas/types.yaml#/definitions/uint32 > > + enum: [1, 2, 3, 4] > > + description: | > > + 1 for controller @ 0x18000 > > + 2 for controller @ 0x19000 > > + 3 for controller @ 0x1a000 > > + 4 for controller @ 0x1b000 > > Are you sure these are different controllers ? Are they not different ports of > the same controller ? Given that the previous text description define this as > "controller index", I suspect these are the port offsets and you SATA nodes > define ports, and not controllers. They have no shared registers, and each instance has the same register set (at a different base address). The MPC8315E reference manual (for example) documents them as: SATA 1 Controller—Block Base Address 0x1_8000 SATA 2 Controller—Block Base Address 0x1_9000 (table A.24 Serial ATA (SATA) Controller) Section 15.2 Command Operation implies that each SATA controller supports a single port: The SATA controller maintains a queue consisting of up to 16 commands. These commands can be distributed to a single attached device or, if the system contains a port multiplier, over each of the attached devices. So, in conclusion, I'm fairly sure "controller" is the right description. Best regards, J. Neuschäfer
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