Convert intel,stratix10-soc fpga manager devicetree
binding file from freeform format to json-schema.
Signed-off-by: Mahesh Rao <mahesh.rao@intel.com>
---
.../fpga/intel,stratix10-soc-fpga-mgr.yaml | 32 ++++++++++++++++++++++
.../bindings/fpga/intel-stratix10-soc-fpga-mgr.txt | 18 ------------
2 files changed, 32 insertions(+), 18 deletions(-)
diff --git a/Documentation/devicetree/bindings/fpga/intel,stratix10-soc-fpga-mgr.yaml b/Documentation/devicetree/bindings/fpga/intel,stratix10-soc-fpga-mgr.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..34e1bc2359672210ab69e1d5af73c4c637b7f584
--- /dev/null
+++ b/Documentation/devicetree/bindings/fpga/intel,stratix10-soc-fpga-mgr.yaml
@@ -0,0 +1,32 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/fpga/intel,stratix10-soc-fpga-mgr.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Intel Stratix10 SoC FPGA Manager
+
+maintainers:
+ - Moritz Fischer <mdf@kernel.org>
+ - Wu Hao <hao.wu@intel.com>
+ - Xu Yilun <yilun.xu@intel.com>
+
+description: |
+ Bindings for the Intel Stratix10 SoC FPGA Manager.
+
+properties:
+ compatible:
+ enum:
+ - intel,stratix10-soc-fpga-mgr
+ - intel,agilex-soc-fpga-mgr
+
+required:
+ - compatible
+
+additionalProperties: false
+
+examples:
+ - |
+ fpga-mgr {
+ compatible = "intel,stratix10-soc-fpga-mgr";
+ };
diff --git a/Documentation/devicetree/bindings/fpga/intel-stratix10-soc-fpga-mgr.txt b/Documentation/devicetree/bindings/fpga/intel-stratix10-soc-fpga-mgr.txt
deleted file mode 100644
index 0f874137ca4697820341b23eddb882634bb131d1..0000000000000000000000000000000000000000
--- a/Documentation/devicetree/bindings/fpga/intel-stratix10-soc-fpga-mgr.txt
+++ /dev/null
@@ -1,18 +0,0 @@
-Intel Stratix10 SoC FPGA Manager
-
-Required properties:
-The fpga_mgr node has the following mandatory property, must be located under
-firmware/svc node.
-
-- compatible : should contain "intel,stratix10-soc-fpga-mgr" or
- "intel,agilex-soc-fpga-mgr"
-
-Example:
-
- firmware {
- svc {
- fpga_mgr: fpga-mgr {
- compatible = "intel,stratix10-soc-fpga-mgr";
- };
- };
- };
--
2.35.3
On Wed, Jan 22, 2025 at 01:58:43PM +0800, Mahesh Rao wrote:
> Convert intel,stratix10-soc fpga manager devicetree
> binding file from freeform format to json-schema.
>
> Signed-off-by: Mahesh Rao <mahesh.rao@intel.com>
> ---
> .../fpga/intel,stratix10-soc-fpga-mgr.yaml | 32 ++++++++++++++++++++++
> .../bindings/fpga/intel-stratix10-soc-fpga-mgr.txt | 18 ------------
> 2 files changed, 32 insertions(+), 18 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/fpga/intel,stratix10-soc-fpga-mgr.yaml b/Documentation/devicetree/bindings/fpga/intel,stratix10-soc-fpga-mgr.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..34e1bc2359672210ab69e1d5af73c4c637b7f584
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/fpga/intel,stratix10-soc-fpga-mgr.yaml
> @@ -0,0 +1,32 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/fpga/intel,stratix10-soc-fpga-mgr.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Intel Stratix10 SoC FPGA Manager
> +
> +maintainers:
> + - Moritz Fischer <mdf@kernel.org>
Are these maintainers actually correct? Does Moritz work on Altera
stuff, or did you just add him cos he is a subsystem maintainer? Really
what's here should be people that understand the hardware.
> + - Wu Hao <hao.wu@intel.com>
> + - Xu Yilun <yilun.xu@intel.com>
> +
> +description: |
The | here isn't needed, nor is point out that this is a binding in the
line below. Please describe what the hardware is here instead.
> + Bindings for the Intel Stratix10 SoC FPGA Manager.
> +
> +properties:
> + compatible:
> + enum:
> + - intel,stratix10-soc-fpga-mgr
> + - intel,agilex-soc-fpga-mgr
> +
> +required:
> + - compatible
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + fpga-mgr {
> + compatible = "intel,stratix10-soc-fpga-mgr";
> + };
> diff --git a/Documentation/devicetree/bindings/fpga/intel-stratix10-soc-fpga-mgr.txt b/Documentation/devicetree/bindings/fpga/intel-stratix10-soc-fpga-mgr.txt
> deleted file mode 100644
> index 0f874137ca4697820341b23eddb882634bb131d1..0000000000000000000000000000000000000000
> --- a/Documentation/devicetree/bindings/fpga/intel-stratix10-soc-fpga-mgr.txt
> +++ /dev/null
> @@ -1,18 +0,0 @@
> -Intel Stratix10 SoC FPGA Manager
> -
> -Required properties:
> -The fpga_mgr node has the following mandatory property, must be located under
> -firmware/svc node.
> -
> -- compatible : should contain "intel,stratix10-soc-fpga-mgr" or
> - "intel,agilex-soc-fpga-mgr"
> -
> -Example:
> -
> - firmware {
> - svc {
> - fpga_mgr: fpga-mgr {
> - compatible = "intel,stratix10-soc-fpga-mgr";
> - };
> - };
> - };
>
> --
> 2.35.3
>
Hi Conor Dooley, Thanks for reviewing the patch. On Wed, 22 Jan 2025 18:35:51 +0000, Conor Dooley wrote: > > Convert intel,stratix10-soc fpga manager devicetree binding file from > > freeform format to json-schema. > > > > Signed-off-by: Mahesh Rao <mahesh.rao@intel.com> > > +maintainers: > > + - Moritz Fischer <mdf@kernel.org> > > Are these maintainers actually correct? Does Moritz work on Altera stuff, or > did you just add him cos he is a subsystem maintainer? Really what's here > should be people that understand the hardware. > Sorry I initially had added list from maintaner script,I will change to people who works with the hardware in the next revision. > > + - Wu Hao <hao.wu@intel.com> > > + - Xu Yilun <yilun.xu@intel.com> > > + > > +description: | > > The | here isn't needed, nor is point out that this is a binding in the line > below. Please describe what the hardware is here instead. > Sure I will update the info in the next revision. Best regards Mahesh Rao
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