The PX30-uQ7 (Ringneck) SoM has two external UARTs, connected to
uart0 and uart5 controllers on the PX30 SoC. The uart5 does not
expose RTS/CTS pins on the Q7 connector, as they are used for
different purposes. It was observed that UART controllers without
hardware flow controller behave unstable if the DMA is enabled.
This patch series moves the pinctrl-0 to SoM dtsi file and uses
/delete-property/ to remove DMA from this UART controller.
----
Changes v2:
 - Update commit message of patch 1/2
 - Add Cc: stable@vger.kernel.org

Lukasz Czechowski (2):
  arm64: dts: rockchip: Move uart5 pin configuration to SoM dtsi
  arm64: dts: rockchip: Disable DMA for uart5 on px30-ringneck

 arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts | 1 -
 arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi       | 6 ++++++
 2 files changed, 6 insertions(+), 1 deletion(-)

-- 
2.43.0

On Tue, 21 Jan 2025 13:56:02 +0100, Lukasz Czechowski wrote:
> The PX30-uQ7 (Ringneck) SoM has two external UARTs, connected to
> uart0 and uart5 controllers on the PX30 SoC. The uart5 does not
> expose RTS/CTS pins on the Q7 connector, as they are used for
> different purposes. It was observed that UART controllers without
> hardware flow controller behave unstable if the DMA is enabled.
> This patch series moves the pinctrl-0 to SoM dtsi file and uses
> /delete-property/ to remove DMA from this UART controller.
> ----
> Changes v2:
>  - Update commit message of patch 1/2
>  - Add Cc: stable@vger.kernel.org
> 
> [...]

Applied, thanks!

[1/2] arm64: dts: rockchip: Move uart5 pin configuration to SoM dtsi
      commit: 4eee627ea59304cdd66c5d4194ef13486a6c44fc
[2/2] arm64: dts: rockchip: Disable DMA for uart5 on px30-ringneck
      commit: 11534d3c53d5f3bd93285f8c1adcb793a733ad60

Best regards,
-- 
Heiko Stuebner <heiko@sntech.de>