[PATCH v3 3/8] counter: stm32-timer-cnt: add support for stm32mp25

Fabrice Gasnier posted 8 patches 11 months, 1 week ago
[PATCH v3 3/8] counter: stm32-timer-cnt: add support for stm32mp25
Posted by Fabrice Gasnier 11 months, 1 week ago
Add support for STM32MP25 SoC. There are new counter modes that may be
implemented in later. Still, use newly introduced compatible to handle
this new HW variant and avoid being blocked with existing compatible
in SoC dtsi file. Modes supported currently still remains compatible.
New timer 20 has encoder capability, add it to the list.

Acked-by: William Breathitt Gray <wbg@kernel.org>
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
---
 drivers/counter/stm32-timer-cnt.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/counter/stm32-timer-cnt.c b/drivers/counter/stm32-timer-cnt.c
index e75b69476a00..3d3384cbea87 100644
--- a/drivers/counter/stm32-timer-cnt.c
+++ b/drivers/counter/stm32-timer-cnt.c
@@ -669,12 +669,14 @@ static void stm32_timer_cnt_detect_channels(struct device *dev,
 	dev_dbg(dev, "has %d cc channels\n", priv->nchannels);
 }
 
-/* encoder supported on TIM1 TIM2 TIM3 TIM4 TIM5 TIM8 */
-#define STM32_TIM_ENCODER_SUPPORTED	(BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(7))
+/* encoder supported on TIM1 TIM2 TIM3 TIM4 TIM5 TIM8 TIM20 */
+#define STM32_TIM_ENCODER_SUPPORTED	(BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(7) | \
+					 BIT(19))
 
 static const char * const stm32_timer_trigger_compat[] = {
 	"st,stm32-timer-trigger",
 	"st,stm32h7-timer-trigger",
+	"st,stm32mp25-timer-trigger",
 };
 
 static int stm32_timer_cnt_probe_encoder(struct device *dev,
@@ -846,6 +848,7 @@ static SIMPLE_DEV_PM_OPS(stm32_timer_cnt_pm_ops, stm32_timer_cnt_suspend,
 
 static const struct of_device_id stm32_timer_cnt_of_match[] = {
 	{ .compatible = "st,stm32-timer-counter", },
+	{ .compatible = "st,stm32mp25-timer-counter", },
 	{},
 };
 MODULE_DEVICE_TABLE(of, stm32_timer_cnt_of_match);
-- 
2.25.1
Re: [PATCH v3 3/8] counter: stm32-timer-cnt: add support for stm32mp25
Posted by Fabrice Gasnier 7 months, 1 week ago
On 1/10/25 10:19, Fabrice Gasnier wrote:
> Add support for STM32MP25 SoC. There are new counter modes that may be
> implemented in later. Still, use newly introduced compatible to handle
> this new HW variant and avoid being blocked with existing compatible
> in SoC dtsi file. Modes supported currently still remains compatible.
> New timer 20 has encoder capability, add it to the list.
> 
> Acked-by: William Breathitt Gray <wbg@kernel.org>
> Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
> ---
>  drivers/counter/stm32-timer-cnt.c | 7 +++++--
>  1 file changed, 5 insertions(+), 2 deletions(-)

Hi,

The first patches of this series have been merged.

I'm not sure who shall pick this one ? (I think there's no dependency).
Or do I need to resend it separately ?

Please advise,
BR,
Fabrice

> 
> diff --git a/drivers/counter/stm32-timer-cnt.c b/drivers/counter/stm32-timer-cnt.c
> index e75b69476a00..3d3384cbea87 100644
> --- a/drivers/counter/stm32-timer-cnt.c
> +++ b/drivers/counter/stm32-timer-cnt.c
> @@ -669,12 +669,14 @@ static void stm32_timer_cnt_detect_channels(struct device *dev,
>  	dev_dbg(dev, "has %d cc channels\n", priv->nchannels);
>  }
>  
> -/* encoder supported on TIM1 TIM2 TIM3 TIM4 TIM5 TIM8 */
> -#define STM32_TIM_ENCODER_SUPPORTED	(BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(7))
> +/* encoder supported on TIM1 TIM2 TIM3 TIM4 TIM5 TIM8 TIM20 */
> +#define STM32_TIM_ENCODER_SUPPORTED	(BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(7) | \
> +					 BIT(19))
>  
>  static const char * const stm32_timer_trigger_compat[] = {
>  	"st,stm32-timer-trigger",
>  	"st,stm32h7-timer-trigger",
> +	"st,stm32mp25-timer-trigger",
>  };
>  
>  static int stm32_timer_cnt_probe_encoder(struct device *dev,
> @@ -846,6 +848,7 @@ static SIMPLE_DEV_PM_OPS(stm32_timer_cnt_pm_ops, stm32_timer_cnt_suspend,
>  
>  static const struct of_device_id stm32_timer_cnt_of_match[] = {
>  	{ .compatible = "st,stm32-timer-counter", },
> +	{ .compatible = "st,stm32mp25-timer-counter", },
>  	{},
>  };
>  MODULE_DEVICE_TABLE(of, stm32_timer_cnt_of_match);
Re: [PATCH v3 3/8] counter: stm32-timer-cnt: add support for stm32mp25
Posted by William Breathitt Gray 7 months, 1 week ago
On Wed, May 14, 2025 at 11:30:14AM +0200, Fabrice Gasnier wrote:
> On 1/10/25 10:19, Fabrice Gasnier wrote:
> > Add support for STM32MP25 SoC. There are new counter modes that may be
> > implemented in later. Still, use newly introduced compatible to handle
> > this new HW variant and avoid being blocked with existing compatible
> > in SoC dtsi file. Modes supported currently still remains compatible.
> > New timer 20 has encoder capability, add it to the list.
> >
> > Acked-by: William Breathitt Gray <wbg@kernel.org>
> > Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
> > ---
> >  drivers/counter/stm32-timer-cnt.c | 7 +++++--
> >  1 file changed, 5 insertions(+), 2 deletions(-)
> 
> Hi,
> 
> The first patches of this series have been merged.
> 
> I'm not sure who shall pick this one ? (I think there's no dependency).
> Or do I need to resend it separately ?
> 
> Please advise,
> BR,
> Fabrice

I don't know if anyone has already picked up this patch, but I'll take
it through the counter tree regardless. No need to resend.

Thanks,

William Breathitt Gray
Re: (subset) [PATCH v3 3/8] counter: stm32-timer-cnt: add support for stm32mp25
Posted by William Breathitt Gray 7 months, 1 week ago
On Fri, 10 Jan 2025 10:19:17 +0100, Fabrice Gasnier wrote:
> Add support for STM32MP25 SoC. There are new counter modes that may be
> implemented in later. Still, use newly introduced compatible to handle
> this new HW variant and avoid being blocked with existing compatible
> in SoC dtsi file. Modes supported currently still remains compatible.
> New timer 20 has encoder capability, add it to the list.
> 
> 
> [...]

Applied, thanks!

[3/8] counter: stm32-timer-cnt: add support for stm32mp25
      commit: ace2cd11a27231efcb8a116a597edab2eef34957

Best regards,
-- 
William Breathitt Gray <wbg@kernel.org>