drivers/pinctrl/stm32/pinctrl-stm32.c | 76 ++++++++++++--------------- 1 file changed, 34 insertions(+), 42 deletions(-)
Convert the driver to clk_bulk*() API.
Add check for the return value of clk_bulk_enable() to catch
the potential error.
Fixes: 05d8af449d93 ("pinctrl: stm32: Keep pinctrl block clock enabled when LEVEL IRQ requested")
Signed-off-by: Mingwei Zheng <zmw12306@gmail.com>
Signed-off-by: Jiasheng Jiang <jiashengjiangcool@gmail.com>
---
Changelog:
v7 -> v8:
1. Remove all previously registered GPIO chips before disabling
the clocks.
v6 -> v7:
1. Move clk_bulk_prepare_enable() before calling
stm32_gpiolib_register_bank().
v5 -> v6:
1. Call devm_clk_bulk_get_all in stm32_pctl_probe().
v4 -> v5:
1. Move the clock handling from stm32_gpiolib_register_bank()
and moving it to its caller.
2. Call clk_bulk_prepare_enable() in stm32_pctl_probe()
and clk_bulk_disable_unprepare() for error.
v3 -> v4:
1. Add initialization for pctl->clks.
2. Adjust alignment.
v2 -> v3:
1. Convert clk_disable_unprepare to clk_bulk_disable
and clk_bulk_unprepare.
v1 -> v2:
1. Move int ret declaration into if block.
---
drivers/pinctrl/stm32/pinctrl-stm32.c | 76 ++++++++++++---------------
1 file changed, 34 insertions(+), 42 deletions(-)
diff --git a/drivers/pinctrl/stm32/pinctrl-stm32.c b/drivers/pinctrl/stm32/pinctrl-stm32.c
index 5b7fa77c1184..32c04391e2a0 100644
--- a/drivers/pinctrl/stm32/pinctrl-stm32.c
+++ b/drivers/pinctrl/stm32/pinctrl-stm32.c
@@ -86,7 +86,6 @@ struct stm32_pinctrl_group {
struct stm32_gpio_bank {
void __iomem *base;
- struct clk *clk;
struct reset_control *rstc;
spinlock_t lock;
struct gpio_chip gpio_chip;
@@ -108,6 +107,7 @@ struct stm32_pinctrl {
unsigned ngroups;
const char **grp_names;
struct stm32_gpio_bank *banks;
+ struct clk_bulk_data *clks;
unsigned nbanks;
const struct stm32_pinctrl_match_data *match_data;
struct irq_domain *domain;
@@ -1308,12 +1308,6 @@ static int stm32_gpiolib_register_bank(struct stm32_pinctrl *pctl, struct fwnode
if (IS_ERR(bank->base))
return PTR_ERR(bank->base);
- err = clk_prepare_enable(bank->clk);
- if (err) {
- dev_err(dev, "failed to prepare_enable clk (%d)\n", err);
- return err;
- }
-
bank->gpio_chip = stm32_gpio_template;
fwnode_property_read_string(fwnode, "st,bank-name", &bank->gpio_chip.label);
@@ -1360,26 +1354,21 @@ static int stm32_gpiolib_register_bank(struct stm32_pinctrl *pctl, struct fwnode
bank->fwnode, &stm32_gpio_domain_ops,
bank);
- if (!bank->domain) {
- err = -ENODEV;
- goto err_clk;
- }
+ if (!bank->domain)
+ return -ENODEV;
}
names = devm_kcalloc(dev, npins, sizeof(char *), GFP_KERNEL);
- if (!names) {
- err = -ENOMEM;
- goto err_clk;
- }
+ if (!names)
+ return -ENOMEM;
for (i = 0; i < npins; i++) {
stm32_pin = stm32_pctrl_get_desc_pin_from_gpio(pctl, bank, i);
if (stm32_pin && stm32_pin->pin.name) {
names[i] = devm_kasprintf(dev, GFP_KERNEL, "%s", stm32_pin->pin.name);
- if (!names[i]) {
- err = -ENOMEM;
- goto err_clk;
- }
+ if (!names[i])
+ return -ENOMEM;
+
} else {
names[i] = NULL;
}
@@ -1390,15 +1379,11 @@ static int stm32_gpiolib_register_bank(struct stm32_pinctrl *pctl, struct fwnode
err = gpiochip_add_data(&bank->gpio_chip, bank);
if (err) {
dev_err(dev, "Failed to add gpiochip(%d)!\n", bank_nr);
- goto err_clk;
+ return err;
}
dev_info(dev, "%s bank added\n", bank->gpio_chip.label);
return 0;
-
-err_clk:
- clk_disable_unprepare(bank->clk);
- return err;
}
static struct irq_domain *stm32_pctrl_get_irq_domain(struct platform_device *pdev)
@@ -1621,6 +1606,10 @@ int stm32_pctl_probe(struct platform_device *pdev)
if (!pctl->banks)
return -ENOMEM;
+ ret = devm_clk_bulk_get_all(dev, &pctl->clks);
+ if (ret < 0)
+ return ret;
+
i = 0;
for_each_gpiochip_node(dev, child) {
struct stm32_gpio_bank *bank = &pctl->banks[i];
@@ -1631,25 +1620,20 @@ int stm32_pctl_probe(struct platform_device *pdev)
fwnode_handle_put(child);
return -EPROBE_DEFER;
}
-
- bank->clk = of_clk_get_by_name(np, NULL);
- if (IS_ERR(bank->clk)) {
- fwnode_handle_put(child);
- return dev_err_probe(dev, PTR_ERR(bank->clk),
- "failed to get clk\n");
- }
i++;
}
+ ret = clk_bulk_prepare_enable(banks, pctl->clks);
+ if (ret) {
+ dev_err(dev, "failed to prepare_enable clk (%d)\n", ret);
+ return ret;
+ }
+
for_each_gpiochip_node(dev, child) {
ret = stm32_gpiolib_register_bank(pctl, child);
if (ret) {
fwnode_handle_put(child);
-
- for (i = 0; i < pctl->nbanks; i++)
- clk_disable_unprepare(pctl->banks[i].clk);
-
- return ret;
+ goto err_register;
}
pctl->nbanks++;
@@ -1658,6 +1642,16 @@ int stm32_pctl_probe(struct platform_device *pdev)
dev_info(dev, "Pinctrl STM32 initialized\n");
return 0;
+
+err_register:
+ for (i = 0; i < pctl->nbanks; i++) {
+ struct stm32_gpio_bank *bank = &pctl->banks[i];
+
+ gpiochip_remove(&bank->gpio_chip);
+ }
+
+ clk_bulk_disable_unprepare(banks, pctl->clks);
+ return ret;
}
static int __maybe_unused stm32_pinctrl_restore_gpio_regs(
@@ -1726,10 +1720,8 @@ static int __maybe_unused stm32_pinctrl_restore_gpio_regs(
int __maybe_unused stm32_pinctrl_suspend(struct device *dev)
{
struct stm32_pinctrl *pctl = dev_get_drvdata(dev);
- int i;
- for (i = 0; i < pctl->nbanks; i++)
- clk_disable(pctl->banks[i].clk);
+ clk_bulk_disable(pctl->nbanks, pctl->clks);
return 0;
}
@@ -1738,10 +1730,11 @@ int __maybe_unused stm32_pinctrl_resume(struct device *dev)
{
struct stm32_pinctrl *pctl = dev_get_drvdata(dev);
struct stm32_pinctrl_group *g = pctl->groups;
- int i;
+ int i, ret;
- for (i = 0; i < pctl->nbanks; i++)
- clk_enable(pctl->banks[i].clk);
+ ret = clk_bulk_enable(pctl->nbanks, pctl->clks);
+ if (ret)
+ return ret;
for (i = 0; i < pctl->ngroups; i++, g++)
stm32_pinctrl_restore_gpio_regs(pctl, g->pin);
--
2.34.1On Mon, 2024-12-30 at 23:27 -0500, Mingwei Zheng wrote:
> Convert the driver to clk_bulk*() API.
> Add check for the return value of clk_bulk_enable() to catch
> the potential error.
>
> Fixes: 05d8af449d93 ("pinctrl: stm32: Keep pinctrl block clock enabled when LEVEL IRQ requested")
> Signed-off-by: Mingwei Zheng <zmw12306@gmail.com>
> Signed-off-by: Jiasheng Jiang <jiashengjiangcool@gmail.com>
> ---
> Changelog:
>
> v7 -> v8:
> 1. Remove all previously registered GPIO chips before disabling
> the clocks.
>
> v6 -> v7:
> 1. Move clk_bulk_prepare_enable() before calling
> stm32_gpiolib_register_bank().
>
> v5 -> v6:
> 1. Call devm_clk_bulk_get_all in stm32_pctl_probe().
>
> v4 -> v5:
> 1. Move the clock handling from stm32_gpiolib_register_bank()
> and moving it to its caller.
> 2. Call clk_bulk_prepare_enable() in stm32_pctl_probe()
> and clk_bulk_disable_unprepare() for error.
>
> v3 -> v4:
> 1. Add initialization for pctl->clks.
> 2. Adjust alignment.
>
> v2 -> v3:
>
> 1. Convert clk_disable_unprepare to clk_bulk_disable
> and clk_bulk_unprepare.
>
> v1 -> v2:
>
> 1. Move int ret declaration into if block.
> ---
> drivers/pinctrl/stm32/pinctrl-stm32.c | 76 ++++++++++++---------------
> 1 file changed, 34 insertions(+), 42 deletions(-)
>
> diff --git a/drivers/pinctrl/stm32/pinctrl-stm32.c b/drivers/pinctrl/stm32/pinctrl-stm32.c
> index 5b7fa77c1184..32c04391e2a0 100644
> --- a/drivers/pinctrl/stm32/pinctrl-stm32.c
> +++ b/drivers/pinctrl/stm32/pinctrl-stm32.c
> @@ -86,7 +86,6 @@ struct stm32_pinctrl_group {
>
> struct stm32_gpio_bank {
> void __iomem *base;
> - struct clk *clk;
> struct reset_control *rstc;
> spinlock_t lock;
> struct gpio_chip gpio_chip;
> @@ -108,6 +107,7 @@ struct stm32_pinctrl {
> unsigned ngroups;
> const char **grp_names;
> struct stm32_gpio_bank *banks;
> + struct clk_bulk_data *clks;
> unsigned nbanks;
> const struct stm32_pinctrl_match_data *match_data;
> struct irq_domain *domain;
> @@ -1308,12 +1308,6 @@ static int stm32_gpiolib_register_bank(struct stm32_pinctrl *pctl, struct fwnode
> if (IS_ERR(bank->base))
> return PTR_ERR(bank->base);
>
> - err = clk_prepare_enable(bank->clk);
> - if (err) {
> - dev_err(dev, "failed to prepare_enable clk (%d)\n", err);
> - return err;
> - }
> -
> bank->gpio_chip = stm32_gpio_template;
>
> fwnode_property_read_string(fwnode, "st,bank-name", &bank->gpio_chip.label);
> @@ -1360,26 +1354,21 @@ static int stm32_gpiolib_register_bank(struct stm32_pinctrl *pctl, struct fwnode
> bank->fwnode, &stm32_gpio_domain_ops,
> bank);
>
> - if (!bank->domain) {
> - err = -ENODEV;
> - goto err_clk;
> - }
> + if (!bank->domain)
> + return -ENODEV;
> }
>
> names = devm_kcalloc(dev, npins, sizeof(char *), GFP_KERNEL);
> - if (!names) {
> - err = -ENOMEM;
> - goto err_clk;
> - }
> + if (!names)
> + return -ENOMEM;
>
> for (i = 0; i < npins; i++) {
> stm32_pin = stm32_pctrl_get_desc_pin_from_gpio(pctl, bank, i);
> if (stm32_pin && stm32_pin->pin.name) {
> names[i] = devm_kasprintf(dev, GFP_KERNEL, "%s", stm32_pin->pin.name);
> - if (!names[i]) {
> - err = -ENOMEM;
> - goto err_clk;
> - }
> + if (!names[i])
> + return -ENOMEM;
> +
> } else {
> names[i] = NULL;
> }
> @@ -1390,15 +1379,11 @@ static int stm32_gpiolib_register_bank(struct stm32_pinctrl *pctl, struct fwnode
> err = gpiochip_add_data(&bank->gpio_chip, bank);
> if (err) {
> dev_err(dev, "Failed to add gpiochip(%d)!\n", bank_nr);
> - goto err_clk;
> + return err;
> }
>
> dev_info(dev, "%s bank added\n", bank->gpio_chip.label);
> return 0;
> -
> -err_clk:
> - clk_disable_unprepare(bank->clk);
> - return err;
> }
>
> static struct irq_domain *stm32_pctrl_get_irq_domain(struct platform_device *pdev)
> @@ -1621,6 +1606,10 @@ int stm32_pctl_probe(struct platform_device *pdev)
> if (!pctl->banks)
> return -ENOMEM;
>
> + ret = devm_clk_bulk_get_all(dev, &pctl->clks);
NO! It crashes at boot!
As I have already stated in my comment on patch V3 (7 Dec 2024) we cannot use devm_clk_bulk_get_all() because it requires a property 'clocks' in the top node that lists all the clocks to be collected.
Instead STM32 pinctrl has a clock per subnode, so devm_clk_bulk_get_all() is not suitable for this driver. And even changing the bindings, we still need to support legacy DT.
I see from the log that devm_clk_bulk_get_all() has been introduced in V6.
Clement tested successfully your V4.
Please submit a new version that, like V5, parses the subnodes to build each pctl->clks[i].
Regards,
Antonio
On 12/31/24 5:27 AM, Mingwei Zheng wrote:
> Convert the driver to clk_bulk*() API.
> Add check for the return value of clk_bulk_enable() to catch
> the potential error.
>
> Fixes: 05d8af449d93 ("pinctrl: stm32: Keep pinctrl block clock enabled when LEVEL IRQ requested")
> Signed-off-by: Mingwei Zheng <zmw12306@gmail.com>
> Signed-off-by: Jiasheng Jiang <jiashengjiangcool@gmail.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Thanks !
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