From: Praveenkumar I <quic_ipkumar@quicinc.com>
The IPQ5332 and IPQ5424 use TSENS v2.3.3 IP with combined interrupt.
RPM is not available in these SoCs, hence adding new compatible
to have the sensor enablement and calibration function. Also add
nvmem-cell-names.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com>
Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
---
Changes in V10:
- No change
.../bindings/thermal/qcom-tsens.yaml | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
index ed5de0f92a9e..81bcdb586c36 100644
--- a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
+++ b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
@@ -75,6 +75,8 @@ properties:
- description: v2 of TSENS with combined interrupt
enum:
+ - qcom,ipq5332-tsens
+ - qcom,ipq5424-tsens
- qcom,ipq8074-tsens
- description: v2 of TSENS with combined interrupt
@@ -211,6 +213,18 @@ properties:
- const: s9_p2_backup
- const: s10_p1_backup
- const: s10_p2_backup
+ - minItems: 8
+ items:
+ - const: mode
+ - const: base0
+ - const: base1
+ - pattern: '^tsens_sens[0-9]+_off$'
+ - pattern: '^tsens_sens[0-9]+_off$'
+ - pattern: '^tsens_sens[0-9]+_off$'
+ - pattern: '^tsens_sens[0-9]+_off$'
+ - pattern: '^tsens_sens[0-9]+_off$'
+ - pattern: '^tsens_sens[0-9]+_off$'
+ - pattern: '^tsens_sens[0-9]+_off$'
"#qcom,sensors":
description:
@@ -270,6 +284,8 @@ allOf:
compatible:
contains:
enum:
+ - qcom,ipq5332-tsens
+ - qcom,ipq5424-tsens
- qcom,ipq8074-tsens
then:
properties:
@@ -285,6 +301,8 @@ allOf:
compatible:
contains:
enum:
+ - qcom,ipq5332-tsens
+ - qcom,ipq5424-tsens
- qcom,ipq8074-tsens
- qcom,tsens-v0_1
- qcom,tsens-v1
--
2.34.1