[v2] KVM: arm64: Enable FGU (Fine Grained Undefined) for FEAT_FGT2 registers

[PATCH V2 01/46] arm64/sysreg: Update register fields for ID_AA64MMFR0_EL1

Posted by Anshuman Khandual 1 year, 2 months ago

This updates ID_AA64MMFR0_EL1.FGT and ID_AA64MMFR0_EL1.PARANGE register
fields as per the definitions based on DDI0601 2024-09.

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Mark Brown <broonie@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Reviewed-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
---
 arch/arm64/tools/sysreg | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index b081b54d6d22..a6cbe0dcd63b 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -1591,6 +1591,7 @@ EndEnum
 UnsignedEnum	59:56	FGT
 	0b0000	NI
 	0b0001	IMP
+	0b0010	FGT2
 EndEnum
 Res0	55:48
 UnsignedEnum	47:44	EXS
@@ -1652,6 +1653,7 @@ Enum	3:0	PARANGE
 	0b0100	44
 	0b0101	48
 	0b0110	52
+	0b0111	56
 EndEnum
 EndSysreg
 
-- 
2.25.1

Re: [PATCH V2 01/46] arm64/sysreg: Update register fields for ID_AA64MMFR0_EL1

Posted by Eric Auger 1 year, 1 month ago


On 12/10/24 06:52, Anshuman Khandual wrote:
> This updates ID_AA64MMFR0_EL1.FGT and ID_AA64MMFR0_EL1.PARANGE register
> fields as per the definitions based on DDI0601 2024-09.
> 
> Cc: Catalin Marinas <catalin.marinas@arm.com>
> Cc: Will Deacon <will@kernel.org>
> Cc: Mark Brown <broonie@kernel.org>
> Cc: linux-arm-kernel@lists.infradead.org
> Cc: linux-kernel@vger.kernel.org
> Reviewed-by: Mark Brown <broonie@kernel.org>
> Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>

Eric

> ---
>  arch/arm64/tools/sysreg | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
> index b081b54d6d22..a6cbe0dcd63b 100644
> --- a/arch/arm64/tools/sysreg
> +++ b/arch/arm64/tools/sysreg
> @@ -1591,6 +1591,7 @@ EndEnum
>  UnsignedEnum	59:56	FGT
>  	0b0000	NI
>  	0b0001	IMP
> +	0b0010	FGT2
>  EndEnum
>  Res0	55:48
>  UnsignedEnum	47:44	EXS
> @@ -1652,6 +1653,7 @@ Enum	3:0	PARANGE
>  	0b0100	44
>  	0b0101	48
>  	0b0110	52
> +	0b0111	56
>  EndEnum
>  EndSysreg
>

Re: [PATCH V2 01/46] arm64/sysreg: Update register fields for ID_AA64MMFR0_EL1

Posted by Mark Brown 1 year, 1 month ago

On Tue, Dec 10, 2024 at 11:22:26AM +0530, Anshuman Khandual wrote:
> This updates ID_AA64MMFR0_EL1.FGT and ID_AA64MMFR0_EL1.PARANGE register
> fields as per the definitions based on DDI0601 2024-09.

Reviewed-by: Mark Brown <broonie@kernel.org>