[PATCH V2 14/46] arm64/sysreg: Add register fields for SPMDEVAFF_EL1

Anshuman Khandual posted 46 patches 1 year, 2 months ago
[PATCH V2 14/46] arm64/sysreg: Add register fields for SPMDEVAFF_EL1
Posted by Anshuman Khandual 1 year, 2 months ago
This adds register fields for SPMDEVAFF_EL1 as per the definitions based
on DDI0601 2024-09.

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Mark Brown <broonie@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
---
 arch/arm64/tools/sysreg | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index fcb4ecd85d35..18b814ff2c41 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -114,6 +114,18 @@ Res0	63:1
 Field	0	OSLK
 EndSysreg
 
+Sysreg	SPMDEVAFF_EL1	2	0	9	13	6
+Res0	63:40
+Field	39:32	Aff3
+Field	31	F0V
+Field	30	U
+Res0	29:25
+Field	24	MT
+Field	23:16	Aff2
+Field	15:8	Aff1
+Field	7:0	Aff0
+EndSysreg
+
 Sysreg ID_PFR0_EL1	3	0	0	1	0
 Res0	63:32
 UnsignedEnum	31:28	RAS
-- 
2.25.1
Re: [PATCH V2 14/46] arm64/sysreg: Add register fields for SPMDEVAFF_EL1
Posted by Eric Auger 1 year, 1 month ago

On 12/10/24 06:52, Anshuman Khandual wrote:
> This adds register fields for SPMDEVAFF_EL1 as per the definitions based
> on DDI0601 2024-09.
> 
> Cc: Catalin Marinas <catalin.marinas@arm.com>
> Cc: Will Deacon <will@kernel.org>
> Cc: Mark Brown <broonie@kernel.org>
> Cc: linux-arm-kernel@lists.infradead.org
> Cc: linux-kernel@vger.kernel.org
> Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>

Eric
> ---
>  arch/arm64/tools/sysreg | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
> 
> diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
> index fcb4ecd85d35..18b814ff2c41 100644
> --- a/arch/arm64/tools/sysreg
> +++ b/arch/arm64/tools/sysreg
> @@ -114,6 +114,18 @@ Res0	63:1
>  Field	0	OSLK
>  EndSysreg
>  
> +Sysreg	SPMDEVAFF_EL1	2	0	9	13	6
> +Res0	63:40
> +Field	39:32	Aff3
> +Field	31	F0V
> +Field	30	U
> +Res0	29:25
> +Field	24	MT
> +Field	23:16	Aff2
> +Field	15:8	Aff1
> +Field	7:0	Aff0
> +EndSysreg
> +
>  Sysreg ID_PFR0_EL1	3	0	0	1	0
>  Res0	63:32
>  UnsignedEnum	31:28	RAS