[v2] KVM: arm64: Enable FGU (Fine Grained Undefined) for FEAT_FGT2 registers

[PATCH V2 11/46] arm64/sysreg: Add register fields for PMSIDR_EL1

Posted by Anshuman Khandual 1 year, 2 months ago

This adds register fields for PMSIDR_EL1 as per the definitions based
on DDI0601 2024-09.

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Mark Brown <broonie@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
---
 arch/arm64/tools/sysreg | 16 ++++++++++++++--
 1 file changed, 14 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index be0091060350..a5e31e4c4474 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -2172,7 +2172,16 @@ Field	15:0	MINLAT
 EndSysreg
 
 Sysreg	PMSIDR_EL1	3	0	9	9	7
-Res0	63:25
+Res0	63:33
+Field	32	SME
+UnsignedEnum	31:28	ALTCLK
+	0b0000	NI
+	0b0001	IMP
+	0b1111	IMP_DEF
+EndEnum
+Field	27	FPF
+Field	26	EFT
+Field	25	CRR
 Field	24	PBT
 Field	23:20	FORMAT
 Enum	19:16	COUNTSIZE
@@ -2190,7 +2199,10 @@ Enum	11:8	INTERVAL
 	0b0111	3072
 	0b1000	4096
 EndEnum
-Res0	7
+UnsignedEnum	7	FDS
+	0b0	NI
+	0b1	IMP
+EndEnum
 Field	6	FnE
 Field	5	ERND
 Field	4	LDS
-- 
2.25.1

Re: [PATCH V2 11/46] arm64/sysreg: Add register fields for PMSIDR_EL1

Posted by Eric Auger 1 year, 1 month ago


On 12/10/24 06:52, Anshuman Khandual wrote:
> This adds register fields for PMSIDR_EL1 as per the definitions based
> on DDI0601 2024-09.
> 
> Cc: Catalin Marinas <catalin.marinas@arm.com>
> Cc: Will Deacon <will@kernel.org>
> Cc: Mark Brown <broonie@kernel.org>
> Cc: linux-arm-kernel@lists.infradead.org
> Cc: linux-kernel@vger.kernel.org
> Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>

Eric
> ---
>  arch/arm64/tools/sysreg | 16 ++++++++++++++--
>  1 file changed, 14 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
> index be0091060350..a5e31e4c4474 100644
> --- a/arch/arm64/tools/sysreg
> +++ b/arch/arm64/tools/sysreg
> @@ -2172,7 +2172,16 @@ Field	15:0	MINLAT
>  EndSysreg
>  
>  Sysreg	PMSIDR_EL1	3	0	9	9	7
> -Res0	63:25
> +Res0	63:33
> +Field	32	SME
> +UnsignedEnum	31:28	ALTCLK
> +	0b0000	NI
> +	0b0001	IMP
> +	0b1111	IMP_DEF
> +EndEnum
> +Field	27	FPF
> +Field	26	EFT
> +Field	25	CRR
>  Field	24	PBT
>  Field	23:20	FORMAT
>  Enum	19:16	COUNTSIZE
> @@ -2190,7 +2199,10 @@ Enum	11:8	INTERVAL
>  	0b0111	3072
>  	0b1000	4096
>  EndEnum
> -Res0	7
> +UnsignedEnum	7	FDS
> +	0b0	NI
> +	0b1	IMP
> +EndEnum
>  Field	6	FnE
>  Field	5	ERND
>  Field	4	LDS

Re: [PATCH V2 11/46] arm64/sysreg: Add register fields for PMSIDR_EL1

Posted by Mark Brown 1 year, 1 month ago

On Tue, Dec 10, 2024 at 11:22:36AM +0530, Anshuman Khandual wrote:
> This adds register fields for PMSIDR_EL1 as per the definitions based
> on DDI0601 2024-09.

Reviewed-by: Mark Brown <broonie@kernel.org>