From: Pengfei Li <pengfei.li_1@nxp.com>

Introduce support for the i.MX91 thermal monitoring unit, which features a
single sensor for the CPU. The register layout differs from other chips,
necessitating the creation of a dedicated file for this.

Signed-off-by: Pengfei Li <pengfei.li_1@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
change from v1 to v2
- use low case for hexvalue
- combine struct imx91_tmu and tmu_sensor
- simplify imx91_tmu_start() and imx91_tmu_enable()
- use s16 for imx91_tmu_get_temp(), which may negative value
- use reverse christmas tree style
- use run time pm
- use oneshot to sample temp
- register thermal zone after hardware init
---
 drivers/thermal/Kconfig         |  10 ++
 drivers/thermal/Makefile        |   1 +
 drivers/thermal/imx91_thermal.c | 265 ++++++++++++++++++++++++++++++++++++++++
 3 files changed, 276 insertions(+)

diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
index d3f9686e26e71..da403ed86aeb1 100644
--- a/drivers/thermal/Kconfig
+++ b/drivers/thermal/Kconfig
@@ -296,6 +296,16 @@ config IMX8MM_THERMAL
 	  cpufreq is used as the cooling device to throttle CPUs when the passive
 	  trip is crossed.
 
+config IMX91_THERMAL
+	tristate "Temperature sensor driver for NXP i.MX91 SoC"
+	depends on ARCH_MXC || COMPILE_TEST
+	depends on OF
+	help
+	  Support for Temperature sensor found on NXP i.MX91 SoC.
+	  It supports one critical trip point and one passive trip point. The
+	  cpufreq is used as the cooling device to throttle CPUs when the passive
+	  trip is crossed.
+
 config K3_THERMAL
 	tristate "Texas Instruments K3 thermal support"
 	depends on ARCH_K3 || COMPILE_TEST
diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
index 9abf43a74f2bb..08da241e6a598 100644
--- a/drivers/thermal/Makefile
+++ b/drivers/thermal/Makefile
@@ -50,6 +50,7 @@ obj-$(CONFIG_ARMADA_THERMAL)	+= armada_thermal.o
 obj-$(CONFIG_IMX_THERMAL)	+= imx_thermal.o
 obj-$(CONFIG_IMX_SC_THERMAL)	+= imx_sc_thermal.o
 obj-$(CONFIG_IMX8MM_THERMAL)	+= imx8mm_thermal.o
+obj-$(CONFIG_IMX91_THERMAL)	+= imx91_thermal.o
 obj-$(CONFIG_MAX77620_THERMAL)	+= max77620_thermal.o
 obj-$(CONFIG_QORIQ_THERMAL)	+= qoriq_thermal.o
 obj-$(CONFIG_DA9062_THERMAL)	+= da9062-thermal.o
diff --git a/drivers/thermal/imx91_thermal.c b/drivers/thermal/imx91_thermal.c
new file mode 100644
index 0000000000000..ebb59eda92951
--- /dev/null
+++ b/drivers/thermal/imx91_thermal.c
@@ -0,0 +1,265 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright 2024 NXP.
+ */
+
+#include <linux/bitfield.h>
+#include <linux/clk.h>
+#include <linux/err.h>
+#include <linux/iopoll.h>
+#include <linux/nvmem-consumer.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/pm_runtime.h>
+#include <linux/thermal.h>
+
+#define CTRL0			0x0
+
+#define STAT0			0x10
+#define STAT0_DRDY0_IF_MASK	BIT(16)
+
+#define DATA0			0x20
+
+#define THR_CTRL01		0x30
+#define THR_CTRL23		0x40
+
+#define CTRL1			0x200
+#define CTRL1_SET		0x204
+#define CTRL1_CLR		0x208
+#define CTRL1_EN		BIT(31)
+#define CTRL1_START		BIT(30)
+#define CTRL1_STOP		BIT(29)
+#define CTRL1_RES_MASK		GENMASK(19, 18)
+#define CTRL1_MEAS_MODE_MASK	GENMASK(25, 24)
+#define   CTRL1_MEAS_MODE_SINGLE	0
+#define   CTRL1_MEAS_MODE_CONTINUES	1
+#define   CTRL1_MEAS_MODE_PERIODIC	2
+
+#define REF_DIV			0x280
+#define DIV_EN			BIT(31)
+#define DIV_MASK		GENMASK(23, 16)
+
+#define PUD_ST_CTRL		0x2B0
+#define PUDL_MASK		GENMASK(23, 16)
+
+#define TRIM1			0x2E0
+#define TRIM2			0x2F0
+
+#define TMU_TEMP_LOW_LIMIT	-40000
+#define TMU_TEMP_HIGH_LIMIT	125000
+
+#define DEFAULT_TRIM1_CONFIG 0xb561bc2d
+#define DEFAULT_TRIM2_CONFIG 0x65d4
+
+struct imx91_tmu {
+	void __iomem *base;
+	struct clk *clk;
+	struct device *dev;
+	struct thermal_zone_device *tzd;
+};
+
+static void imx91_tmu_start(struct imx91_tmu *tmu, bool start)
+{
+	u32 val = start ? CTRL1_START : CTRL1_STOP;
+
+	writel_relaxed(val, tmu->base + CTRL1_SET);
+}
+
+static void imx91_tmu_enable(struct imx91_tmu *tmu, bool enable)
+{
+	u32 reg = enable ? CTRL1_SET : CTRL1_CLR;
+
+	writel_relaxed(CTRL1_EN, tmu->base + reg);
+}
+
+static int imx91_tmu_get_temp(struct thermal_zone_device *tz, int *temp)
+{
+	struct imx91_tmu *tmu = thermal_zone_device_priv(tz);
+	s16 data;
+	int ret;
+	u32 val;
+
+	ret = pm_runtime_resume_and_get(tmu->dev);
+	if (ret < 0)
+		return ret;
+
+	ret = readl_relaxed_poll_timeout(tmu->base + STAT0, val,
+					 val & STAT0_DRDY0_IF_MASK, 1000,
+					 40000);
+	if (ret)
+		return -EAGAIN;
+
+	/* DATA0 is 16bit signed number */
+	data = readw_relaxed(tmu->base + DATA0);
+	*temp = data * 1000 / 64;
+	if (*temp < TMU_TEMP_LOW_LIMIT || *temp > TMU_TEMP_HIGH_LIMIT)
+		return -EAGAIN;
+
+	pm_runtime_put(tmu->dev);
+
+	return 0;
+}
+
+static struct thermal_zone_device_ops tmu_tz_ops = {
+	.get_temp = imx91_tmu_get_temp,
+};
+
+static int imx91_init_from_nvmem_cells(struct imx91_tmu *tmu)
+{
+	struct device *dev = tmu->dev;
+	u32 trim1, trim2;
+	int ret;
+
+	ret = nvmem_cell_read_u32(dev, "trim1", &trim1);
+	if (ret)
+		return ret;
+
+	ret = nvmem_cell_read_u32(dev, "trim2", &trim2);
+	if (ret)
+		return ret;
+
+	if (trim1 == 0 || trim2 == 0)
+		return -EINVAL;
+
+	writel_relaxed(trim1, tmu->base + TRIM1);
+	writel_relaxed(trim2, tmu->base + TRIM2);
+
+	return 0;
+}
+
+static int imx91_tmu_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct imx91_tmu *tmu;
+	unsigned long rate;
+	u32 div;
+	int ret;
+
+	tmu = devm_kzalloc(&pdev->dev, sizeof(struct imx91_tmu), GFP_KERNEL);
+	if (!tmu)
+		return -ENOMEM;
+
+	tmu->dev = &pdev->dev;
+
+	tmu->base = devm_platform_ioremap_resource(pdev, 0);
+	if (IS_ERR(tmu->base))
+		return PTR_ERR(tmu->base);
+
+	tmu->clk = devm_clk_get_enabled(dev, NULL);
+	if (IS_ERR(tmu->clk))
+		return dev_err_probe(dev, PTR_ERR(tmu->clk), "failed to get tmu clock\n");
+
+	platform_set_drvdata(pdev, tmu);
+
+	/* disable the monitor during initialization */
+	imx91_tmu_enable(tmu, false);
+	imx91_tmu_start(tmu, false);
+
+	ret = imx91_init_from_nvmem_cells(tmu);
+	if (ret) {
+		writel_relaxed(DEFAULT_TRIM1_CONFIG, tmu->base + TRIM1);
+		writel_relaxed(DEFAULT_TRIM2_CONFIG, tmu->base + TRIM2);
+	}
+
+	/* The typical conv clk is 4MHz, the output freq is 'rate / (div + 1)' */
+	rate = clk_get_rate(tmu->clk);
+	div = (rate / 4000000) - 1;
+	if (div > FIELD_GET(DIV_MASK, DIV_MASK))
+		return -EINVAL;
+
+	/* Set divider value and enable divider */
+	writel_relaxed(DIV_EN | FIELD_PREP(DIV_MASK, div), tmu->base + REF_DIV);
+
+	/* Set max power up delay: 'Tpud(ms) = 0xFF * 1000 / 4000000' */
+	writel_relaxed(FIELD_PREP(PUDL_MASK, 100U), tmu->base + PUD_ST_CTRL);
+
+	/*
+	 * Set resolution mode
+	 * 00b - Conversion time = 0.59325 ms
+	 * 01b - Conversion time = 1.10525 ms
+	 * 10b - Conversion time = 2.12925 ms
+	 * 11b - Conversion time = 4.17725 ms
+	 */
+	writel_relaxed(FIELD_PREP(CTRL1_RES_MASK, 0x3), tmu->base + CTRL1_CLR);
+	writel_relaxed(FIELD_PREP(CTRL1_RES_MASK, 0x1), tmu->base + CTRL1_SET);
+
+	writel_relaxed(CTRL1_MEAS_MODE_MASK, tmu->base + CTRL1_CLR);
+	writel_relaxed(FIELD_PREP(CTRL1_MEAS_MODE_MASK, CTRL1_MEAS_MODE_SINGLE),
+		       tmu->base + CTRL1_SET);
+
+	clk_disable_unprepare(tmu->clk);
+	pm_runtime_set_suspended(dev);
+	pm_runtime_enable(dev);
+
+	tmu->tzd = devm_thermal_of_zone_register(dev, 0, tmu, &tmu_tz_ops);
+	if (IS_ERR(tmu->tzd))
+		return dev_err_probe(dev, PTR_ERR(tmu->tzd),
+				     "failed to register thermal zone sensor\n");
+
+	return 0;
+}
+
+static void imx91_tmu_remove(struct platform_device *pdev)
+{
+	struct imx91_tmu *tmu = platform_get_drvdata(pdev);
+
+	/* disable tmu */
+	imx91_tmu_start(tmu, false);
+	imx91_tmu_enable(tmu, false);
+}
+
+static int imx91_tmu_runtime_suspend(struct device *dev)
+{
+	struct imx91_tmu *tmu = dev_get_drvdata(dev);
+
+	/* disable tmu */
+	imx91_tmu_start(tmu, false);
+	imx91_tmu_enable(tmu, false);
+
+	clk_disable_unprepare(tmu->clk);
+
+	return 0;
+}
+
+static int imx91_tmu_runtime_resume(struct device *dev)
+{
+	struct imx91_tmu *tmu = dev_get_drvdata(dev);
+	int ret;
+
+	ret = clk_prepare_enable(tmu->clk);
+	if (ret)
+		return ret;
+
+	imx91_tmu_enable(tmu, true);
+	imx91_tmu_start(tmu, true);
+
+	return 0;
+}
+
+static const struct dev_pm_ops imx91_tmu_pm_ops = {
+	SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, pm_runtime_force_resume)
+	RUNTIME_PM_OPS(imx91_tmu_runtime_suspend, imx91_tmu_runtime_resume, NULL)
+};
+
+static const struct of_device_id imx91_tmu_table[] = {
+	{ .compatible = "fsl,imx91-tmu", },
+	{ },
+};
+MODULE_DEVICE_TABLE(of, imx91_tmu_table);
+
+static struct platform_driver imx91_tmu = {
+	.driver = {
+		.name	= "i.MX91_thermal",
+		.pm	= pm_ptr(&imx91_tmu_pm_ops),
+		.of_match_table = imx91_tmu_table,
+	},
+	.probe = imx91_tmu_probe,
+	.remove = imx91_tmu_remove,
+};
+module_platform_driver(imx91_tmu);
+
+MODULE_AUTHOR("Peng Fan <peng.fan@nxp.com>");
+MODULE_DESCRIPTION("i.MX91 Thermal Monitor Unit driver");
+MODULE_LICENSE("GPL");

-- 
2.34.1

On Tue, Dec 10, 2024 at 6:27 PM Frank Li <Frank.Li@nxp.com> wrote:

> +#define CTRL0                  0x0
> +
> +#define STAT0                  0x10
...
> +#define DATA0                  0x20

These generic short macro names can easily clash in the future.

It would be better to add a better namespace definition.

For example:

IMX91_THERMAL_CTRL0
IMX91_THERMAL_STAT0
IMX91_THERMAL_DATA0

On 24-12-10, Frank Li wrote:
> From: Pengfei Li <pengfei.li_1@nxp.com>
> 
> Introduce support for the i.MX91 thermal monitoring unit, which features a
> single sensor for the CPU. The register layout differs from other chips,
> necessitating the creation of a dedicated file for this.
> 
> Signed-off-by: Pengfei Li <pengfei.li_1@nxp.com>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> Signed-off-by: Frank Li <Frank.Li@nxp.com>
> ---
> change from v1 to v2
> - use low case for hexvalue
> - combine struct imx91_tmu and tmu_sensor
> - simplify imx91_tmu_start() and imx91_tmu_enable()
> - use s16 for imx91_tmu_get_temp(), which may negative value
> - use reverse christmas tree style
> - use run time pm
> - use oneshot to sample temp
> - register thermal zone after hardware init
> ---
>  drivers/thermal/Kconfig         |  10 ++
>  drivers/thermal/Makefile        |   1 +
>  drivers/thermal/imx91_thermal.c | 265 ++++++++++++++++++++++++++++++++++++++++
>  3 files changed, 276 insertions(+)
> 
> diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
> index d3f9686e26e71..da403ed86aeb1 100644
> --- a/drivers/thermal/Kconfig
> +++ b/drivers/thermal/Kconfig
> @@ -296,6 +296,16 @@ config IMX8MM_THERMAL
>  	  cpufreq is used as the cooling device to throttle CPUs when the passive
>  	  trip is crossed.
>  
> +config IMX91_THERMAL
> +	tristate "Temperature sensor driver for NXP i.MX91 SoC"
> +	depends on ARCH_MXC || COMPILE_TEST
> +	depends on OF
> +	help
> +	  Support for Temperature sensor found on NXP i.MX91 SoC.
> +	  It supports one critical trip point and one passive trip point. The
> +	  cpufreq is used as the cooling device to throttle CPUs when the passive
> +	  trip is crossed.
> +
>  config K3_THERMAL
>  	tristate "Texas Instruments K3 thermal support"
>  	depends on ARCH_K3 || COMPILE_TEST
> diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
> index 9abf43a74f2bb..08da241e6a598 100644
> --- a/drivers/thermal/Makefile
> +++ b/drivers/thermal/Makefile
> @@ -50,6 +50,7 @@ obj-$(CONFIG_ARMADA_THERMAL)	+= armada_thermal.o
>  obj-$(CONFIG_IMX_THERMAL)	+= imx_thermal.o
>  obj-$(CONFIG_IMX_SC_THERMAL)	+= imx_sc_thermal.o
>  obj-$(CONFIG_IMX8MM_THERMAL)	+= imx8mm_thermal.o
> +obj-$(CONFIG_IMX91_THERMAL)	+= imx91_thermal.o
>  obj-$(CONFIG_MAX77620_THERMAL)	+= max77620_thermal.o
>  obj-$(CONFIG_QORIQ_THERMAL)	+= qoriq_thermal.o
>  obj-$(CONFIG_DA9062_THERMAL)	+= da9062-thermal.o
> diff --git a/drivers/thermal/imx91_thermal.c b/drivers/thermal/imx91_thermal.c
> new file mode 100644
> index 0000000000000..ebb59eda92951
> --- /dev/null
> +++ b/drivers/thermal/imx91_thermal.c
> @@ -0,0 +1,265 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright 2024 NXP.
> + */
> +
> +#include <linux/bitfield.h>
> +#include <linux/clk.h>
> +#include <linux/err.h>
> +#include <linux/iopoll.h>
> +#include <linux/nvmem-consumer.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/of_device.h>
> +#include <linux/platform_device.h>
> +#include <linux/pm_runtime.h>
> +#include <linux/thermal.h>
> +
> +#define CTRL0			0x0

Unused

> +
> +#define STAT0			0x10
> +#define STAT0_DRDY0_IF_MASK	BIT(16)
> +
> +#define DATA0			0x20
> +
> +#define THR_CTRL01		0x30
> +#define THR_CTRL23		0x40

Both are unused too

> +#define CTRL1			0x200

Unused

> +#define CTRL1_SET		0x204
> +#define CTRL1_CLR		0x208
> +#define CTRL1_EN		BIT(31)
> +#define CTRL1_START		BIT(30)
> +#define CTRL1_STOP		BIT(29)
> +#define CTRL1_RES_MASK		GENMASK(19, 18)
> +#define CTRL1_MEAS_MODE_MASK	GENMASK(25, 24)
> +#define   CTRL1_MEAS_MODE_SINGLE	0
> +#define   CTRL1_MEAS_MODE_CONTINUES	1
> +#define   CTRL1_MEAS_MODE_PERIODIC	2
> +
> +#define REF_DIV			0x280
> +#define DIV_EN			BIT(31)
> +#define DIV_MASK		GENMASK(23, 16)
> +
> +#define PUD_ST_CTRL		0x2B0
> +#define PUDL_MASK		GENMASK(23, 16)
> +
> +#define TRIM1			0x2E0
> +#define TRIM2			0x2F0
					^
				still upper-case

> +#define TMU_TEMP_LOW_LIMIT	-40000
> +#define TMU_TEMP_HIGH_LIMIT	125000
> +
> +#define DEFAULT_TRIM1_CONFIG 0xb561bc2d
> +#define DEFAULT_TRIM2_CONFIG 0x65d4
> +
> +struct imx91_tmu {
> +	void __iomem *base;
> +	struct clk *clk;
> +	struct device *dev;
> +	struct thermal_zone_device *tzd;
> +};
> +
> +static void imx91_tmu_start(struct imx91_tmu *tmu, bool start)
> +{
> +	u32 val = start ? CTRL1_START : CTRL1_STOP;
> +
> +	writel_relaxed(val, tmu->base + CTRL1_SET);
> +}
> +
> +static void imx91_tmu_enable(struct imx91_tmu *tmu, bool enable)
> +{
> +	u32 reg = enable ? CTRL1_SET : CTRL1_CLR;
> +
> +	writel_relaxed(CTRL1_EN, tmu->base + reg);
> +}
> +
> +static int imx91_tmu_get_temp(struct thermal_zone_device *tz, int *temp)
> +{
> +	struct imx91_tmu *tmu = thermal_zone_device_priv(tz);
> +	s16 data;
> +	int ret;
> +	u32 val;
> +
> +	ret = pm_runtime_resume_and_get(tmu->dev);
> +	if (ret < 0)
> +		return ret;
> +
> +	ret = readl_relaxed_poll_timeout(tmu->base + STAT0, val,
> +					 val & STAT0_DRDY0_IF_MASK, 1000,
> +					 40000);
> +	if (ret)
> +		return -EAGAIN;
		 ^
Missing pm_runtime_put(). Instead goto out;

> +
> +	/* DATA0 is 16bit signed number */
> +	data = readw_relaxed(tmu->base + DATA0);
> +	*temp = data * 1000 / 64;
> +	if (*temp < TMU_TEMP_LOW_LIMIT || *temp > TMU_TEMP_HIGH_LIMIT)
> +		return -EAGAIN;
			^
		ret = -EAGAIN;
		goto out;

out:
> +
> +	pm_runtime_put(tmu->dev);
> +
> +	return 0;
	
	return ret;
> +}
> +
> +static struct thermal_zone_device_ops tmu_tz_ops = {
> +	.get_temp = imx91_tmu_get_temp,
> +};
> +
> +static int imx91_init_from_nvmem_cells(struct imx91_tmu *tmu)
> +{
> +	struct device *dev = tmu->dev;
> +	u32 trim1, trim2;
> +	int ret;
> +
> +	ret = nvmem_cell_read_u32(dev, "trim1", &trim1);
> +	if (ret)
> +		return ret;
> +
> +	ret = nvmem_cell_read_u32(dev, "trim2", &trim2);
> +	if (ret)
> +		return ret;
> +
> +	if (trim1 == 0 || trim2 == 0)
> +		return -EINVAL;
> +
> +	writel_relaxed(trim1, tmu->base + TRIM1);
> +	writel_relaxed(trim2, tmu->base + TRIM2);
> +
> +	return 0;
> +}
> +
> +static int imx91_tmu_probe(struct platform_device *pdev)
> +{
> +	struct device *dev = &pdev->dev;

Since you already have the dev pointer, you can make use of it...

> +	struct imx91_tmu *tmu;
> +	unsigned long rate;
> +	u32 div;
> +	int ret;
> +
> +	tmu = devm_kzalloc(&pdev->dev, sizeof(struct imx91_tmu), GFP_KERNEL);
				^
				here
> +	if (!tmu)
> +		return -ENOMEM;
> +
> +	tmu->dev = &pdev->dev;

	and here

> +
> +	tmu->base = devm_platform_ioremap_resource(pdev, 0);
> +	if (IS_ERR(tmu->base))
> +		return PTR_ERR(tmu->base);
			^
		dev_err_probe();

> +
> +	tmu->clk = devm_clk_get_enabled(dev, NULL);
> +	if (IS_ERR(tmu->clk))
> +		return dev_err_probe(dev, PTR_ERR(tmu->clk), "failed to get tmu clock\n");
> +
> +	platform_set_drvdata(pdev, tmu);
> +
> +	/* disable the monitor during initialization */
> +	imx91_tmu_enable(tmu, false);
> +	imx91_tmu_start(tmu, false);

No need to disable it here since both bits (ENABLE and START) are 0
after a reset.

> +	ret = imx91_init_from_nvmem_cells(tmu);
> +	if (ret) {
> +		writel_relaxed(DEFAULT_TRIM1_CONFIG, tmu->base + TRIM1);
> +		writel_relaxed(DEFAULT_TRIM2_CONFIG, tmu->base + TRIM2);
			^
Can you please anwer if _relaxed API is sufficient? I don't know why you
making use of the _relaxed API here anyway. We have only a few MMIO
accesses here, so why can't we use the writel() instead? This applies to
the whole driver.

> +	}
> +
> +	/* The typical conv clk is 4MHz, the output freq is 'rate / (div + 1)' */
> +	rate = clk_get_rate(tmu->clk);
> +	div = (rate / 4000000) - 1;
> +	if (div > FIELD_GET(DIV_MASK, DIV_MASK))
			^
This misuse the FIELD_GET() API. Instead please add a define e.g. DIV_MAX.

> +		return -EINVAL;
			^
		dev_err_probe()
> +
> +	/* Set divider value and enable divider */
> +	writel_relaxed(DIV_EN | FIELD_PREP(DIV_MASK, div), tmu->base + REF_DIV);
> +
> +	/* Set max power up delay: 'Tpud(ms) = 0xFF * 1000 / 4000000' */
> +	writel_relaxed(FIELD_PREP(PUDL_MASK, 100U), tmu->base + PUD_ST_CTRL);
		^
You dont need to repeat the default value, so this line can be dropped.

> +
> +	/*
> +	 * Set resolution mode
> +	 * 00b - Conversion time = 0.59325 ms
> +	 * 01b - Conversion time = 1.10525 ms
> +	 * 10b - Conversion time = 2.12925 ms
> +	 * 11b - Conversion time = 4.17725 ms
> +	 */
> +	writel_relaxed(FIELD_PREP(CTRL1_RES_MASK, 0x3), tmu->base + CTRL1_CLR);
> +	writel_relaxed(FIELD_PREP(CTRL1_RES_MASK, 0x1), tmu->base + CTRL1_SET);

Same here, you repeat the module default after reset, so please drop it.

> +	writel_relaxed(CTRL1_MEAS_MODE_MASK, tmu->base + CTRL1_CLR);
> +	writel_relaxed(FIELD_PREP(CTRL1_MEAS_MODE_MASK, CTRL1_MEAS_MODE_SINGLE),
> +		       tmu->base + CTRL1_SET);
> +
> +	clk_disable_unprepare(tmu->clk);

Drop this, and

> +	pm_runtime_set_suspended(dev);

replace this with: pm_runtime_set_active()

> +	pm_runtime_enable(dev);
		^
devm_pm_runtime_enable()

> +	tmu->tzd = devm_thermal_of_zone_register(dev, 0, tmu, &tmu_tz_ops);
> +	if (IS_ERR(tmu->tzd))
> +		return dev_err_probe(dev, PTR_ERR(tmu->tzd),
> +				     "failed to register thermal zone sensor\n");


pm_runtime_put()


> +
> +	return 0;
> +}
> +
> +static void imx91_tmu_remove(struct platform_device *pdev)
> +{
> +	struct imx91_tmu *tmu = platform_get_drvdata(pdev);
> +
> +	/* disable tmu */
> +	imx91_tmu_start(tmu, false);

No need to clear the START bit since we are running in
single-shot-measurements now.

> +	imx91_tmu_enable(tmu, false);
> +}
> +
> +static int imx91_tmu_runtime_suspend(struct device *dev)
> +{
> +	struct imx91_tmu *tmu = dev_get_drvdata(dev);
> +
> +	/* disable tmu */
> +	imx91_tmu_start(tmu, false);

Can be dropped.

> +	imx91_tmu_enable(tmu, false);
> +
> +	clk_disable_unprepare(tmu->clk);
> +
> +	return 0;
> +}
> +
> +static int imx91_tmu_runtime_resume(struct device *dev)
> +{
> +	struct imx91_tmu *tmu = dev_get_drvdata(dev);
> +	int ret;
> +
> +	ret = clk_prepare_enable(tmu->clk);
> +	if (ret)
> +		return ret;
> +
> +	imx91_tmu_enable(tmu, true);
> +	imx91_tmu_start(tmu, true);

Drop imx91_tmu_start() from the resume since this isn't related to the
runtime-pm. Instead the function needs to be called within
imx91_tmu_get_temp().

> +	return 0;
> +}
> +
> +static const struct dev_pm_ops imx91_tmu_pm_ops = {
> +	SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, pm_runtime_force_resume)
> +	RUNTIME_PM_OPS(imx91_tmu_runtime_suspend, imx91_tmu_runtime_resume, NULL)
> +};

DEFINE_RUNTIME_DEV_PM_OPS()

> +
> +static const struct of_device_id imx91_tmu_table[] = {
> +	{ .compatible = "fsl,imx91-tmu", },
> +	{ },
> +};
> +MODULE_DEVICE_TABLE(of, imx91_tmu_table);
> +
> +static struct platform_driver imx91_tmu = {
> +	.driver = {
> +		.name	= "i.MX91_thermal",
				^
Please don't use such names, instead use imx91_thermal.

Regards,
  Marco

> +		.pm	= pm_ptr(&imx91_tmu_pm_ops),
> +		.of_match_table = imx91_tmu_table,
> +	},
> +	.probe = imx91_tmu_probe,
> +	.remove = imx91_tmu_remove,
> +};
> +module_platform_driver(imx91_tmu);
> +
> +MODULE_AUTHOR("Peng Fan <peng.fan@nxp.com>");
> +MODULE_DESCRIPTION("i.MX91 Thermal Monitor Unit driver");
> +MODULE_LICENSE("GPL");
> 
> -- 
> 2.34.1
> 
>

On Wed, Dec 11, 2024 at 04:46:22PM +0100, Marco Felsch wrote:
> On 24-12-10, Frank Li wrote:
> > From: Pengfei Li <pengfei.li_1@nxp.com>
> >
> > Introduce support for the i.MX91 thermal monitoring unit, which features a
> > single sensor for the CPU. The register layout differs from other chips,
> > necessitating the creation of a dedicated file for this.
> >
> > Signed-off-by: Pengfei Li <pengfei.li_1@nxp.com>
> > Signed-off-by: Peng Fan <peng.fan@nxp.com>
> > Signed-off-by: Frank Li <Frank.Li@nxp.com>
> > ---
> > change from v1 to v2
> > - use low case for hexvalue
> > - combine struct imx91_tmu and tmu_sensor
> > - simplify imx91_tmu_start() and imx91_tmu_enable()
> > - use s16 for imx91_tmu_get_temp(), which may negative value
> > - use reverse christmas tree style
> > - use run time pm
> > - use oneshot to sample temp
> > - register thermal zone after hardware init
> > ---
> >  drivers/thermal/Kconfig         |  10 ++
> >  drivers/thermal/Makefile        |   1 +
> >  drivers/thermal/imx91_thermal.c | 265 ++++++++++++++++++++++++++++++++++++++++
> >  3 files changed, 276 insertions(+)
> >
> > diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
> > index d3f9686e26e71..da403ed86aeb1 100644
> > --- a/drivers/thermal/Kconfig
> > +++ b/drivers/thermal/Kconfig
> > @@ -296,6 +296,16 @@ config IMX8MM_THERMAL
> >  	  cpufreq is used as the cooling device to throttle CPUs when the passive
> >  	  trip is crossed.
> >
> > +config IMX91_THERMAL
> > +	tristate "Temperature sensor driver for NXP i.MX91 SoC"
> > +	depends on ARCH_MXC || COMPILE_TEST
> > +	depends on OF
> > +	help
> > +	  Support for Temperature sensor found on NXP i.MX91 SoC.
> > +	  It supports one critical trip point and one passive trip point. The
> > +	  cpufreq is used as the cooling device to throttle CPUs when the passive
> > +	  trip is crossed.
> > +
> >  config K3_THERMAL
> >  	tristate "Texas Instruments K3 thermal support"
> >  	depends on ARCH_K3 || COMPILE_TEST
> > diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
> > index 9abf43a74f2bb..08da241e6a598 100644
> > --- a/drivers/thermal/Makefile
> > +++ b/drivers/thermal/Makefile
> > @@ -50,6 +50,7 @@ obj-$(CONFIG_ARMADA_THERMAL)	+= armada_thermal.o
> >  obj-$(CONFIG_IMX_THERMAL)	+= imx_thermal.o
> >  obj-$(CONFIG_IMX_SC_THERMAL)	+= imx_sc_thermal.o
> >  obj-$(CONFIG_IMX8MM_THERMAL)	+= imx8mm_thermal.o
> > +obj-$(CONFIG_IMX91_THERMAL)	+= imx91_thermal.o
> >  obj-$(CONFIG_MAX77620_THERMAL)	+= max77620_thermal.o
> >  obj-$(CONFIG_QORIQ_THERMAL)	+= qoriq_thermal.o
> >  obj-$(CONFIG_DA9062_THERMAL)	+= da9062-thermal.o
> > diff --git a/drivers/thermal/imx91_thermal.c b/drivers/thermal/imx91_thermal.c
> > new file mode 100644
> > index 0000000000000..ebb59eda92951
> > --- /dev/null
> > +++ b/drivers/thermal/imx91_thermal.c
> > @@ -0,0 +1,265 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Copyright 2024 NXP.
> > + */
> > +
> > +#include <linux/bitfield.h>
> > +#include <linux/clk.h>
> > +#include <linux/err.h>
> > +#include <linux/iopoll.h>
> > +#include <linux/nvmem-consumer.h>
> > +#include <linux/module.h>
> > +#include <linux/of.h>
> > +#include <linux/of_device.h>
> > +#include <linux/platform_device.h>
> > +#include <linux/pm_runtime.h>
> > +#include <linux/thermal.h>
> > +
> > +#define CTRL0			0x0
>
> Unused
>
> > +
> > +#define STAT0			0x10
> > +#define STAT0_DRDY0_IF_MASK	BIT(16)
> > +
> > +#define DATA0			0x20
> > +
> > +#define THR_CTRL01		0x30
> > +#define THR_CTRL23		0x40
>
> Both are unused too
>
> > +#define CTRL1			0x200
>
> Unused
>
> > +#define CTRL1_SET		0x204
> > +#define CTRL1_CLR		0x208
> > +#define CTRL1_EN		BIT(31)
> > +#define CTRL1_START		BIT(30)
> > +#define CTRL1_STOP		BIT(29)
> > +#define CTRL1_RES_MASK		GENMASK(19, 18)
> > +#define CTRL1_MEAS_MODE_MASK	GENMASK(25, 24)
> > +#define   CTRL1_MEAS_MODE_SINGLE	0
> > +#define   CTRL1_MEAS_MODE_CONTINUES	1
> > +#define   CTRL1_MEAS_MODE_PERIODIC	2
> > +
> > +#define REF_DIV			0x280
> > +#define DIV_EN			BIT(31)
> > +#define DIV_MASK		GENMASK(23, 16)
> > +
> > +#define PUD_ST_CTRL		0x2B0
> > +#define PUDL_MASK		GENMASK(23, 16)
> > +
> > +#define TRIM1			0x2E0
> > +#define TRIM2			0x2F0
> 					^
> 				still upper-case
>
> > +#define TMU_TEMP_LOW_LIMIT	-40000
> > +#define TMU_TEMP_HIGH_LIMIT	125000
> > +
> > +#define DEFAULT_TRIM1_CONFIG 0xb561bc2d
> > +#define DEFAULT_TRIM2_CONFIG 0x65d4
> > +
> > +struct imx91_tmu {
> > +	void __iomem *base;
> > +	struct clk *clk;
> > +	struct device *dev;
> > +	struct thermal_zone_device *tzd;
> > +};
> > +
> > +static void imx91_tmu_start(struct imx91_tmu *tmu, bool start)
> > +{
> > +	u32 val = start ? CTRL1_START : CTRL1_STOP;
> > +
> > +	writel_relaxed(val, tmu->base + CTRL1_SET);
> > +}
> > +
> > +static void imx91_tmu_enable(struct imx91_tmu *tmu, bool enable)
> > +{
> > +	u32 reg = enable ? CTRL1_SET : CTRL1_CLR;
> > +
> > +	writel_relaxed(CTRL1_EN, tmu->base + reg);
> > +}
> > +
> > +static int imx91_tmu_get_temp(struct thermal_zone_device *tz, int *temp)
> > +{
> > +	struct imx91_tmu *tmu = thermal_zone_device_priv(tz);
> > +	s16 data;
> > +	int ret;
> > +	u32 val;
> > +
> > +	ret = pm_runtime_resume_and_get(tmu->dev);
> > +	if (ret < 0)
> > +		return ret;
> > +
> > +	ret = readl_relaxed_poll_timeout(tmu->base + STAT0, val,
> > +					 val & STAT0_DRDY0_IF_MASK, 1000,
> > +					 40000);
> > +	if (ret)
> > +		return -EAGAIN;
> 		 ^
> Missing pm_runtime_put(). Instead goto out;
>
> > +
> > +	/* DATA0 is 16bit signed number */
> > +	data = readw_relaxed(tmu->base + DATA0);
> > +	*temp = data * 1000 / 64;
> > +	if (*temp < TMU_TEMP_LOW_LIMIT || *temp > TMU_TEMP_HIGH_LIMIT)
> > +		return -EAGAIN;
> 			^
> 		ret = -EAGAIN;
> 		goto out;
>
> out:
> > +
> > +	pm_runtime_put(tmu->dev);
> > +
> > +	return 0;
>
> 	return ret;
> > +}
> > +
> > +static struct thermal_zone_device_ops tmu_tz_ops = {
> > +	.get_temp = imx91_tmu_get_temp,
> > +};
> > +
> > +static int imx91_init_from_nvmem_cells(struct imx91_tmu *tmu)
> > +{
> > +	struct device *dev = tmu->dev;
> > +	u32 trim1, trim2;
> > +	int ret;
> > +
> > +	ret = nvmem_cell_read_u32(dev, "trim1", &trim1);
> > +	if (ret)
> > +		return ret;
> > +
> > +	ret = nvmem_cell_read_u32(dev, "trim2", &trim2);
> > +	if (ret)
> > +		return ret;
> > +
> > +	if (trim1 == 0 || trim2 == 0)
> > +		return -EINVAL;
> > +
> > +	writel_relaxed(trim1, tmu->base + TRIM1);
> > +	writel_relaxed(trim2, tmu->base + TRIM2);
> > +
> > +	return 0;
> > +}
> > +
> > +static int imx91_tmu_probe(struct platform_device *pdev)
> > +{
> > +	struct device *dev = &pdev->dev;
>
> Since you already have the dev pointer, you can make use of it...
>
> > +	struct imx91_tmu *tmu;
> > +	unsigned long rate;
> > +	u32 div;
> > +	int ret;
> > +
> > +	tmu = devm_kzalloc(&pdev->dev, sizeof(struct imx91_tmu), GFP_KERNEL);
> 				^
> 				here
> > +	if (!tmu)
> > +		return -ENOMEM;
> > +
> > +	tmu->dev = &pdev->dev;
>
> 	and here
>
> > +
> > +	tmu->base = devm_platform_ioremap_resource(pdev, 0);
> > +	if (IS_ERR(tmu->base))
> > +		return PTR_ERR(tmu->base);
> 			^
> 		dev_err_probe();
>
> > +
> > +	tmu->clk = devm_clk_get_enabled(dev, NULL);
> > +	if (IS_ERR(tmu->clk))
> > +		return dev_err_probe(dev, PTR_ERR(tmu->clk), "failed to get tmu clock\n");
> > +
> > +	platform_set_drvdata(pdev, tmu);
> > +
> > +	/* disable the monitor during initialization */
> > +	imx91_tmu_enable(tmu, false);
> > +	imx91_tmu_start(tmu, false);
>
> No need to disable it here since both bits (ENABLE and START) are 0
> after a reset.

Maybe uboot enable it. We can't depend on reset value without really set
hardware reset bit.

>
> > +	ret = imx91_init_from_nvmem_cells(tmu);
> > +	if (ret) {
> > +		writel_relaxed(DEFAULT_TRIM1_CONFIG, tmu->base + TRIM1);
> > +		writel_relaxed(DEFAULT_TRIM2_CONFIG, tmu->base + TRIM2);
> 			^
> Can you please anwer if _relaxed API is sufficient? I don't know why you
> making use of the _relaxed API here anyway. We have only a few MMIO
> accesses here, so why can't we use the writel() instead? This applies to
> the whole driver.

There are not big difference writel_relaxed() or writel() for this driver.
Just original owner pick one.

>
> > +	}
> > +
> > +	/* The typical conv clk is 4MHz, the output freq is 'rate / (div + 1)' */
> > +	rate = clk_get_rate(tmu->clk);
> > +	div = (rate / 4000000) - 1;
> > +	if (div > FIELD_GET(DIV_MASK, DIV_MASK))
> 			^
> This misuse the FIELD_GET() API. Instead please add a define e.g. DIV_MAX.

I don't think so, It avoid define another macro DIV_MAX, which may miss
defined, the related marco should come from one source.

For example:

DIV_MASK is GENMASK(23, 16),  DIV_MAX is 256. But if hardware upgrade,
DIV_MASK to GENMASK(24, 16), DIV_MAX is quite easy to forget update it and
hard to find such mis-match when div value < 256.

>
> > +		return -EINVAL;
> 			^
> 		dev_err_probe()
> > +
> > +	/* Set divider value and enable divider */
> > +	writel_relaxed(DIV_EN | FIELD_PREP(DIV_MASK, div), tmu->base + REF_DIV);
> > +
> > +	/* Set max power up delay: 'Tpud(ms) = 0xFF * 1000 / 4000000' */
> > +	writel_relaxed(FIELD_PREP(PUDL_MASK, 100U), tmu->base + PUD_ST_CTRL);
> 		^
> You dont need to repeat the default value, so this line can be dropped.
>
> > +
> > +	/*
> > +	 * Set resolution mode
> > +	 * 00b - Conversion time = 0.59325 ms
> > +	 * 01b - Conversion time = 1.10525 ms
> > +	 * 10b - Conversion time = 2.12925 ms
> > +	 * 11b - Conversion time = 4.17725 ms
> > +	 */
> > +	writel_relaxed(FIELD_PREP(CTRL1_RES_MASK, 0x3), tmu->base + CTRL1_CLR);
> > +	writel_relaxed(FIELD_PREP(CTRL1_RES_MASK, 0x1), tmu->base + CTRL1_SET);
>
> Same here, you repeat the module default after reset, so please drop it.
>
> > +	writel_relaxed(CTRL1_MEAS_MODE_MASK, tmu->base + CTRL1_CLR);
> > +	writel_relaxed(FIELD_PREP(CTRL1_MEAS_MODE_MASK, CTRL1_MEAS_MODE_SINGLE),
> > +		       tmu->base + CTRL1_SET);
> > +
> > +	clk_disable_unprepare(tmu->clk);
>
> Drop this, and
>
> > +	pm_runtime_set_suspended(dev);
>
> replace this with: pm_runtime_set_active();

No big difference, if set_active, we need add Enable TMU here. I can
change to set_active.

Frank

>
> > +	pm_runtime_enable(dev);
> 		^
> devm_pm_runtime_enable()
>
> > +	tmu->tzd = devm_thermal_of_zone_register(dev, 0, tmu, &tmu_tz_ops);
> > +	if (IS_ERR(tmu->tzd))
> > +		return dev_err_probe(dev, PTR_ERR(tmu->tzd),
> > +				     "failed to register thermal zone sensor\n");
>
>
> pm_runtime_put()
>
>
> > +
> > +	return 0;
> > +}
> > +
> > +static void imx91_tmu_remove(struct platform_device *pdev)
> > +{
> > +	struct imx91_tmu *tmu = platform_get_drvdata(pdev);
> > +
> > +	/* disable tmu */
> > +	imx91_tmu_start(tmu, false);
>
> No need to clear the START bit since we are running in
> single-shot-measurements now.
>
> > +	imx91_tmu_enable(tmu, false);
> > +}
> > +
> > +static int imx91_tmu_runtime_suspend(struct device *dev)
> > +{
> > +	struct imx91_tmu *tmu = dev_get_drvdata(dev);
> > +
> > +	/* disable tmu */
> > +	imx91_tmu_start(tmu, false);
>
> Can be dropped.
>
> > +	imx91_tmu_enable(tmu, false);
> > +
> > +	clk_disable_unprepare(tmu->clk);
> > +
> > +	return 0;
> > +}
> > +
> > +static int imx91_tmu_runtime_resume(struct device *dev)
> > +{
> > +	struct imx91_tmu *tmu = dev_get_drvdata(dev);
> > +	int ret;
> > +
> > +	ret = clk_prepare_enable(tmu->clk);
> > +	if (ret)
> > +		return ret;
> > +
> > +	imx91_tmu_enable(tmu, true);
> > +	imx91_tmu_start(tmu, true);
>
> Drop imx91_tmu_start() from the resume since this isn't related to the
> runtime-pm. Instead the function needs to be called within
> imx91_tmu_get_temp().
>
> > +	return 0;
> > +}
> > +
> > +static const struct dev_pm_ops imx91_tmu_pm_ops = {
> > +	SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, pm_runtime_force_resume)
> > +	RUNTIME_PM_OPS(imx91_tmu_runtime_suspend, imx91_tmu_runtime_resume, NULL)
> > +};
>
> DEFINE_RUNTIME_DEV_PM_OPS()
>
> > +
> > +static const struct of_device_id imx91_tmu_table[] = {
> > +	{ .compatible = "fsl,imx91-tmu", },
> > +	{ },
> > +};
> > +MODULE_DEVICE_TABLE(of, imx91_tmu_table);
> > +
> > +static struct platform_driver imx91_tmu = {
> > +	.driver = {
> > +		.name	= "i.MX91_thermal",
> 				^
> Please don't use such names, instead use imx91_thermal.
>
> Regards,
>   Marco
>
> > +		.pm	= pm_ptr(&imx91_tmu_pm_ops),
> > +		.of_match_table = imx91_tmu_table,
> > +	},
> > +	.probe = imx91_tmu_probe,
> > +	.remove = imx91_tmu_remove,
> > +};
> > +module_platform_driver(imx91_tmu);
> > +
> > +MODULE_AUTHOR("Peng Fan <peng.fan@nxp.com>");
> > +MODULE_DESCRIPTION("i.MX91 Thermal Monitor Unit driver");
> > +MODULE_LICENSE("GPL");
> >
> > --
> > 2.34.1
> >
> >

On 24-12-11, Frank Li wrote:
> On Wed, Dec 11, 2024 at 04:46:22PM +0100, Marco Felsch wrote:
> > On 24-12-10, Frank Li wrote:
> > > From: Pengfei Li <pengfei.li_1@nxp.com>
> > >
> > > Introduce support for the i.MX91 thermal monitoring unit, which features a
> > > single sensor for the CPU. The register layout differs from other chips,
> > > necessitating the creation of a dedicated file for this.
> > >
> > > Signed-off-by: Pengfei Li <pengfei.li_1@nxp.com>
> > > Signed-off-by: Peng Fan <peng.fan@nxp.com>
> > > Signed-off-by: Frank Li <Frank.Li@nxp.com>
> > > ---
> > > change from v1 to v2
> > > - use low case for hexvalue
> > > - combine struct imx91_tmu and tmu_sensor
> > > - simplify imx91_tmu_start() and imx91_tmu_enable()
> > > - use s16 for imx91_tmu_get_temp(), which may negative value
> > > - use reverse christmas tree style
> > > - use run time pm
> > > - use oneshot to sample temp
> > > - register thermal zone after hardware init
> > > ---
> > >  drivers/thermal/Kconfig         |  10 ++
> > >  drivers/thermal/Makefile        |   1 +
> > >  drivers/thermal/imx91_thermal.c | 265 ++++++++++++++++++++++++++++++++++++++++
> > >  3 files changed, 276 insertions(+)
> > >
> > > diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
> > > index d3f9686e26e71..da403ed86aeb1 100644
> > > --- a/drivers/thermal/Kconfig
> > > +++ b/drivers/thermal/Kconfig
> > > @@ -296,6 +296,16 @@ config IMX8MM_THERMAL
> > >  	  cpufreq is used as the cooling device to throttle CPUs when the passive
> > >  	  trip is crossed.
> > >
> > > +config IMX91_THERMAL
> > > +	tristate "Temperature sensor driver for NXP i.MX91 SoC"
> > > +	depends on ARCH_MXC || COMPILE_TEST
> > > +	depends on OF
> > > +	help
> > > +	  Support for Temperature sensor found on NXP i.MX91 SoC.
> > > +	  It supports one critical trip point and one passive trip point. The
> > > +	  cpufreq is used as the cooling device to throttle CPUs when the passive
> > > +	  trip is crossed.
> > > +
> > >  config K3_THERMAL
> > >  	tristate "Texas Instruments K3 thermal support"
> > >  	depends on ARCH_K3 || COMPILE_TEST
> > > diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
> > > index 9abf43a74f2bb..08da241e6a598 100644
> > > --- a/drivers/thermal/Makefile
> > > +++ b/drivers/thermal/Makefile
> > > @@ -50,6 +50,7 @@ obj-$(CONFIG_ARMADA_THERMAL)	+= armada_thermal.o
> > >  obj-$(CONFIG_IMX_THERMAL)	+= imx_thermal.o
> > >  obj-$(CONFIG_IMX_SC_THERMAL)	+= imx_sc_thermal.o
> > >  obj-$(CONFIG_IMX8MM_THERMAL)	+= imx8mm_thermal.o
> > > +obj-$(CONFIG_IMX91_THERMAL)	+= imx91_thermal.o
> > >  obj-$(CONFIG_MAX77620_THERMAL)	+= max77620_thermal.o
> > >  obj-$(CONFIG_QORIQ_THERMAL)	+= qoriq_thermal.o
> > >  obj-$(CONFIG_DA9062_THERMAL)	+= da9062-thermal.o
> > > diff --git a/drivers/thermal/imx91_thermal.c b/drivers/thermal/imx91_thermal.c
> > > new file mode 100644
> > > index 0000000000000..ebb59eda92951
> > > --- /dev/null
> > > +++ b/drivers/thermal/imx91_thermal.c
> > > @@ -0,0 +1,265 @@
> > > +// SPDX-License-Identifier: GPL-2.0
> > > +/*
> > > + * Copyright 2024 NXP.
> > > + */
> > > +
> > > +#include <linux/bitfield.h>
> > > +#include <linux/clk.h>
> > > +#include <linux/err.h>
> > > +#include <linux/iopoll.h>
> > > +#include <linux/nvmem-consumer.h>
> > > +#include <linux/module.h>
> > > +#include <linux/of.h>
> > > +#include <linux/of_device.h>
> > > +#include <linux/platform_device.h>
> > > +#include <linux/pm_runtime.h>
> > > +#include <linux/thermal.h>
> > > +
> > > +#define CTRL0			0x0
> >
> > Unused
> >
> > > +
> > > +#define STAT0			0x10
> > > +#define STAT0_DRDY0_IF_MASK	BIT(16)
> > > +
> > > +#define DATA0			0x20
> > > +
> > > +#define THR_CTRL01		0x30
> > > +#define THR_CTRL23		0x40
> >
> > Both are unused too
> >
> > > +#define CTRL1			0x200
> >
> > Unused
> >
> > > +#define CTRL1_SET		0x204
> > > +#define CTRL1_CLR		0x208
> > > +#define CTRL1_EN		BIT(31)
> > > +#define CTRL1_START		BIT(30)
> > > +#define CTRL1_STOP		BIT(29)
> > > +#define CTRL1_RES_MASK		GENMASK(19, 18)
> > > +#define CTRL1_MEAS_MODE_MASK	GENMASK(25, 24)
> > > +#define   CTRL1_MEAS_MODE_SINGLE	0
> > > +#define   CTRL1_MEAS_MODE_CONTINUES	1
> > > +#define   CTRL1_MEAS_MODE_PERIODIC	2
> > > +
> > > +#define REF_DIV			0x280
> > > +#define DIV_EN			BIT(31)
> > > +#define DIV_MASK		GENMASK(23, 16)
> > > +
> > > +#define PUD_ST_CTRL		0x2B0
> > > +#define PUDL_MASK		GENMASK(23, 16)
> > > +
> > > +#define TRIM1			0x2E0
> > > +#define TRIM2			0x2F0
> > 					^
> > 				still upper-case
> >
> > > +#define TMU_TEMP_LOW_LIMIT	-40000
> > > +#define TMU_TEMP_HIGH_LIMIT	125000
> > > +
> > > +#define DEFAULT_TRIM1_CONFIG 0xb561bc2d
> > > +#define DEFAULT_TRIM2_CONFIG 0x65d4
> > > +
> > > +struct imx91_tmu {
> > > +	void __iomem *base;
> > > +	struct clk *clk;
> > > +	struct device *dev;
> > > +	struct thermal_zone_device *tzd;
> > > +};
> > > +
> > > +static void imx91_tmu_start(struct imx91_tmu *tmu, bool start)
> > > +{
> > > +	u32 val = start ? CTRL1_START : CTRL1_STOP;
> > > +
> > > +	writel_relaxed(val, tmu->base + CTRL1_SET);
> > > +}
> > > +
> > > +static void imx91_tmu_enable(struct imx91_tmu *tmu, bool enable)
> > > +{
> > > +	u32 reg = enable ? CTRL1_SET : CTRL1_CLR;
> > > +
> > > +	writel_relaxed(CTRL1_EN, tmu->base + reg);
> > > +}
> > > +
> > > +static int imx91_tmu_get_temp(struct thermal_zone_device *tz, int *temp)
> > > +{
> > > +	struct imx91_tmu *tmu = thermal_zone_device_priv(tz);
> > > +	s16 data;
> > > +	int ret;
> > > +	u32 val;
> > > +
> > > +	ret = pm_runtime_resume_and_get(tmu->dev);
> > > +	if (ret < 0)
> > > +		return ret;
> > > +
> > > +	ret = readl_relaxed_poll_timeout(tmu->base + STAT0, val,
> > > +					 val & STAT0_DRDY0_IF_MASK, 1000,
> > > +					 40000);
> > > +	if (ret)
> > > +		return -EAGAIN;
> > 		 ^
> > Missing pm_runtime_put(). Instead goto out;
> >
> > > +
> > > +	/* DATA0 is 16bit signed number */
> > > +	data = readw_relaxed(tmu->base + DATA0);
> > > +	*temp = data * 1000 / 64;
> > > +	if (*temp < TMU_TEMP_LOW_LIMIT || *temp > TMU_TEMP_HIGH_LIMIT)
> > > +		return -EAGAIN;
> > 			^
> > 		ret = -EAGAIN;
> > 		goto out;
> >
> > out:
> > > +
> > > +	pm_runtime_put(tmu->dev);
> > > +
> > > +	return 0;
> >
> > 	return ret;
> > > +}
> > > +
> > > +static struct thermal_zone_device_ops tmu_tz_ops = {
> > > +	.get_temp = imx91_tmu_get_temp,
> > > +};
> > > +
> > > +static int imx91_init_from_nvmem_cells(struct imx91_tmu *tmu)
> > > +{
> > > +	struct device *dev = tmu->dev;
> > > +	u32 trim1, trim2;
> > > +	int ret;
> > > +
> > > +	ret = nvmem_cell_read_u32(dev, "trim1", &trim1);
> > > +	if (ret)
> > > +		return ret;
> > > +
> > > +	ret = nvmem_cell_read_u32(dev, "trim2", &trim2);
> > > +	if (ret)
> > > +		return ret;
> > > +
> > > +	if (trim1 == 0 || trim2 == 0)
> > > +		return -EINVAL;
> > > +
> > > +	writel_relaxed(trim1, tmu->base + TRIM1);
> > > +	writel_relaxed(trim2, tmu->base + TRIM2);
> > > +
> > > +	return 0;
> > > +}
> > > +
> > > +static int imx91_tmu_probe(struct platform_device *pdev)
> > > +{
> > > +	struct device *dev = &pdev->dev;
> >
> > Since you already have the dev pointer, you can make use of it...
> >
> > > +	struct imx91_tmu *tmu;
> > > +	unsigned long rate;
> > > +	u32 div;
> > > +	int ret;
> > > +
> > > +	tmu = devm_kzalloc(&pdev->dev, sizeof(struct imx91_tmu), GFP_KERNEL);
> > 				^
> > 				here
> > > +	if (!tmu)
> > > +		return -ENOMEM;
> > > +
> > > +	tmu->dev = &pdev->dev;
> >
> > 	and here
> >
> > > +
> > > +	tmu->base = devm_platform_ioremap_resource(pdev, 0);
> > > +	if (IS_ERR(tmu->base))
> > > +		return PTR_ERR(tmu->base);
> > 			^
> > 		dev_err_probe();
> >
> > > +
> > > +	tmu->clk = devm_clk_get_enabled(dev, NULL);
> > > +	if (IS_ERR(tmu->clk))
> > > +		return dev_err_probe(dev, PTR_ERR(tmu->clk), "failed to get tmu clock\n");
> > > +
> > > +	platform_set_drvdata(pdev, tmu);
> > > +
> > > +	/* disable the monitor during initialization */
> > > +	imx91_tmu_enable(tmu, false);
> > > +	imx91_tmu_start(tmu, false);
> >
> > No need to disable it here since both bits (ENABLE and START) are 0
> > after a reset.
> 
> Maybe uboot enable it. We can't depend on reset value without really set
> hardware reset bit.

So the module can't be rested e.g. by disabling module power? Having a
dedicated reset mechanism would be much simpler instead of writing each
reg-field to the default value.

> > > +	ret = imx91_init_from_nvmem_cells(tmu);
> > > +	if (ret) {
> > > +		writel_relaxed(DEFAULT_TRIM1_CONFIG, tmu->base + TRIM1);
> > > +		writel_relaxed(DEFAULT_TRIM2_CONFIG, tmu->base + TRIM2);
> > 			^
> > Can you please anwer if _relaxed API is sufficient? I don't know why you
> > making use of the _relaxed API here anyway. We have only a few MMIO
> > accesses here, so why can't we use the writel() instead? This applies to
> > the whole driver.
> 
> There are not big difference writel_relaxed() or writel() for this driver.
> Just original owner pick one.

NACK, the difference is that _relaxed() APIs don't guarantee the order
the register access is done.

> > > +	}
> > > +
> > > +	/* The typical conv clk is 4MHz, the output freq is 'rate / (div + 1)' */
> > > +	rate = clk_get_rate(tmu->clk);
> > > +	div = (rate / 4000000) - 1;
> > > +	if (div > FIELD_GET(DIV_MASK, DIV_MASK))
> > 			^
> > This misuse the FIELD_GET() API. Instead please add a define e.g. DIV_MAX.
> 
> I don't think so, It avoid define another macro DIV_MAX, which may miss
> defined, the related marco should come from one source.
> 
> For example:
> 
> DIV_MASK is GENMASK(23, 16),  DIV_MAX is 256. But if hardware upgrade,
> DIV_MASK to GENMASK(24, 16), DIV_MAX is quite easy to forget update it and
> hard to find such mis-match when div value < 256.

We not talking about "possible" other HW. For now it's just this one and
using FIELD_GET() this way is seems odd, at least to me.

> > > +		return -EINVAL;
> > 			^
> > 		dev_err_probe()
> > > +
> > > +	/* Set divider value and enable divider */
> > > +	writel_relaxed(DIV_EN | FIELD_PREP(DIV_MASK, div), tmu->base + REF_DIV);
> > > +
> > > +	/* Set max power up delay: 'Tpud(ms) = 0xFF * 1000 / 4000000' */
> > > +	writel_relaxed(FIELD_PREP(PUDL_MASK, 100U), tmu->base + PUD_ST_CTRL);
> > 		^
> > You dont need to repeat the default value, so this line can be dropped.
> >
> > > +
> > > +	/*
> > > +	 * Set resolution mode
> > > +	 * 00b - Conversion time = 0.59325 ms
> > > +	 * 01b - Conversion time = 1.10525 ms
> > > +	 * 10b - Conversion time = 2.12925 ms
> > > +	 * 11b - Conversion time = 4.17725 ms
> > > +	 */
> > > +	writel_relaxed(FIELD_PREP(CTRL1_RES_MASK, 0x3), tmu->base + CTRL1_CLR);
> > > +	writel_relaxed(FIELD_PREP(CTRL1_RES_MASK, 0x1), tmu->base + CTRL1_SET);
> >
> > Same here, you repeat the module default after reset, so please drop it.
> >
> > > +	writel_relaxed(CTRL1_MEAS_MODE_MASK, tmu->base + CTRL1_CLR);
> > > +	writel_relaxed(FIELD_PREP(CTRL1_MEAS_MODE_MASK, CTRL1_MEAS_MODE_SINGLE),
> > > +		       tmu->base + CTRL1_SET);
> > > +
> > > +	clk_disable_unprepare(tmu->clk);
> >
> > Drop this, and
> >
> > > +	pm_runtime_set_suspended(dev);
> >
> > replace this with: pm_runtime_set_active();
> 
> No big difference, if set_active, we need add Enable TMU here. I can
> change to set_active.

You don't need to manually disable the clock, it would be done by the
runtime-pm.

Regards,
  Marco


> Frank
> 
> >
> > > +	pm_runtime_enable(dev);
> > 		^
> > devm_pm_runtime_enable()
> >
> > > +	tmu->tzd = devm_thermal_of_zone_register(dev, 0, tmu, &tmu_tz_ops);
> > > +	if (IS_ERR(tmu->tzd))
> > > +		return dev_err_probe(dev, PTR_ERR(tmu->tzd),
> > > +				     "failed to register thermal zone sensor\n");
> >
> >
> > pm_runtime_put()
> >
> >
> > > +
> > > +	return 0;
> > > +}
> > > +
> > > +static void imx91_tmu_remove(struct platform_device *pdev)
> > > +{
> > > +	struct imx91_tmu *tmu = platform_get_drvdata(pdev);
> > > +
> > > +	/* disable tmu */
> > > +	imx91_tmu_start(tmu, false);
> >
> > No need to clear the START bit since we are running in
> > single-shot-measurements now.
> >
> > > +	imx91_tmu_enable(tmu, false);
> > > +}
> > > +
> > > +static int imx91_tmu_runtime_suspend(struct device *dev)
> > > +{
> > > +	struct imx91_tmu *tmu = dev_get_drvdata(dev);
> > > +
> > > +	/* disable tmu */
> > > +	imx91_tmu_start(tmu, false);
> >
> > Can be dropped.
> >
> > > +	imx91_tmu_enable(tmu, false);
> > > +
> > > +	clk_disable_unprepare(tmu->clk);
> > > +
> > > +	return 0;
> > > +}
> > > +
> > > +static int imx91_tmu_runtime_resume(struct device *dev)
> > > +{
> > > +	struct imx91_tmu *tmu = dev_get_drvdata(dev);
> > > +	int ret;
> > > +
> > > +	ret = clk_prepare_enable(tmu->clk);
> > > +	if (ret)
> > > +		return ret;
> > > +
> > > +	imx91_tmu_enable(tmu, true);
> > > +	imx91_tmu_start(tmu, true);
> >
> > Drop imx91_tmu_start() from the resume since this isn't related to the
> > runtime-pm. Instead the function needs to be called within
> > imx91_tmu_get_temp().
> >
> > > +	return 0;
> > > +}
> > > +
> > > +static const struct dev_pm_ops imx91_tmu_pm_ops = {
> > > +	SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, pm_runtime_force_resume)
> > > +	RUNTIME_PM_OPS(imx91_tmu_runtime_suspend, imx91_tmu_runtime_resume, NULL)
> > > +};
> >
> > DEFINE_RUNTIME_DEV_PM_OPS()
> >
> > > +
> > > +static const struct of_device_id imx91_tmu_table[] = {
> > > +	{ .compatible = "fsl,imx91-tmu", },
> > > +	{ },
> > > +};
> > > +MODULE_DEVICE_TABLE(of, imx91_tmu_table);
> > > +
> > > +static struct platform_driver imx91_tmu = {
> > > +	.driver = {
> > > +		.name	= "i.MX91_thermal",
> > 				^
> > Please don't use such names, instead use imx91_thermal.
> >
> > Regards,
> >   Marco
> >
> > > +		.pm	= pm_ptr(&imx91_tmu_pm_ops),
> > > +		.of_match_table = imx91_tmu_table,
> > > +	},
> > > +	.probe = imx91_tmu_probe,
> > > +	.remove = imx91_tmu_remove,
> > > +};
> > > +module_platform_driver(imx91_tmu);
> > > +
> > > +MODULE_AUTHOR("Peng Fan <peng.fan@nxp.com>");
> > > +MODULE_DESCRIPTION("i.MX91 Thermal Monitor Unit driver");
> > > +MODULE_LICENSE("GPL");
> > >
> > > --
> > > 2.34.1
> > >
> > >
>

On Wed, Dec 11, 2024 at 07:57:05PM +0100, Marco Felsch wrote:
> On 24-12-11, Frank Li wrote:
> > On Wed, Dec 11, 2024 at 04:46:22PM +0100, Marco Felsch wrote:
> > > On 24-12-10, Frank Li wrote:
> > > > From: Pengfei Li <pengfei.li_1@nxp.com>
> > > >
> > > > Introduce support for the i.MX91 thermal monitoring unit, which features a
> > > > single sensor for the CPU. The register layout differs from other chips,
> > > > necessitating the creation of a dedicated file for this.
> > > >
> > > > Signed-off-by: Pengfei Li <pengfei.li_1@nxp.com>
> > > > Signed-off-by: Peng Fan <peng.fan@nxp.com>
> > > > Signed-off-by: Frank Li <Frank.Li@nxp.com>
> > > > ---
> > > > change from v1 to v2
> > > > - use low case for hexvalue
> > > > - combine struct imx91_tmu and tmu_sensor
> > > > - simplify imx91_tmu_start() and imx91_tmu_enable()
> > > > - use s16 for imx91_tmu_get_temp(), which may negative value
> > > > - use reverse christmas tree style
> > > > - use run time pm
> > > > - use oneshot to sample temp
> > > > - register thermal zone after hardware init
> > > > ---
> > > >  drivers/thermal/Kconfig         |  10 ++
> > > >  drivers/thermal/Makefile        |   1 +
> > > >  drivers/thermal/imx91_thermal.c | 265 ++++++++++++++++++++++++++++++++++++++++
> > > >  3 files changed, 276 insertions(+)
> > > >

[...]

> > > > +	platform_set_drvdata(pdev, tmu);
> > > > +
> > > > +	/* disable the monitor during initialization */
> > > > +	imx91_tmu_enable(tmu, false);
> > > > +	imx91_tmu_start(tmu, false);
> > >
> > > No need to disable it here since both bits (ENABLE and START) are 0
> > > after a reset.
> >
> > Maybe uboot enable it. We can't depend on reset value without really set
> > hardware reset bit.
>
> So the module can't be rested e.g. by disabling module power? Having a
> dedicated reset mechanism would be much simpler instead of writing each
> reg-field to the default value.

Not all module can be power off individual. Normally, it should have sw
reset bit in controller. but I have not find it in this module.

>
> > > > +	ret = imx91_init_from_nvmem_cells(tmu);
> > > > +	if (ret) {
> > > > +		writel_relaxed(DEFAULT_TRIM1_CONFIG, tmu->base + TRIM1);
> > > > +		writel_relaxed(DEFAULT_TRIM2_CONFIG, tmu->base + TRIM2);
> > > 			^
> > > Can you please anwer if _relaxed API is sufficient? I don't know why you
> > > making use of the _relaxed API here anyway. We have only a few MMIO
> > > accesses here, so why can't we use the writel() instead? This applies to
> > > the whole driver.
> >
> > There are not big difference writel_relaxed() or writel() for this driver.
> > Just original owner pick one.
>
> NACK, the difference is that _relaxed() APIs don't guarantee the order
> the register access is done.

It is totally wrong. *_relexed() API can guarantee the register access
order. Only can't guarantee order with other memory. such as

1 writel_related(A, 0)
2. x = 3
3 writel_related(B, 1)

Hardware/memory model, require B=1 must be after A=0, but not necessary
after x=3, that's means (2) x=3 may happen after 3.

if use writel(), guarantee 1, 2, 3 as order.  Here have not DMA involved.
So not any impact if (2) after (3).

Typically, only below case have to use writel().
2 (update DMA descritpor), 3 start DMA,

Additional, writel() also can't guarantee register access is done!!!!

writel() just means you send a write command to bus. Not guarantee to reach
target module. typical case is

writel(A, 0);
udelay(1);
writel(A, 1);

The interval between A=1 and A=0 may less than 1us if timer have not use
MMIO register. (arm system counter).

In this driver, the only valuable benefit by using writel() instead of
writel_relexed() is "short function name".

>
> > > > +	}
> > > > +
> > > > +	/* The typical conv clk is 4MHz, the output freq is 'rate / (div + 1)' */
> > > > +	rate = clk_get_rate(tmu->clk);
> > > > +	div = (rate / 4000000) - 1;
> > > > +	if (div > FIELD_GET(DIV_MASK, DIV_MASK))
> > > 			^
> > > This misuse the FIELD_GET() API. Instead please add a define e.g. DIV_MAX.
> >
> > I don't think so, It avoid define another macro DIV_MAX, which may miss
> > defined, the related marco should come from one source.
> >
> > For example:
> >
> > DIV_MASK is GENMASK(23, 16),  DIV_MAX is 256. But if hardware upgrade,
> > DIV_MASK to GENMASK(24, 16), DIV_MAX is quite easy to forget update it and
> > hard to find such mis-match when div value < 256.
>
> We not talking about "possible" other HW. For now it's just this one and
> using FIELD_GET() this way is seems odd, at least to me.

If you look implement of FIELD_GET()
(typeof(_mask))(((_reg) & (_mask)) >> __bf_shf(_mask));, it will be
reasonable.

Hardware IP may update in future, bitwidth of field may expand.

>
> > > > +		return -EINVAL;
> > > 			^
> > > 		dev_err_probe()
> > > > +
> > > > +	/* Set divider value and enable divider */
> > > > +	writel_relaxed(DIV_EN | FIELD_PREP(DIV_MASK, div), tmu->base + REF_DIV);
> > > > +
> > > > +	/* Set max power up delay: 'Tpud(ms) = 0xFF * 1000 / 4000000' */
> > > > +	writel_relaxed(FIELD_PREP(PUDL_MASK, 100U), tmu->base + PUD_ST_CTRL);
> > > 		^
> > > You dont need to repeat the default value, so this line can be dropped.
> > >
> > > > +
> > > > +	/*
> > > > +	 * Set resolution mode
> > > > +	 * 00b - Conversion time = 0.59325 ms
> > > > +	 * 01b - Conversion time = 1.10525 ms
> > > > +	 * 10b - Conversion time = 2.12925 ms
> > > > +	 * 11b - Conversion time = 4.17725 ms
> > > > +	 */
> > > > +	writel_relaxed(FIELD_PREP(CTRL1_RES_MASK, 0x3), tmu->base + CTRL1_CLR);
> > > > +	writel_relaxed(FIELD_PREP(CTRL1_RES_MASK, 0x1), tmu->base + CTRL1_SET);
> > >
> > > Same here, you repeat the module default after reset, so please drop it.
> > >
> > > > +	writel_relaxed(CTRL1_MEAS_MODE_MASK, tmu->base + CTRL1_CLR);
> > > > +	writel_relaxed(FIELD_PREP(CTRL1_MEAS_MODE_MASK, CTRL1_MEAS_MODE_SINGLE),
> > > > +		       tmu->base + CTRL1_SET);
> > > > +
> > > > +	clk_disable_unprepare(tmu->clk);
> > >
> > > Drop this, and
> > >
> > > > +	pm_runtime_set_suspended(dev);
> > >
> > > replace this with: pm_runtime_set_active();
> >
> > No big difference, if set_active, we need add Enable TMU here. I can
> > change to set_active.
>
> You don't need to manually disable the clock, it would be done by the
> runtime-pm.

Yes, runtime-pm can disable clock, but it need align harware and run time
state before enable runtime pm.

There are two options
1 disable all hardware resources and pm_runtime_set_suspended()
2. enable all hardware resources and set_active()

After algned, use runtime pm API to controller it.

I choose option1, you prefer option 2.

Frank
>
> Regards,
>   Marco
>
>
[...]
> > > > +
> > > > +MODULE_AUTHOR("Peng Fan <peng.fan@nxp.com>");
> > > > +MODULE_DESCRIPTION("i.MX91 Thermal Monitor Unit driver");
> > > > +MODULE_LICENSE("GPL");
> > > >
> > > > --
> > > > 2.34.1
> > > >
> > > >
> >

On 24-12-11, Frank Li wrote:
> On Wed, Dec 11, 2024 at 07:57:05PM +0100, Marco Felsch wrote:
> > On 24-12-11, Frank Li wrote:
> > > On Wed, Dec 11, 2024 at 04:46:22PM +0100, Marco Felsch wrote:
> > > > On 24-12-10, Frank Li wrote:
> > > > > From: Pengfei Li <pengfei.li_1@nxp.com>
> > > > >
> > > > > Introduce support for the i.MX91 thermal monitoring unit, which features a
> > > > > single sensor for the CPU. The register layout differs from other chips,
> > > > > necessitating the creation of a dedicated file for this.
> > > > >
> > > > > Signed-off-by: Pengfei Li <pengfei.li_1@nxp.com>
> > > > > Signed-off-by: Peng Fan <peng.fan@nxp.com>
> > > > > Signed-off-by: Frank Li <Frank.Li@nxp.com>
> > > > > ---
> > > > > change from v1 to v2
> > > > > - use low case for hexvalue
> > > > > - combine struct imx91_tmu and tmu_sensor
> > > > > - simplify imx91_tmu_start() and imx91_tmu_enable()
> > > > > - use s16 for imx91_tmu_get_temp(), which may negative value
> > > > > - use reverse christmas tree style
> > > > > - use run time pm
> > > > > - use oneshot to sample temp
> > > > > - register thermal zone after hardware init
> > > > > ---
> > > > >  drivers/thermal/Kconfig         |  10 ++
> > > > >  drivers/thermal/Makefile        |   1 +
> > > > >  drivers/thermal/imx91_thermal.c | 265 ++++++++++++++++++++++++++++++++++++++++
> > > > >  3 files changed, 276 insertions(+)
> > > > >
> 
> [...]
> 
> > > > > +	platform_set_drvdata(pdev, tmu);
> > > > > +
> > > > > +	/* disable the monitor during initialization */
> > > > > +	imx91_tmu_enable(tmu, false);
> > > > > +	imx91_tmu_start(tmu, false);
> > > >
> > > > No need to disable it here since both bits (ENABLE and START) are 0
> > > > after a reset.
> > >
> > > Maybe uboot enable it. We can't depend on reset value without really set
> > > hardware reset bit.
> >
> > So the module can't be rested e.g. by disabling module power? Having a
> > dedicated reset mechanism would be much simpler instead of writing each
> > reg-field to the default value.
> 
> Not all module can be power off individual. Normally, it should have sw
> reset bit in controller. but I have not find it in this module.
> 
> >
> > > > > +	ret = imx91_init_from_nvmem_cells(tmu);
> > > > > +	if (ret) {
> > > > > +		writel_relaxed(DEFAULT_TRIM1_CONFIG, tmu->base + TRIM1);
> > > > > +		writel_relaxed(DEFAULT_TRIM2_CONFIG, tmu->base + TRIM2);
> > > > 			^
> > > > Can you please anwer if _relaxed API is sufficient? I don't know why you
> > > > making use of the _relaxed API here anyway. We have only a few MMIO
> > > > accesses here, so why can't we use the writel() instead? This applies to
> > > > the whole driver.
> > >
> > > There are not big difference writel_relaxed() or writel() for this driver.
> > > Just original owner pick one.
> >
> > NACK, the difference is that _relaxed() APIs don't guarantee the order
> > the register access is done.
> 
> It is totally wrong. *_relexed() API can guarantee the register access
> order. Only can't guarantee order with other memory. such as
> 
> 1 writel_related(A, 0)
> 2. x = 3
> 3 writel_related(B, 1)
> 
> Hardware/memory model, require B=1 must be after A=0, but not necessary
> after x=3, that's means (2) x=3 may happen after 3.
> 
> if use writel(), guarantee 1, 2, 3 as order.  Here have not DMA involved.
> So not any impact if (2) after (3).
> 
> Typically, only below case have to use writel().
> 2 (update DMA descritpor), 3 start DMA,
> 
> Additional, writel() also can't guarantee register access is done!!!!
> 
> writel() just means you send a write command to bus. Not guarantee to reach
> target module. typical case is
> 
> writel(A, 0);
> udelay(1);
> writel(A, 1);
> 
> The interval between A=1 and A=0 may less than 1us if timer have not use
> MMIO register. (arm system counter).
> 
> In this driver, the only valuable benefit by using writel() instead of
> writel_relexed() is "short function name".

You're right, I had to check the documentation once again. The _relaxed
API is fine by me, thank you also for the clarification.

> > > > > +	}
> > > > > +
> > > > > +	/* The typical conv clk is 4MHz, the output freq is 'rate / (div + 1)' */
> > > > > +	rate = clk_get_rate(tmu->clk);
> > > > > +	div = (rate / 4000000) - 1;
> > > > > +	if (div > FIELD_GET(DIV_MASK, DIV_MASK))
> > > > 			^
> > > > This misuse the FIELD_GET() API. Instead please add a define e.g. DIV_MAX.
> > >
> > > I don't think so, It avoid define another macro DIV_MAX, which may miss
> > > defined, the related marco should come from one source.
> > >
> > > For example:
> > >
> > > DIV_MASK is GENMASK(23, 16),  DIV_MAX is 256. But if hardware upgrade,
> > > DIV_MASK to GENMASK(24, 16), DIV_MAX is quite easy to forget update it and
> > > hard to find such mis-match when div value < 256.
> >
> > We not talking about "possible" other HW. For now it's just this one and
> > using FIELD_GET() this way is seems odd, at least to me.
> 
> If you look implement of FIELD_GET()
> (typeof(_mask))(((_reg) & (_mask)) >> __bf_shf(_mask));, it will be
> reasonable.

I know the implementation and still IMHO it's not the correct usage at
least to me. What's wrong is that a mask doesn't define the possible
values for a reg-field, e.g. GENMASK(1, 0) could allow all values from 0
to 3 but the HW may allow only 0 and 1.

> Hardware IP may update in future, bitwidth of field may expand.

Please see above.

> > > > > +		return -EINVAL;
> > > > 			^
> > > > 		dev_err_probe()
> > > > > +
> > > > > +	/* Set divider value and enable divider */
> > > > > +	writel_relaxed(DIV_EN | FIELD_PREP(DIV_MASK, div), tmu->base + REF_DIV);
> > > > > +
> > > > > +	/* Set max power up delay: 'Tpud(ms) = 0xFF * 1000 / 4000000' */
> > > > > +	writel_relaxed(FIELD_PREP(PUDL_MASK, 100U), tmu->base + PUD_ST_CTRL);
> > > > 		^
> > > > You dont need to repeat the default value, so this line can be dropped.
> > > >
> > > > > +
> > > > > +	/*
> > > > > +	 * Set resolution mode
> > > > > +	 * 00b - Conversion time = 0.59325 ms
> > > > > +	 * 01b - Conversion time = 1.10525 ms
> > > > > +	 * 10b - Conversion time = 2.12925 ms
> > > > > +	 * 11b - Conversion time = 4.17725 ms
> > > > > +	 */
> > > > > +	writel_relaxed(FIELD_PREP(CTRL1_RES_MASK, 0x3), tmu->base + CTRL1_CLR);
> > > > > +	writel_relaxed(FIELD_PREP(CTRL1_RES_MASK, 0x1), tmu->base + CTRL1_SET);
> > > >
> > > > Same here, you repeat the module default after reset, so please drop it.
> > > >
> > > > > +	writel_relaxed(CTRL1_MEAS_MODE_MASK, tmu->base + CTRL1_CLR);
> > > > > +	writel_relaxed(FIELD_PREP(CTRL1_MEAS_MODE_MASK, CTRL1_MEAS_MODE_SINGLE),
> > > > > +		       tmu->base + CTRL1_SET);
> > > > > +
> > > > > +	clk_disable_unprepare(tmu->clk);
> > > >
> > > > Drop this, and
> > > >
> > > > > +	pm_runtime_set_suspended(dev);
> > > >
> > > > replace this with: pm_runtime_set_active();
> > >
> > > No big difference, if set_active, we need add Enable TMU here. I can
> > > change to set_active.
> >
> > You don't need to manually disable the clock, it would be done by the
> > runtime-pm.
> 
> Yes, runtime-pm can disable clock, but it need align harware and run time
> state before enable runtime pm.
> 
> There are two options
> 1 disable all hardware resources and pm_runtime_set_suspended()
> 2. enable all hardware resources and set_active()

I know.

> After algned, use runtime pm API to controller it.
> 
> I choose option1, you prefer option 2.

I know this too and I'm fine with it albeit I would like option 2 more
because:
 - based on pm-runtime API only
 - easier to enable autosuspend feature

Regards,
  Marco

> Frank
> >
> > Regards,
> >   Marco
> >
> >
> [...]
> > > > > +
> > > > > +MODULE_AUTHOR("Peng Fan <peng.fan@nxp.com>");
> > > > > +MODULE_DESCRIPTION("i.MX91 Thermal Monitor Unit driver");
> > > > > +MODULE_LICENSE("GPL");
> > > > >
> > > > > --
> > > > > 2.34.1
> > > > >
> > > > >
> > >
>