arm64: dts: socfpga: agilex: Add VGIC maintenance interrupt

[PATCH] arm64: dts: socfpga: agilex: Add VGIC maintenance interrupt

Posted by niravkumar.l.rabara@intel.com 1 year ago

From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>

Add VGIC maintenance interrupt and interrupt-parent property for
interrupt controller, required to run Linux in virtualized environment.

Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
---
 arch/arm64/boot/dts/intel/socfpga_agilex.dtsi | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
index 2a5eeb21da47..1235ba5a9865 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
@@ -101,10 +101,13 @@ intc: interrupt-controller@fffc1000 {
 		compatible = "arm,gic-400", "arm,cortex-a15-gic";
 		#interrupt-cells = <3>;
 		interrupt-controller;
+		interrupt-parent = <&intc>;
 		reg = <0x0 0xfffc1000 0x0 0x1000>,
 		      <0x0 0xfffc2000 0x0 0x2000>,
 		      <0x0 0xfffc4000 0x0 0x2000>,
 		      <0x0 0xfffc6000 0x0 0x2000>;
+		/* VGIC maintenance interrupt */
+		interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
 	};
 
 	clocks {
-- 
2.25.1

Re: [PATCH] arm64: dts: socfpga: agilex: Add VGIC maintenance interrupt

Posted by Dinh Nguyen 1 year ago

On 12/8/24 20:36, niravkumar.l.rabara@intel.com wrote:
> From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
> 
> Add VGIC maintenance interrupt and interrupt-parent property for
> interrupt controller, required to run Linux in virtualized environment.
> 
> Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
> ---
>   arch/arm64/boot/dts/intel/socfpga_agilex.dtsi | 3 +++
>   1 file changed, 3 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
> index 2a5eeb21da47..1235ba5a9865 100644
> --- a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
> +++ b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
> @@ -101,10 +101,13 @@ intc: interrupt-controller@fffc1000 {
>   		compatible = "arm,gic-400", "arm,cortex-a15-gic";
>   		#interrupt-cells = <3>;
>   		interrupt-controller;
> +		interrupt-parent = <&intc>;
>   		reg = <0x0 0xfffc1000 0x0 0x1000>,
>   		      <0x0 0xfffc2000 0x0 0x2000>,
>   		      <0x0 0xfffc4000 0x0 0x2000>,
>   		      <0x0 0xfffc6000 0x0 0x2000>;
> +		/* VGIC maintenance interrupt */
> +		interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
>   	};
>   
>   	clocks {


Applied!

Thanks,
Dinh