From: Isaku Yamahata <isaku.yamahata@intel.com>

TDX protects TDX guest APIC state from VMM.  Implement access methods of
TDX guest vAPIC state to ignore them or return zero.

Signed-off-by: Isaku Yamahata <isaku.yamahata@intel.com>
Signed-off-by: Binbin Wu <binbin.wu@linux.intel.com>
---
TDX interrupts breakout:
- Removed WARN_ON_ONCE() in tdx_set_virtual_apic_mode(). (Rick)
- Open code tdx_set_virtual_apic_mode(). (Binbin)
---
 arch/x86/kvm/vmx/main.c | 51 +++++++++++++++++++++++++++++++++++++----
 1 file changed, 46 insertions(+), 5 deletions(-)

diff --git a/arch/x86/kvm/vmx/main.c b/arch/x86/kvm/vmx/main.c
index 13a0ab0a520c..6dcc9ebf6d6e 100644
--- a/arch/x86/kvm/vmx/main.c
+++ b/arch/x86/kvm/vmx/main.c
@@ -228,6 +228,15 @@ static bool vt_apic_init_signal_blocked(struct kvm_vcpu *vcpu)
 	return vmx_apic_init_signal_blocked(vcpu);
 }
 
+static void vt_set_virtual_apic_mode(struct kvm_vcpu *vcpu)
+{
+	/* Only x2APIC mode is supported for TD. */
+	if (is_td_vcpu(vcpu))
+		return;
+
+	return vmx_set_virtual_apic_mode(vcpu);
+}
+
 static void vt_apicv_pre_state_restore(struct kvm_vcpu *vcpu)
 {
 	struct pi_desc *pi = vcpu_to_pi_desc(vcpu);
@@ -236,6 +245,22 @@ static void vt_apicv_pre_state_restore(struct kvm_vcpu *vcpu)
 	memset(pi->pir, 0, sizeof(pi->pir));
 }
 
+static void vt_hwapic_irr_update(struct kvm_vcpu *vcpu, int max_irr)
+{
+	if (is_td_vcpu(vcpu))
+		return;
+
+	return vmx_hwapic_irr_update(vcpu, max_irr);
+}
+
+static void vt_hwapic_isr_update(int max_isr)
+{
+	if (is_td_vcpu(kvm_get_running_vcpu()))
+		return;
+
+	return vmx_hwapic_isr_update(max_isr);
+}
+
 static int vt_sync_pir_to_irr(struct kvm_vcpu *vcpu)
 {
 	if (is_td_vcpu(vcpu))
@@ -414,6 +439,22 @@ static void vt_get_exit_info(struct kvm_vcpu *vcpu, u32 *reason,
 	vmx_get_exit_info(vcpu, reason, info1, info2, intr_info, error_code);
 }
 
+static void vt_set_apic_access_page_addr(struct kvm_vcpu *vcpu)
+{
+	if (is_td_vcpu(vcpu))
+		return;
+
+	vmx_set_apic_access_page_addr(vcpu);
+}
+
+static void vt_refresh_apicv_exec_ctrl(struct kvm_vcpu *vcpu)
+{
+	if (WARN_ON_ONCE(is_td_vcpu(vcpu)))
+		return;
+
+	vmx_refresh_apicv_exec_ctrl(vcpu);
+}
+
 static int vt_mem_enc_ioctl(struct kvm *kvm, void __user *argp)
 {
 	if (!is_td(kvm))
@@ -527,14 +568,14 @@ struct kvm_x86_ops vt_x86_ops __initdata = {
 	.update_cr8_intercept = vmx_update_cr8_intercept,
 
 	.x2apic_icr_is_split = false,
-	.set_virtual_apic_mode = vmx_set_virtual_apic_mode,
-	.set_apic_access_page_addr = vmx_set_apic_access_page_addr,
-	.refresh_apicv_exec_ctrl = vmx_refresh_apicv_exec_ctrl,
+	.set_virtual_apic_mode = vt_set_virtual_apic_mode,
+	.set_apic_access_page_addr = vt_set_apic_access_page_addr,
+	.refresh_apicv_exec_ctrl = vt_refresh_apicv_exec_ctrl,
 	.load_eoi_exitmap = vmx_load_eoi_exitmap,
 	.apicv_pre_state_restore = vt_apicv_pre_state_restore,
 	.required_apicv_inhibits = VMX_REQUIRED_APICV_INHIBITS,
-	.hwapic_irr_update = vmx_hwapic_irr_update,
-	.hwapic_isr_update = vmx_hwapic_isr_update,
+	.hwapic_irr_update = vt_hwapic_irr_update,
+	.hwapic_isr_update = vt_hwapic_isr_update,
 	.sync_pir_to_irr = vt_sync_pir_to_irr,
 	.deliver_interrupt = vt_deliver_interrupt,
 	.dy_apicv_has_pending_interrupt = pi_has_pending_interrupt,
-- 
2.46.0

On Mon, Dec 9, 2024 at 2:06 AM Binbin Wu <binbin.wu@linux.intel.com> wrote:
> -       .hwapic_irr_update = vmx_hwapic_irr_update,
> -       .hwapic_isr_update = vmx_hwapic_isr_update,
> +       .hwapic_irr_update = vt_hwapic_irr_update,
> +       .hwapic_isr_update = vt_hwapic_isr_update,

Just a note, hwapic_irr_update is gone in 6.14 and thus in kvm-coco-queue.

Paolo

On 1/22/2025 7:34 PM, Paolo Bonzini wrote:
> On Mon, Dec 9, 2024 at 2:06 AM Binbin Wu <binbin.wu@linux.intel.com> wrote:
>> -       .hwapic_irr_update = vmx_hwapic_irr_update,
>> -       .hwapic_isr_update = vmx_hwapic_isr_update,
>> +       .hwapic_irr_update = vt_hwapic_irr_update,
>> +       .hwapic_isr_update = vt_hwapic_isr_update,
> Just a note, hwapic_irr_update is gone in 6.14 and thus in kvm-coco-queue.
>
> Paolo
>
Thanks for the info.

On Sun, Dec 8, 2024 at 5:12 PM Binbin Wu <binbin.wu@linux.intel.com> wrote:
>
> From: Isaku Yamahata <isaku.yamahata@intel.com>
> ...
> +}
> +
>  static void vt_apicv_pre_state_restore(struct kvm_vcpu *vcpu)
>  {
>         struct pi_desc *pi = vcpu_to_pi_desc(vcpu);
> @@ -236,6 +245,22 @@ static void vt_apicv_pre_state_restore(struct kvm_vcpu *vcpu)
>         memset(pi->pir, 0, sizeof(pi->pir));

Should this be a nop for TDX VMs? pre_state_restore could cause
pending PIRs to get cleared as KVM doesn't have ability to sync them
to vIRR in absence of access to the VAPIC page.

>  }
>
> +static void vt_hwapic_irr_update(struct kvm_vcpu *vcpu, int max_irr)
> +{
> +       if (is_td_vcpu(vcpu))
> +               return;
> +
> +       return vmx_hwapic_irr_update(vcpu, max_irr);
> +}
> +

On 1/4/2025 6:04 AM, Vishal Annapurve wrote:
> On Sun, Dec 8, 2024 at 5:12 PM Binbin Wu <binbin.wu@linux.intel.com> wrote:
>> From: Isaku Yamahata <isaku.yamahata@intel.com>
>> ...
>> +}
>> +
>>   static void vt_apicv_pre_state_restore(struct kvm_vcpu *vcpu)
>>   {
>>          struct pi_desc *pi = vcpu_to_pi_desc(vcpu);
>> @@ -236,6 +245,22 @@ static void vt_apicv_pre_state_restore(struct kvm_vcpu *vcpu)
>>          memset(pi->pir, 0, sizeof(pi->pir));
> Should this be a nop for TDX VMs? pre_state_restore could cause
> pending PIRs to get cleared as KVM doesn't have ability to sync them
> to vIRR in absence of access to the VAPIC page.
This callback is called by kvm_lapic_reset() and kvm_apic_set_state().
If it is call by kvm_lapic_reset(), it should be cleared.

If it is called by kvm_apic_set_state() when userspace want to setup the
lapic. It will be needed when live migration is enabled for TDX.
For VMX VM, the PIR is synced to vIRR and then the state will be sent to
destination VM.
For TDX guest, I am not sure the final solution to sync PIR from source to
destination TDX guest. I guess TDX module probably will do the job. Will
ask Intel guys to check what is the solution.
For this base series, TDX live migration is not supported yet, it is OK
to reset PIR for now.

>
>>   }
>>
>> +static void vt_hwapic_irr_update(struct kvm_vcpu *vcpu, int max_irr)
>> +{
>> +       if (is_td_vcpu(vcpu))
>> +               return;
>> +
>> +       return vmx_hwapic_irr_update(vcpu, max_irr);
>> +}
>> +