.../devicetree/bindings/net/dsa/microchip,ksz.yaml | 89 +++++++++++++--------- drivers/net/dsa/microchip/ksz8.c | 9 +++ drivers/net/dsa/microchip/ksz8_reg.h | 1 + drivers/net/dsa/microchip/ksz_common.c | 2 + drivers/net/dsa/microchip/ksz_common.h | 1 + 5 files changed, 68 insertions(+), 34 deletions(-)
Add support for the led-mode property for the following PHYs which have a single LED mode configuration value. KSZ8765, KSZ8794 and KSZ8795 use register 0x0b bits 5,4 to control the LED configuration. KSZ8863 and KSZ8873 use register 0xc3 bits 5,4 to control the LED configuration. Signed-off-by: Fedor Ross <fedor.ross@ifm.com> --- Fedor Ross (2): net: dsa: microchip: Add of config for LED mode for ksz87xx and ksz88x3 dt-bindings: net: dsa: microchip: Add of config for LED mode for ksz87xx and ksz88x3 .../devicetree/bindings/net/dsa/microchip,ksz.yaml | 89 +++++++++++++--------- drivers/net/dsa/microchip/ksz8.c | 9 +++ drivers/net/dsa/microchip/ksz8_reg.h | 1 + drivers/net/dsa/microchip/ksz_common.c | 2 + drivers/net/dsa/microchip/ksz_common.h | 1 + 5 files changed, 68 insertions(+), 34 deletions(-) --- base-commit: 6145fefc1e42c1895c0c1c2c8593de2c085d8c56 change-id: 20241209-netdev-net-next-ksz8_led-mode-31b63f87963a Best regards, -- Fedor Ross <fedor.ross@ifm.com>
On Mon, Dec 09, 2024 at 06:58:50PM +0100, Fedor Ross wrote: > Add support for the led-mode property for the following PHYs which have > a single LED mode configuration value. > > KSZ8765, KSZ8794 and KSZ8795 use register 0x0b bits 5,4 to control the > LED configuration. > > KSZ8863 and KSZ8873 use register 0xc3 bits 5,4 to control the LED > configuration. PHY and MAC LEDs should be configured via /sys/class/leds. Please take a look at how the Marvell PHY and DSA driver, qca8k driver etc do LEDs. Andrew --- pw-bot: cr
On 12/9/24 7:22 PM, Andrew Lunn wrote: > On Mon, Dec 09, 2024 at 06:58:50PM +0100, Fedor Ross wrote: > > Add support for the led-mode property for the following PHYs which have > > a single LED mode configuration value. > > > > KSZ8765, KSZ8794 and KSZ8795 use register 0x0b bits 5,4 to control the > > LED configuration. > > > > KSZ8863 and KSZ8873 use register 0xc3 bits 5,4 to control the LED > > configuration. > > PHY and MAC LEDs should be configured via /sys/class/leds. Please take > a look at how the Marvell PHY and DSA driver, qca8k driver etc do > LEDs. I'll take a look at it. Thanks for your input. Best regards, Fedor
On 12/9/24 7:22 PM, Andrew Lunn wrote: > On Mon, Dec 09, 2024 at 06:58:50PM +0100, Fedor Ross wrote: >> Add support for the led-mode property for the following PHYs which have >> a single LED mode configuration value. >> >> KSZ8765, KSZ8794 and KSZ8795 use register 0x0b bits 5,4 to control the >> LED configuration. >> >> KSZ8863 and KSZ8873 use register 0xc3 bits 5,4 to control the LED >> configuration. > > PHY and MAC LEDs should be configured via /sys/class/leds. Please take > a look at how the Marvell PHY and DSA driver, qca8k driver etc do > LEDs. According to KSZ8794 datasheet, this register 0xb is Global Control: Register 11 (0x0B): Global Control 9 So this does not seems like per-port LED control, but rather some global control for all LEDs on all ports on the chip ?
On Mon, Dec 09, 2024 at 09:26:33PM +0100, Marek Vasut wrote: > On 12/9/24 7:22 PM, Andrew Lunn wrote: > > On Mon, Dec 09, 2024 at 06:58:50PM +0100, Fedor Ross wrote: > > > Add support for the led-mode property for the following PHYs which have > > > a single LED mode configuration value. > > > > > > KSZ8765, KSZ8794 and KSZ8795 use register 0x0b bits 5,4 to control the > > > LED configuration. > > > > > > KSZ8863 and KSZ8873 use register 0xc3 bits 5,4 to control the LED > > > configuration. > > > > PHY and MAC LEDs should be configured via /sys/class/leds. Please take > > a look at how the Marvell PHY and DSA driver, qca8k driver etc do > > LEDs. > According to KSZ8794 datasheet, this register 0xb is Global Control: > > Register 11 (0x0B): Global Control 9 > > So this does not seems like per-port LED control, but rather some global > control for all LEDs on all ports on the chip ? Still should be able to use the standard binding and sysfs controls. The driver just has to reject invalid combinations. Rob
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