From: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
Add device type data for S32G2/S32G3 SoC.
FlexCAN module from S32G2/S32G3 is similar with i.MX SoCs, but interrupt
management is different.
On S32G2/S32G3 SoC, there are separate interrupts for state change, bus
errors, Mailboxes 0-7 and Mailboxes 8-127 respectively.
In order to handle this FlexCAN hardware particularity, first reuse the
'FLEXCAN_QUIRK_NR_IRQ_3' quirk provided by mcf5441x's irq handling
support. Secondly, use the newly introduced
'FLEXCAN_QUIRK_SECONDARY_MB_IRQ' quirk which handles the case where two
separate mailbox ranges are controlled by independent hardware interrupt
lines.
Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
---
drivers/net/can/flexcan/flexcan-core.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/drivers/net/can/flexcan/flexcan-core.c b/drivers/net/can/flexcan/flexcan-core.c
index 3ae54305bf33..282297c55502 100644
--- a/drivers/net/can/flexcan/flexcan-core.c
+++ b/drivers/net/can/flexcan/flexcan-core.c
@@ -386,6 +386,16 @@ static const struct flexcan_devtype_data fsl_lx2160a_r1_devtype_data = {
FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX_RTR,
};
+static const struct flexcan_devtype_data nxp_s32g2_devtype_data = {
+ .quirks = FLEXCAN_QUIRK_DISABLE_RXFG | FLEXCAN_QUIRK_ENABLE_EACEN_RRS |
+ FLEXCAN_QUIRK_DISABLE_MECR | FLEXCAN_QUIRK_BROKEN_PERR_STATE |
+ FLEXCAN_QUIRK_USE_RX_MAILBOX | FLEXCAN_QUIRK_SUPPORT_FD |
+ FLEXCAN_QUIRK_SUPPORT_ECC | FLEXCAN_QUIRK_NR_IRQ_3 |
+ FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX |
+ FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX_RTR |
+ FLEXCAN_QUIRK_SECONDARY_MB_IRQ,
+};
+
static const struct can_bittiming_const flexcan_bittiming_const = {
.name = DRV_NAME,
.tseg1_min = 4,
@@ -2055,6 +2065,7 @@ static const struct of_device_id flexcan_of_match[] = {
{ .compatible = "fsl,vf610-flexcan", .data = &fsl_vf610_devtype_data, },
{ .compatible = "fsl,ls1021ar2-flexcan", .data = &fsl_ls1021a_r2_devtype_data, },
{ .compatible = "fsl,lx2160ar1-flexcan", .data = &fsl_lx2160a_r1_devtype_data, },
+ { .compatible = "nxp,s32g2-flexcan", .data = &nxp_s32g2_devtype_data, },
{ /* sentinel */ },
};
MODULE_DEVICE_TABLE(of, flexcan_of_match);
--
2.45.2On 04.12.2024 09:49:15, Ciprian Costea wrote: > From: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com> > > Add device type data for S32G2/S32G3 SoC. > > FlexCAN module from S32G2/S32G3 is similar with i.MX SoCs, but interrupt > management is different. > > On S32G2/S32G3 SoC, there are separate interrupts for state change, bus > errors, Mailboxes 0-7 and Mailboxes 8-127 respectively. > In order to handle this FlexCAN hardware particularity, first reuse the > 'FLEXCAN_QUIRK_NR_IRQ_3' quirk provided by mcf5441x's irq handling > support. Secondly, use the newly introduced > 'FLEXCAN_QUIRK_SECONDARY_MB_IRQ' quirk which handles the case where two > separate mailbox ranges are controlled by independent hardware interrupt > lines. > > Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com> > --- Looks good to me! Unrelated to this patch, but I want to extend the "FLEXCAN hardware feature flags" table in "flexcan.h". Can you provide the needed information? > /* FLEXCAN hardware feature flags > * > * Below is some version info we got: > * SOC Version IP-Version Glitch- [TR]WRN_INT IRQ Err Memory err RTR rece- FD Mode MB > * Filter? connected? Passive detection ption in MB Supported? > * MCF5441X FlexCAN2 ? no yes no no no no 16 > * MX25 FlexCAN2 03.00.00.00 no no no no no no 64 > * MX28 FlexCAN2 03.00.04.00 yes yes no no no no 64 > * MX35 FlexCAN2 03.00.00.00 no no no no no no 64 > * MX53 FlexCAN2 03.00.00.00 yes no no no no no 64 > * MX6s FlexCAN3 10.00.12.00 yes yes no no yes no 64 > * MX8QM FlexCAN3 03.00.23.00 yes yes no no yes yes 64 > * MX8MP FlexCAN3 03.00.17.01 yes yes no yes yes yes 64 > * VF610 FlexCAN3 ? no yes no yes yes? no 64 > * LS1021A FlexCAN2 03.00.04.00 no yes no no yes no 64 > * LX2160A FlexCAN3 03.00.23.00 no yes no yes yes yes 64 > * > * Some SOCs do not have the RX_WARN & TX_WARN interrupt line connected. > */ regards, Marc -- Pengutronix e.K. | Marc Kleine-Budde | Embedded Linux | https://www.pengutronix.de | Vertretung Nürnberg | Phone: +49-5121-206917-129 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-9 |
On 12/4/2024 10:05 AM, Marc Kleine-Budde wrote:
> On 04.12.2024 09:49:15, Ciprian Costea wrote:
>> From: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
>>
>> Add device type data for S32G2/S32G3 SoC.
>>
>> FlexCAN module from S32G2/S32G3 is similar with i.MX SoCs, but interrupt
>> management is different.
>>
>> On S32G2/S32G3 SoC, there are separate interrupts for state change, bus
>> errors, Mailboxes 0-7 and Mailboxes 8-127 respectively.
>> In order to handle this FlexCAN hardware particularity, first reuse the
>> 'FLEXCAN_QUIRK_NR_IRQ_3' quirk provided by mcf5441x's irq handling
>> support. Secondly, use the newly introduced
>> 'FLEXCAN_QUIRK_SECONDARY_MB_IRQ' quirk which handles the case where two
>> separate mailbox ranges are controlled by independent hardware interrupt
>> lines.
>>
>> Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
>> ---
>
> Looks good to me!
>
> Unrelated to this patch, but I want to extend the "FLEXCAN hardware
> feature flags" table in "flexcan.h". Can you provide the needed
> information?
>
Hello Marc,
I would say the following S32G related information could be added:
>> /* FLEXCAN hardware feature flags
>> *
>> * Below is some version info we got:
>> * SOC Version IP-Version Glitch- [TR]WRN_INT IRQ Err Memory err RTR rece- FD Mode MB
>> * Filter? connected? Passive detection ption in MB Supported?
>> * MCF5441X FlexCAN2 ? no yes no no no no 16
>> * MX25 FlexCAN2 03.00.00.00 no no no no no no 64
>> * MX28 FlexCAN2 03.00.04.00 yes yes no no no no 64
>> * MX35 FlexCAN2 03.00.00.00 no no no no no no 64
>> * MX53 FlexCAN2 03.00.00.00 yes no no no no no 64
>> * MX6s FlexCAN3 10.00.12.00 yes yes no no yes no 64
>> * MX8QM FlexCAN3 03.00.23.00 yes yes no no yes yes 64
>> * MX8MP FlexCAN3 03.00.17.01 yes yes no yes yes yes 64
>> * VF610 FlexCAN3 ? no yes no yes yes? no 64
>> * LS1021A FlexCAN2 03.00.04.00 no yes no no yes no 64
>> * LX2160A FlexCAN3 03.00.23.00 no yes no yes yes yes 64
* S32G2/S32G3 FlexCAN3 03.00.39.00 no yes no
yes yes yes 128
>> *
>> * Some SOCs do not have the RX_WARN & TX_WARN interrupt line connected.
>> */
>
> regards,
> Marc
>
Would you like me to send another version of this patchset with above
information included ?
Best Regards,
Ciprian
On 04.12.2024 13:38:51, Ciprian Marian Costea wrote: > > Unrelated to this patch, but I want to extend the "FLEXCAN hardware > > feature flags" table in "flexcan.h". Can you provide the needed > > information? > > > > I would say the following S32G related information could be added: > > > > /* FLEXCAN hardware feature flags > > > * > > > * Below is some version info we got: > > > * SOC Version IP-Version Glitch- [TR]WRN_INT IRQ Err Memory err RTR rece- FD Mode MB > > > * Filter? connected? Passive detection ption in MB Supported? > > > * MCF5441X FlexCAN2 ? no yes no no no no 16 > > > * MX25 FlexCAN2 03.00.00.00 no no no no no no 64 > > > * MX28 FlexCAN2 03.00.04.00 yes yes no no no no 64 > > > * MX35 FlexCAN2 03.00.00.00 no no no no no no 64 > > > * MX53 FlexCAN2 03.00.00.00 yes no no no no no 64 > > > * MX6s FlexCAN3 10.00.12.00 yes yes no no yes no 64 > > > * MX8QM FlexCAN3 03.00.23.00 yes yes no no yes yes 64 > > > * MX8MP FlexCAN3 03.00.17.01 yes yes no yes yes yes 64 > > > * VF610 FlexCAN3 ? no yes no yes yes? no 64 > > > * LS1021A FlexCAN2 03.00.04.00 no yes no no yes no 64 > > > * LX2160A FlexCAN3 03.00.23.00 no yes no yes yes yes 64 > * S32G2/S32G3 FlexCAN3 03.00.39.00 no yes no yes yes yes 128 > > > * > > > * Some SOCs do not have the RX_WARN & TX_WARN interrupt line connected. > > > */ > > Would you like me to send another version of this patchset with above > information included ? No. Once we have Krzysztof's ACK for the DT binding changes, I'll take this series. I think we'll make that a separate patch and maybe add more information. regards, Marc -- Pengutronix e.K. | Marc Kleine-Budde | Embedded Linux | https://www.pengutronix.de | Vertretung Nürnberg | Phone: +49-5121-206917-129 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-9 |
On 12/4/2024 1:48 PM, Marc Kleine-Budde wrote: > On 04.12.2024 13:38:51, Ciprian Marian Costea wrote: >>> Unrelated to this patch, but I want to extend the "FLEXCAN hardware >>> feature flags" table in "flexcan.h". Can you provide the needed >>> information? >>> >> >> I would say the following S32G related information could be added: >> >>>> /* FLEXCAN hardware feature flags >>>> * >>>> * Below is some version info we got: >>>> * SOC Version IP-Version Glitch- [TR]WRN_INT IRQ Err Memory err RTR rece- FD Mode MB >>>> * Filter? connected? Passive detection ption in MB Supported? >>>> * MCF5441X FlexCAN2 ? no yes no no no no 16 >>>> * MX25 FlexCAN2 03.00.00.00 no no no no no no 64 >>>> * MX28 FlexCAN2 03.00.04.00 yes yes no no no no 64 >>>> * MX35 FlexCAN2 03.00.00.00 no no no no no no 64 >>>> * MX53 FlexCAN2 03.00.00.00 yes no no no no no 64 >>>> * MX6s FlexCAN3 10.00.12.00 yes yes no no yes no 64 >>>> * MX8QM FlexCAN3 03.00.23.00 yes yes no no yes yes 64 >>>> * MX8MP FlexCAN3 03.00.17.01 yes yes no yes yes yes 64 >>>> * VF610 FlexCAN3 ? no yes no yes yes? no 64 >>>> * LS1021A FlexCAN2 03.00.04.00 no yes no no yes no 64 >>>> * LX2160A FlexCAN3 03.00.23.00 no yes no yes yes yes 64 >> * S32G2/S32G3 FlexCAN3 03.00.39.00 no yes no yes yes yes 128 >>>> * >>>> * Some SOCs do not have the RX_WARN & TX_WARN interrupt line connected. >>>> */ >> >> Would you like me to send another version of this patchset with above >> information included ? > > No. Once we have Krzysztof's ACK for the DT binding changes, I'll take > this series. > > I think we'll make that a separate patch and maybe add more information. > > regards, > Marc > Hello Krzysztof, I've addressed your feedback from the previous version of this patchset. Is the current version ok from your point of view with respect to DT bindings changes? Regards, Ciprian
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