drivers/gpu/drm/bridge/ite-it6263.c | 25 ++++++++++++++++++++++--- 1 file changed, 22 insertions(+), 3 deletions(-)
From: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
Introduce it6263_is_input_bus_fmt_valid() and refactor the
it6263_bridge_atomic_get_input_bus_fmts() function to support VESA
format by selecting the LVDS input format based on the LVDS data mapping
and thereby support both JEIDA and VESA input formats.
Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
---
drivers/gpu/drm/bridge/ite-it6263.c | 25 ++++++++++++++++++++++---
1 file changed, 22 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/bridge/ite-it6263.c b/drivers/gpu/drm/bridge/ite-it6263.c
index cbabd4e20d3e..83d1db29157a 100644
--- a/drivers/gpu/drm/bridge/ite-it6263.c
+++ b/drivers/gpu/drm/bridge/ite-it6263.c
@@ -48,6 +48,7 @@
#define REG_COL_DEP GENMASK(1, 0)
#define BIT8 FIELD_PREP(REG_COL_DEP, 1)
#define OUT_MAP BIT(4)
+#define VESA BIT(4)
#define JEIDA 0
#define REG_DESSC_ENB BIT(6)
#define DMODE BIT(7)
@@ -428,12 +429,30 @@ static inline void it6263_lvds_reset(struct it6263 *it)
fsleep(10000);
}
+static bool it6263_is_input_bus_fmt_valid(u32 input_fmt)
+{
+ switch (input_fmt) {
+ case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:
+ case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:
+ return true;
+ }
+ return false;
+}
+
static inline void it6263_lvds_set_interface(struct it6263 *it)
{
+ u8 fmt;
+
/* color depth */
regmap_write_bits(it->lvds_regmap, LVDS_REG_2C, REG_COL_DEP, BIT8);
+
+ if (it->lvds_data_mapping == MEDIA_BUS_FMT_RGB888_1X7X4_SPWG)
+ fmt = VESA;
+ else
+ fmt = JEIDA;
+
/* output mapping */
- regmap_write_bits(it->lvds_regmap, LVDS_REG_2C, OUT_MAP, JEIDA);
+ regmap_write_bits(it->lvds_regmap, LVDS_REG_2C, OUT_MAP, fmt);
if (it->lvds_dual_link) {
regmap_write_bits(it->lvds_regmap, LVDS_REG_2C, DMODE, DISO);
@@ -714,14 +733,14 @@ it6263_bridge_atomic_get_input_bus_fmts(struct drm_bridge *bridge,
*num_input_fmts = 0;
- if (it->lvds_data_mapping != MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA)
+ if (!it6263_is_input_bus_fmt_valid(it->lvds_data_mapping))
return NULL;
input_fmts = kmalloc(sizeof(*input_fmts), GFP_KERNEL);
if (!input_fmts)
return NULL;
- input_fmts[0] = MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA;
+ input_fmts[0] = it->lvds_data_mapping;
*num_input_fmts = 1;
return input_fmts;
--
2.34.1On 12/04/2024, tomm.merciai@gmail.com wrote:
> From: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
>
> Introduce it6263_is_input_bus_fmt_valid() and refactor the
> it6263_bridge_atomic_get_input_bus_fmts() function to support VESA
> format by selecting the LVDS input format based on the LVDS data mapping
> and thereby support both JEIDA and VESA input formats.
ite,it6263.yaml says IT6263 supports vesa-24 and vesa-30, while
this patch actually only adds vesa-24 support. So, to be more
specific, the patch subject and commit message should reflect
this rather than claim "Support VESA input format".
>
> Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
Can you please send this patch with your Renesas email address
instead of Gmail email address?
Otherwise, add a Signed-off-by tag with your Gmail email address.
> ---
> drivers/gpu/drm/bridge/ite-it6263.c | 25 ++++++++++++++++++++++---
> 1 file changed, 22 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/bridge/ite-it6263.c b/drivers/gpu/drm/bridge/ite-it6263.c
> index cbabd4e20d3e..83d1db29157a 100644
> --- a/drivers/gpu/drm/bridge/ite-it6263.c
> +++ b/drivers/gpu/drm/bridge/ite-it6263.c
> @@ -48,6 +48,7 @@
> #define REG_COL_DEP GENMASK(1, 0)
> #define BIT8 FIELD_PREP(REG_COL_DEP, 1)
> #define OUT_MAP BIT(4)
> +#define VESA BIT(4)
> #define JEIDA 0
> #define REG_DESSC_ENB BIT(6)
> #define DMODE BIT(7)
> @@ -428,12 +429,30 @@ static inline void it6263_lvds_reset(struct it6263 *it)
> fsleep(10000);
> }
>
> +static bool it6263_is_input_bus_fmt_valid(u32 input_fmt)
1) Inline this small function.
2) Change the argument input_fmt type from u32 to int to
match the type of it->lvds_data_mapping.
static inline bool it6263_is_input_bus_fmt_valid(int input_fmt)
> +{
> + switch (input_fmt) {
> + case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:
> + case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:
> + return true;
> + }
> + return false;
> +}
> +
> static inline void it6263_lvds_set_interface(struct it6263 *it)
> {
> + u8 fmt;
> +
> /* color depth */
> regmap_write_bits(it->lvds_regmap, LVDS_REG_2C, REG_COL_DEP, BIT8);
> +
> + if (it->lvds_data_mapping == MEDIA_BUS_FMT_RGB888_1X7X4_SPWG)
> + fmt = VESA;
> + else
> + fmt = JEIDA;
> +
> /* output mapping */
> - regmap_write_bits(it->lvds_regmap, LVDS_REG_2C, OUT_MAP, JEIDA);
> + regmap_write_bits(it->lvds_regmap, LVDS_REG_2C, OUT_MAP, fmt);
>
> if (it->lvds_dual_link) {
> regmap_write_bits(it->lvds_regmap, LVDS_REG_2C, DMODE, DISO);
> @@ -714,14 +733,14 @@ it6263_bridge_atomic_get_input_bus_fmts(struct drm_bridge *bridge,
>
> *num_input_fmts = 0;
>
> - if (it->lvds_data_mapping != MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA)
> + if (!it6263_is_input_bus_fmt_valid(it->lvds_data_mapping))
> return NULL;
>
> input_fmts = kmalloc(sizeof(*input_fmts), GFP_KERNEL);
> if (!input_fmts)
> return NULL;
>
> - input_fmts[0] = MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA;
> + input_fmts[0] = it->lvds_data_mapping;
> *num_input_fmts = 1;
>
> return input_fmts;
--
Regards,
Liu Ying
Hi Liu Ying,
Thanks for your review.
On Wed, Dec 04, 2024 at 11:34:23AM +0800, Liu Ying wrote:
> On 12/04/2024, tomm.merciai@gmail.com wrote:
> > From: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
> >
> > Introduce it6263_is_input_bus_fmt_valid() and refactor the
> > it6263_bridge_atomic_get_input_bus_fmts() function to support VESA
> > format by selecting the LVDS input format based on the LVDS data mapping
> > and thereby support both JEIDA and VESA input formats.
>
> ite,it6263.yaml says IT6263 supports vesa-24 and vesa-30, while
> this patch actually only adds vesa-24 support. So, to be more
> specific, the patch subject and commit message should reflect
> this rather than claim "Support VESA input format".
Fully agree, thanks.
I will fix that in v2 specifying vesa-24 like you suggest.
>
> >
> > Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
>
> Can you please send this patch with your Renesas email address
> instead of Gmail email address?
> Otherwise, add a Signed-off-by tag with your Gmail email address.
Thanks, for the point.
What about adding Acked-by: from my renesas email address?
>
> > ---
> > drivers/gpu/drm/bridge/ite-it6263.c | 25 ++++++++++++++++++++++---
> > 1 file changed, 22 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/bridge/ite-it6263.c b/drivers/gpu/drm/bridge/ite-it6263.c
> > index cbabd4e20d3e..83d1db29157a 100644
> > --- a/drivers/gpu/drm/bridge/ite-it6263.c
> > +++ b/drivers/gpu/drm/bridge/ite-it6263.c
> > @@ -48,6 +48,7 @@
> > #define REG_COL_DEP GENMASK(1, 0)
> > #define BIT8 FIELD_PREP(REG_COL_DEP, 1)
> > #define OUT_MAP BIT(4)
> > +#define VESA BIT(4)
> > #define JEIDA 0
> > #define REG_DESSC_ENB BIT(6)
> > #define DMODE BIT(7)
> > @@ -428,12 +429,30 @@ static inline void it6263_lvds_reset(struct it6263 *it)
> > fsleep(10000);
> > }
> >
> > +static bool it6263_is_input_bus_fmt_valid(u32 input_fmt)
>
> 1) Inline this small function.
> 2) Change the argument input_fmt type from u32 to int to
> match the type of it->lvds_data_mapping.
Will fix that in v2, thanks :)
>
> static inline bool it6263_is_input_bus_fmt_valid(int input_fmt)
>
> > +{
> > + switch (input_fmt) {
> > + case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:
> > + case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:
> > + return true;
> > + }
> > + return false;
> > +}
> > +
> > static inline void it6263_lvds_set_interface(struct it6263 *it)
> > {
> > + u8 fmt;
> > +
> > /* color depth */
> > regmap_write_bits(it->lvds_regmap, LVDS_REG_2C, REG_COL_DEP, BIT8);
> > +
> > + if (it->lvds_data_mapping == MEDIA_BUS_FMT_RGB888_1X7X4_SPWG)
> > + fmt = VESA;
> > + else
> > + fmt = JEIDA;
> > +
> > /* output mapping */
> > - regmap_write_bits(it->lvds_regmap, LVDS_REG_2C, OUT_MAP, JEIDA);
> > + regmap_write_bits(it->lvds_regmap, LVDS_REG_2C, OUT_MAP, fmt);
> >
> > if (it->lvds_dual_link) {
> > regmap_write_bits(it->lvds_regmap, LVDS_REG_2C, DMODE, DISO);
> > @@ -714,14 +733,14 @@ it6263_bridge_atomic_get_input_bus_fmts(struct drm_bridge *bridge,
> >
> > *num_input_fmts = 0;
> >
> > - if (it->lvds_data_mapping != MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA)
> > + if (!it6263_is_input_bus_fmt_valid(it->lvds_data_mapping))
> > return NULL;
> >
> > input_fmts = kmalloc(sizeof(*input_fmts), GFP_KERNEL);
> > if (!input_fmts)
> > return NULL;
> >
> > - input_fmts[0] = MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA;
> > + input_fmts[0] = it->lvds_data_mapping;
> > *num_input_fmts = 1;
> >
> > return input_fmts;
>
> --
> Regards,
> Liu Ying
Thanks & Regards,
Tommaso
>
On Wed, Dec 04, 2024 at 11:37:05AM +0100, Tommaso Merciai wrote: > Hi Liu Ying, > Thanks for your review. > > On Wed, Dec 04, 2024 at 11:34:23AM +0800, Liu Ying wrote: > > On 12/04/2024, tomm.merciai@gmail.com wrote: > > > From: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> > > > > > > Introduce it6263_is_input_bus_fmt_valid() and refactor the > > > it6263_bridge_atomic_get_input_bus_fmts() function to support VESA > > > format by selecting the LVDS input format based on the LVDS data mapping > > > and thereby support both JEIDA and VESA input formats. > > > > ite,it6263.yaml says IT6263 supports vesa-24 and vesa-30, while > > this patch actually only adds vesa-24 support. So, to be more > > specific, the patch subject and commit message should reflect > > this rather than claim "Support VESA input format". > > Fully agree, thanks. > I will fix that in v2 specifying vesa-24 like you suggest. > > > > > > > > > Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> > > > > Can you please send this patch with your Renesas email address > > instead of Gmail email address? > > Otherwise, add a Signed-off-by tag with your Gmail email address. > > Thanks, for the point. > What about adding Acked-by: from my renesas email address? Acked-by has a different meaning. I'd say that generally it's okay to have this light mismatch, see [1] or any of the emails that B4 generates for web-based submission. [1] https://lore.kernel.org/dri-devel/20241121164858.457921-1-robdclark@gmail.com/ > -- With best wishes Dmitry
Hi Dmitry, On Wed, Dec 04, 2024 at 01:53:44PM +0200, Dmitry Baryshkov wrote: > On Wed, Dec 04, 2024 at 11:37:05AM +0100, Tommaso Merciai wrote: > > Hi Liu Ying, > > Thanks for your review. > > > > On Wed, Dec 04, 2024 at 11:34:23AM +0800, Liu Ying wrote: > > > On 12/04/2024, tomm.merciai@gmail.com wrote: > > > > From: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> > > > > > > > > Introduce it6263_is_input_bus_fmt_valid() and refactor the > > > > it6263_bridge_atomic_get_input_bus_fmts() function to support VESA > > > > format by selecting the LVDS input format based on the LVDS data mapping > > > > and thereby support both JEIDA and VESA input formats. > > > > > > ite,it6263.yaml says IT6263 supports vesa-24 and vesa-30, while > > > this patch actually only adds vesa-24 support. So, to be more > > > specific, the patch subject and commit message should reflect > > > this rather than claim "Support VESA input format". > > > > Fully agree, thanks. > > I will fix that in v2 specifying vesa-24 like you suggest. > > > > > > > > > > > > > Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> > > > > > > Can you please send this patch with your Renesas email address > > > instead of Gmail email address? > > > Otherwise, add a Signed-off-by tag with your Gmail email address. > > > > Thanks, for the point. > > What about adding Acked-by: from my renesas email address? > > Acked-by has a different meaning. I'd say that generally it's okay to > have this light mismatch, see [1] or any of the emails that B4 generates > for web-based submission. > > [1] https://lore.kernel.org/dri-devel/20241121164858.457921-1-robdclark@gmail.com/ Thanks for sharing this example and for the clarification. This is similar to my case :) Then v1 procedure is correct? I can use the same formatting (From: Sob:) for sending v2? Thanks & Regards, Tommaso > > > > > -- > With best wishes > Dmitry
On Wed, Dec 04, 2024 at 02:11:28PM +0100, Tommaso Merciai wrote: > Hi Dmitry, > > On Wed, Dec 04, 2024 at 01:53:44PM +0200, Dmitry Baryshkov wrote: > > On Wed, Dec 04, 2024 at 11:37:05AM +0100, Tommaso Merciai wrote: > > > Hi Liu Ying, > > > Thanks for your review. > > > > > > On Wed, Dec 04, 2024 at 11:34:23AM +0800, Liu Ying wrote: > > > > On 12/04/2024, tomm.merciai@gmail.com wrote: > > > > > From: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> > > > > > > > > > > Introduce it6263_is_input_bus_fmt_valid() and refactor the > > > > > it6263_bridge_atomic_get_input_bus_fmts() function to support VESA > > > > > format by selecting the LVDS input format based on the LVDS data mapping > > > > > and thereby support both JEIDA and VESA input formats. > > > > > > > > ite,it6263.yaml says IT6263 supports vesa-24 and vesa-30, while > > > > this patch actually only adds vesa-24 support. So, to be more > > > > specific, the patch subject and commit message should reflect > > > > this rather than claim "Support VESA input format". > > > > > > Fully agree, thanks. > > > I will fix that in v2 specifying vesa-24 like you suggest. > > > > > > > > > > > > > > > > > Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> > > > > > > > > Can you please send this patch with your Renesas email address > > > > instead of Gmail email address? > > > > Otherwise, add a Signed-off-by tag with your Gmail email address. > > > > > > Thanks, for the point. > > > What about adding Acked-by: from my renesas email address? > > > > Acked-by has a different meaning. I'd say that generally it's okay to > > have this light mismatch, see [1] or any of the emails that B4 generates > > for web-based submission. > > > > [1] https://lore.kernel.org/dri-devel/20241121164858.457921-1-robdclark@gmail.com/ > > Thanks for sharing this example and for the clarification. > This is similar to my case :) > > Then v1 procedure is correct? > I can use the same formatting (From: Sob:) for sending v2? I think so > > Thanks & Regards, > Tommaso > > > > > > > > > -- > > With best wishes > > Dmitry -- With best wishes Dmitry
On Wed, Dec 04, 2024 at 03:33:09PM +0200, Dmitry Baryshkov wrote: > On Wed, Dec 04, 2024 at 02:11:28PM +0100, Tommaso Merciai wrote: > > Hi Dmitry, > > > > On Wed, Dec 04, 2024 at 01:53:44PM +0200, Dmitry Baryshkov wrote: > > > On Wed, Dec 04, 2024 at 11:37:05AM +0100, Tommaso Merciai wrote: > > > > Hi Liu Ying, > > > > Thanks for your review. > > > > > > > > On Wed, Dec 04, 2024 at 11:34:23AM +0800, Liu Ying wrote: > > > > > On 12/04/2024, tomm.merciai@gmail.com wrote: > > > > > > From: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> > > > > > > > > > > > > Introduce it6263_is_input_bus_fmt_valid() and refactor the > > > > > > it6263_bridge_atomic_get_input_bus_fmts() function to support VESA > > > > > > format by selecting the LVDS input format based on the LVDS data mapping > > > > > > and thereby support both JEIDA and VESA input formats. > > > > > > > > > > ite,it6263.yaml says IT6263 supports vesa-24 and vesa-30, while > > > > > this patch actually only adds vesa-24 support. So, to be more > > > > > specific, the patch subject and commit message should reflect > > > > > this rather than claim "Support VESA input format". > > > > > > > > Fully agree, thanks. > > > > I will fix that in v2 specifying vesa-24 like you suggest. > > > > > > > > > > > > > > > > > > > > > Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> > > > > > > > > > > Can you please send this patch with your Renesas email address > > > > > instead of Gmail email address? > > > > > Otherwise, add a Signed-off-by tag with your Gmail email address. > > > > > > > > Thanks, for the point. > > > > What about adding Acked-by: from my renesas email address? > > > > > > Acked-by has a different meaning. I'd say that generally it's okay to > > > have this light mismatch, see [1] or any of the emails that B4 generates > > > for web-based submission. > > > > > > [1] https://lore.kernel.org/dri-devel/20241121164858.457921-1-robdclark@gmail.com/ > > > > Thanks for sharing this example and for the clarification. > > This is similar to my case :) > > > > Then v1 procedure is correct? > > I can use the same formatting (From: Sob:) for sending v2? > > I think so Oks, thanks for the feedback. Regards, Tommaso > > > > > Thanks & Regards, > > Tommaso > > > > > > > > > > > > > -- > > > With best wishes > > > Dmitry > > -- > With best wishes > Dmitry
On Tue, Dec 03, 2024 at 06:21:29PM +0100, tomm.merciai@gmail.com wrote:
> From: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
>
> Introduce it6263_is_input_bus_fmt_valid() and refactor the
> it6263_bridge_atomic_get_input_bus_fmts() function to support VESA
> format by selecting the LVDS input format based on the LVDS data mapping
> and thereby support both JEIDA and VESA input formats.
For the patch itself,
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
A more generic question: is the bridge limited to 4 lanes or does it
support 3-lane or 5-lane configurations?
>
> Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
> ---
> drivers/gpu/drm/bridge/ite-it6263.c | 25 ++++++++++++++++++++++---
> 1 file changed, 22 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/bridge/ite-it6263.c b/drivers/gpu/drm/bridge/ite-it6263.c
> index cbabd4e20d3e..83d1db29157a 100644
> --- a/drivers/gpu/drm/bridge/ite-it6263.c
> +++ b/drivers/gpu/drm/bridge/ite-it6263.c
> @@ -48,6 +48,7 @@
> #define REG_COL_DEP GENMASK(1, 0)
> #define BIT8 FIELD_PREP(REG_COL_DEP, 1)
> #define OUT_MAP BIT(4)
> +#define VESA BIT(4)
> #define JEIDA 0
> #define REG_DESSC_ENB BIT(6)
> #define DMODE BIT(7)
> @@ -428,12 +429,30 @@ static inline void it6263_lvds_reset(struct it6263 *it)
> fsleep(10000);
> }
>
> +static bool it6263_is_input_bus_fmt_valid(u32 input_fmt)
> +{
> + switch (input_fmt) {
> + case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:
> + case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:
> + return true;
> + }
> + return false;
> +}
> +
--
With best wishes
Dmitry
On 12/04/2024, Dmitry Baryshkov wrote:
> On Tue, Dec 03, 2024 at 06:21:29PM +0100, tomm.merciai@gmail.com wrote:
>> From: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
>>
>> Introduce it6263_is_input_bus_fmt_valid() and refactor the
>> it6263_bridge_atomic_get_input_bus_fmts() function to support VESA
>> format by selecting the LVDS input format based on the LVDS data mapping
>> and thereby support both JEIDA and VESA input formats.
>
> For the patch itself,
>
> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
>
> A more generic question: is the bridge limited to 4 lanes or does it
> support 3-lane or 5-lane configurations?
According to ite,it6263.yaml, the bridge supports all the data
mappings(jeida-{18,24,30} and vesa-{24,30}) listed in
lvds-data-mapping.yaml. lvds-data-mapping.yaml specifies the
data lanes(3/4/5) used by each of the data mappings. So, the
bridge supports 3, 4 or 5 data lanes.
>
>>
>> Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
>> ---
>> drivers/gpu/drm/bridge/ite-it6263.c | 25 ++++++++++++++++++++++---
>> 1 file changed, 22 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/bridge/ite-it6263.c b/drivers/gpu/drm/bridge/ite-it6263.c
>> index cbabd4e20d3e..83d1db29157a 100644
>> --- a/drivers/gpu/drm/bridge/ite-it6263.c
>> +++ b/drivers/gpu/drm/bridge/ite-it6263.c
>> @@ -48,6 +48,7 @@
>> #define REG_COL_DEP GENMASK(1, 0)
>> #define BIT8 FIELD_PREP(REG_COL_DEP, 1)
>> #define OUT_MAP BIT(4)
>> +#define VESA BIT(4)
>> #define JEIDA 0
>> #define REG_DESSC_ENB BIT(6)
>> #define DMODE BIT(7)
>> @@ -428,12 +429,30 @@ static inline void it6263_lvds_reset(struct it6263 *it)
>> fsleep(10000);
>> }
>>
>> +static bool it6263_is_input_bus_fmt_valid(u32 input_fmt)
>> +{
>> + switch (input_fmt) {
>> + case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:
>> + case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:
>> + return true;
>> + }
>> + return false;
>> +}
>> +
>
--
Regards,
Liu Ying
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