[PATCH] riscv: mm: Fix alignment of phys_ram_base

Xu Lu posted 1 patch 1 year, 2 months ago
There is a newer version of this series
arch/riscv/mm/init.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
[PATCH] riscv: mm: Fix alignment of phys_ram_base
Posted by Xu Lu 1 year, 2 months ago
This commit fixes the alignment of phys_ram_base in RISC-V.

In sparse vmemmap model, the virtual address of vmemmap is calculated as:
'(struct page *)VMEMMAP_START - (phys_ram_base >> PAGE_SHIFT)'.
And the struct page's va can be calculated with an offset:
'vmemmap + (pfn)'.

However, when initializing struct pages, kernel actually starts from the
first page from the same section that phys_ram_base belongs to. If the
first page's physical address is not 'phys_ram_base >> PAGE_SHIFT', then
we get an va below VMEMMAP_START when calculating va for it's struct page.

For example, if phys_ram_base starts from 0x82000000 with pfn 0x82000, the
first page in the same section is actually pfn 0x80000. During
init_unavailage_range, we will initialize struct page for pfn 0x80000
with virtual address '(struct page *)VMEMMAP_START - 0x2000', which is
below VMEMMAP_START as well as PCI_IO_END.

This commit fixes this bug by aligning phys_ram_base with SECTION_SIZE.

Signed-off-by: Xu Lu <luxu.kernel@bytedance.com>
---
 arch/riscv/mm/init.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c
index 0e8c20adcd98..9866de267b74 100644
--- a/arch/riscv/mm/init.c
+++ b/arch/riscv/mm/init.c
@@ -59,6 +59,8 @@ EXPORT_SYMBOL(pgtable_l4_enabled);
 EXPORT_SYMBOL(pgtable_l5_enabled);
 #endif
 
+#define RISCV_MEMSTART_ALIGN	(1UL << SECTION_SIZE_BITS)
+
 phys_addr_t phys_ram_base __ro_after_init;
 EXPORT_SYMBOL(phys_ram_base);
 
@@ -241,7 +243,8 @@ static void __init setup_bootmem(void)
 	 * at worst, we map the linear mapping with PMD mappings.
 	 */
 	if (!IS_ENABLED(CONFIG_XIP_KERNEL))
-		phys_ram_base = memblock_start_of_DRAM() & PMD_MASK;
+		phys_ram_base = round_down(memblock_start_of_DRAM(),
+					   RISCV_MEMSTART_ALIGN);
 
 	/*
 	 * In 64-bit, any use of __va/__pa before this point is wrong as we
-- 
2.20.1
Re: [PATCH] riscv: mm: Fix alignment of phys_ram_base
Posted by Björn Töpel 1 year, 2 months ago
Xu Lu <luxu.kernel@bytedance.com> writes:

> This commit fixes the alignment of phys_ram_base in RISC-V.
>
> In sparse vmemmap model, the virtual address of vmemmap is calculated as:
> '(struct page *)VMEMMAP_START - (phys_ram_base >> PAGE_SHIFT)'.
> And the struct page's va can be calculated with an offset:
> 'vmemmap + (pfn)'.
>
> However, when initializing struct pages, kernel actually starts from the
> first page from the same section that phys_ram_base belongs to. If the
> first page's physical address is not 'phys_ram_base >> PAGE_SHIFT', then
> we get an va below VMEMMAP_START when calculating va for it's struct page.

Nice catch! I managed to reproduce this on a hacked qemu virt machine.

> For example, if phys_ram_base starts from 0x82000000 with pfn 0x82000, the
> first page in the same section is actually pfn 0x80000. During
> init_unavailage_range, we will initialize struct page for pfn 0x80000

"init_unavailable_range()" spelling for greppability.

> with virtual address '(struct page *)VMEMMAP_START - 0x2000', which is
> below VMEMMAP_START as well as PCI_IO_END.
>
> This commit fixes this bug by aligning phys_ram_base with SECTION_SIZE.
>
> Signed-off-by: Xu Lu <luxu.kernel@bytedance.com>

Please add a fixes tag.

> ---
>  arch/riscv/mm/init.c | 5 ++++-
>  1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c
> index 0e8c20adcd98..9866de267b74 100644
> --- a/arch/riscv/mm/init.c
> +++ b/arch/riscv/mm/init.c
> @@ -59,6 +59,8 @@ EXPORT_SYMBOL(pgtable_l4_enabled);
>  EXPORT_SYMBOL(pgtable_l5_enabled);
>  #endif
>  
> +#define RISCV_MEMSTART_ALIGN	(1UL << SECTION_SIZE_BITS)
> +
>  phys_addr_t phys_ram_base __ro_after_init;
>  EXPORT_SYMBOL(phys_ram_base);
>  
> @@ -241,7 +243,8 @@ static void __init setup_bootmem(void)
>  	 * at worst, we map the linear mapping with PMD mappings.
>  	 */
>  	if (!IS_ENABLED(CONFIG_XIP_KERNEL))
> -		phys_ram_base = memblock_start_of_DRAM() & PMD_MASK;
> +		phys_ram_base = round_down(memblock_start_of_DRAM(),
> +					   RISCV_MEMSTART_ALIGN);

No need to wrap this line. Also, is the RISCV_MEMSTART_ALIGN define
really needed?

The kernel test robot had some build issues as well!


Björn
Re: [External] Re: [PATCH] riscv: mm: Fix alignment of phys_ram_base
Posted by Xu Lu 1 year, 2 months ago
On Tue, Dec 3, 2024 at 7:50 PM Björn Töpel <bjorn@kernel.org> wrote:
>
> Xu Lu <luxu.kernel@bytedance.com> writes:
>
> > This commit fixes the alignment of phys_ram_base in RISC-V.
> >
> > In sparse vmemmap model, the virtual address of vmemmap is calculated as:
> > '(struct page *)VMEMMAP_START - (phys_ram_base >> PAGE_SHIFT)'.
> > And the struct page's va can be calculated with an offset:
> > 'vmemmap + (pfn)'.
> >
> > However, when initializing struct pages, kernel actually starts from the
> > first page from the same section that phys_ram_base belongs to. If the
> > first page's physical address is not 'phys_ram_base >> PAGE_SHIFT', then
> > we get an va below VMEMMAP_START when calculating va for it's struct page.
>
> Nice catch! I managed to reproduce this on a hacked qemu virt machine.
>
> > For example, if phys_ram_base starts from 0x82000000 with pfn 0x82000, the
> > first page in the same section is actually pfn 0x80000. During
> > init_unavailage_range, we will initialize struct page for pfn 0x80000
>
> "init_unavailable_range()" spelling for greppability.
>
> > with virtual address '(struct page *)VMEMMAP_START - 0x2000', which is
> > below VMEMMAP_START as well as PCI_IO_END.
> >
> > This commit fixes this bug by aligning phys_ram_base with SECTION_SIZE.
> >
> > Signed-off-by: Xu Lu <luxu.kernel@bytedance.com>
>
> Please add a fixes tag.

Roger that.

>
> > ---
> >  arch/riscv/mm/init.c | 5 ++++-
> >  1 file changed, 4 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c
> > index 0e8c20adcd98..9866de267b74 100644
> > --- a/arch/riscv/mm/init.c
> > +++ b/arch/riscv/mm/init.c
> > @@ -59,6 +59,8 @@ EXPORT_SYMBOL(pgtable_l4_enabled);
> >  EXPORT_SYMBOL(pgtable_l5_enabled);
> >  #endif
> >
> > +#define RISCV_MEMSTART_ALIGN (1UL << SECTION_SIZE_BITS)
> > +
> >  phys_addr_t phys_ram_base __ro_after_init;
> >  EXPORT_SYMBOL(phys_ram_base);
> >
> > @@ -241,7 +243,8 @@ static void __init setup_bootmem(void)
> >        * at worst, we map the linear mapping with PMD mappings.
> >        */
> >       if (!IS_ENABLED(CONFIG_XIP_KERNEL))
> > -             phys_ram_base = memblock_start_of_DRAM() & PMD_MASK;
> > +             phys_ram_base = round_down(memblock_start_of_DRAM(),
> > +                                        RISCV_MEMSTART_ALIGN);
>
> No need to wrap this line. Also, is the RISCV_MEMSTART_ALIGN define
> really needed?

Maybe it is not so friendly to FLATMEM model if we always align
phys_ram_base with SECTION_SIZE.
I will refine the code and send again later.

>
> The kernel test robot had some build issues as well!
>
>
> Björn
Re: [PATCH] riscv: mm: Fix alignment of phys_ram_base
Posted by kernel test robot 1 year, 2 months ago
Hi Xu,

kernel test robot noticed the following build errors:

[auto build test ERROR on linus/master]
[also build test ERROR on v6.13-rc1 next-20241128]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Xu-Lu/riscv-mm-Fix-alignment-of-phys_ram_base/20241202-183801
base:   linus/master
patch link:    https://lore.kernel.org/r/20241202101601.48284-1-luxu.kernel%40bytedance.com
patch subject: [PATCH] riscv: mm: Fix alignment of phys_ram_base
config: riscv-allnoconfig (https://download.01.org/0day-ci/archive/20241202/202412022337.YEieoR2g-lkp@intel.com/config)
compiler: riscv64-linux-gcc (GCC) 14.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20241202/202412022337.YEieoR2g-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202412022337.YEieoR2g-lkp@intel.com/

All errors (new ones prefixed by >>):

   In file included from include/linux/kernel.h:27,
                    from include/linux/cpumask.h:11,
                    from arch/riscv/include/asm/processor.h:55,
                    from arch/riscv/include/asm/thread_info.h:42,
                    from include/linux/thread_info.h:60,
                    from include/asm-generic/preempt.h:5,
                    from ./arch/riscv/include/generated/asm/preempt.h:1,
                    from include/linux/preempt.h:79,
                    from include/linux/spinlock.h:56,
                    from include/linux/mmzone.h:8,
                    from include/linux/gfp.h:7,
                    from include/linux/mm.h:7,
                    from arch/riscv/mm/init.c:10:
   arch/riscv/mm/init.c: In function 'setup_bootmem':
>> arch/riscv/mm/init.c:62:41: error: 'SECTION_SIZE_BITS' undeclared (first use in this function)
      62 | #define RISCV_MEMSTART_ALIGN    (1UL << SECTION_SIZE_BITS)
         |                                         ^~~~~~~~~~~~~~~~~
   include/linux/math.h:15:46: note: in definition of macro '__round_mask'
      15 | #define __round_mask(x, y) ((__typeof__(x))((y)-1))
         |                                              ^
   arch/riscv/mm/init.c:246:33: note: in expansion of macro 'round_down'
     246 |                 phys_ram_base = round_down(memblock_start_of_DRAM(),
         |                                 ^~~~~~~~~~
   arch/riscv/mm/init.c:247:44: note: in expansion of macro 'RISCV_MEMSTART_ALIGN'
     247 |                                            RISCV_MEMSTART_ALIGN);
         |                                            ^~~~~~~~~~~~~~~~~~~~
   arch/riscv/mm/init.c:62:41: note: each undeclared identifier is reported only once for each function it appears in
      62 | #define RISCV_MEMSTART_ALIGN    (1UL << SECTION_SIZE_BITS)
         |                                         ^~~~~~~~~~~~~~~~~
   include/linux/math.h:15:46: note: in definition of macro '__round_mask'
      15 | #define __round_mask(x, y) ((__typeof__(x))((y)-1))
         |                                              ^
   arch/riscv/mm/init.c:246:33: note: in expansion of macro 'round_down'
     246 |                 phys_ram_base = round_down(memblock_start_of_DRAM(),
         |                                 ^~~~~~~~~~
   arch/riscv/mm/init.c:247:44: note: in expansion of macro 'RISCV_MEMSTART_ALIGN'
     247 |                                            RISCV_MEMSTART_ALIGN);
         |                                            ^~~~~~~~~~~~~~~~~~~~


vim +/SECTION_SIZE_BITS +62 arch/riscv/mm/init.c

  > 10	#include <linux/mm.h>
    11	#include <linux/memblock.h>
    12	#include <linux/initrd.h>
    13	#include <linux/swap.h>
    14	#include <linux/swiotlb.h>
    15	#include <linux/sizes.h>
    16	#include <linux/of_fdt.h>
    17	#include <linux/of_reserved_mem.h>
    18	#include <linux/libfdt.h>
    19	#include <linux/set_memory.h>
    20	#include <linux/dma-map-ops.h>
    21	#include <linux/crash_dump.h>
    22	#include <linux/hugetlb.h>
    23	#ifdef CONFIG_RELOCATABLE
    24	#include <linux/elf.h>
    25	#endif
    26	#include <linux/kfence.h>
    27	#include <linux/execmem.h>
    28	
    29	#include <asm/fixmap.h>
    30	#include <asm/io.h>
    31	#include <asm/kasan.h>
    32	#include <asm/numa.h>
    33	#include <asm/pgtable.h>
    34	#include <asm/sections.h>
    35	#include <asm/soc.h>
    36	#include <asm/tlbflush.h>
    37	
    38	#include "../kernel/head.h"
    39	
    40	u64 new_vmalloc[NR_CPUS / sizeof(u64) + 1];
    41	
    42	struct kernel_mapping kernel_map __ro_after_init;
    43	EXPORT_SYMBOL(kernel_map);
    44	#ifdef CONFIG_XIP_KERNEL
    45	#define kernel_map	(*(struct kernel_mapping *)XIP_FIXUP(&kernel_map))
    46	#endif
    47	
    48	#ifdef CONFIG_64BIT
    49	u64 satp_mode __ro_after_init = !IS_ENABLED(CONFIG_XIP_KERNEL) ? SATP_MODE_57 : SATP_MODE_39;
    50	#else
    51	u64 satp_mode __ro_after_init = SATP_MODE_32;
    52	#endif
    53	EXPORT_SYMBOL(satp_mode);
    54	
    55	#ifdef CONFIG_64BIT
    56	bool pgtable_l4_enabled __ro_after_init = !IS_ENABLED(CONFIG_XIP_KERNEL);
    57	bool pgtable_l5_enabled __ro_after_init = !IS_ENABLED(CONFIG_XIP_KERNEL);
    58	EXPORT_SYMBOL(pgtable_l4_enabled);
    59	EXPORT_SYMBOL(pgtable_l5_enabled);
    60	#endif
    61	
  > 62	#define RISCV_MEMSTART_ALIGN	(1UL << SECTION_SIZE_BITS)
    63	

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