[v2] pci: qcom: Add QCS8300 PCIe support

[PATCH v2 0/8] pci: qcom: Add QCS8300 PCIe support

Posted by Ziyue Zhang 1 year, 2 months ago

This series adds document, phy, configs support for PCIe in QCS8300.
The series depend on the following devicetree.

Base DT:
https://lore.kernel.org/all/20240925-qcs8300_initial_dtsi-v2-0-494c40fa2a42@quicinc.com/

Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com>
Signed-off-by: Ziyue Zhang <quic_ziyuzhan@quicinc.com>
---
Have follwing changes:
	- Document the QMP PCIe PHY on the QCS8300 platform.
	- Add dedicated schema for the PCIe controllers found on QCS8300.
	- Add compatible for qcs8300 platform.
	- Add configurations in devicetree for PCIe0, including registers, clocks, interrupts and phy setting sequence.
	- Add configurations in devicetree for PCIe1, including registers, clocks, interrupts and phy setting sequence.

Changes in v2:
- Fix some format comments
- Add global interrupt for PCIe0 and PCIe1
- split the soc dtsi and the platform dts into two changes
- Link to v1: https://lore.kernel.org/all/20241114095409.2682558-1-quic_ziyuzhan@quicinc.com/

Ziyue Zhang (8):
  dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Document the QCS8300 QMP
    PCIe PHY Gen4 x2
  phy: qcom-qmp-pcie: add dual lane PHY support for QCS8300
  dt-bindings: PCI: qcom,pcie-sa8775p: document qcs8300
  PCI: qcom: Add QCS8300 PCIe support
  arm64: dts: qcom: qcs8300: enable pcie0 for qcs8300 platform
  arm64: dts: qcom: qcs8300: enable pcie0 for qcs8300 soc
  arm64: dts: qcom: qcs8300: enable pcie1 for qcs8300 soc
  arm64: dts: qcom: qcs8300: enable pcie1 for qcs8300 platform

 .../bindings/pci/qcom,pcie-sa8775p.yaml       |   7 +-
 .../phy/qcom,sc8280xp-qmp-pcie-phy.yaml       |   2 +
 arch/arm64/boot/dts/qcom/qcs8300-ride.dts     |  86 ++++-
 arch/arm64/boot/dts/qcom/qcs8300.dtsi         | 352 ++++++++++++++++++
 drivers/pci/controller/dwc/pcie-qcom.c        |   1 +
 drivers/phy/qualcomm/phy-qcom-qmp-pcie.c      |  89 +++++
 6 files changed, 534 insertions(+), 3 deletions(-)


base-commit: eb6a0b56032c62351a59a12915a89428bce68d1d
-- 
2.34.1

Re: [PATCH v2 0/8] pci: qcom: Add QCS8300 PCIe support

Posted by Bjorn Helgaas 1 year, 2 months ago

On Thu, Nov 28, 2024 at 04:10:48PM +0800, Ziyue Zhang wrote:
> This series adds document, phy, configs support for PCIe in QCS8300.
> The series depend on the following devicetree.

> base-commit: eb6a0b56032c62351a59a12915a89428bce68d1d

Also, this commit doesn't appear in upstream or linux-next, so we need
some hint about where to get it.  The most recent -rc1 tag is a good
default unless the series depends on something not included there.

Re: [PATCH v2 0/8] pci: qcom: Add QCS8300 PCIe support

Posted by Bjorn Helgaas 1 year, 2 months ago

[+cc linux-pci; odd to have a series labeled "pci: ..." but without
copying linux-pci]
 
On Thu, Nov 28, 2024 at 04:10:48PM +0800, Ziyue Zhang wrote:
> This series adds document, phy, configs support for PCIe in QCS8300.
> The series depend on the following devicetree.
> 
> Base DT:
> https://lore.kernel.org/all/20240925-qcs8300_initial_dtsi-v2-0-494c40fa2a42@quicinc.com/
> 
> Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com>
> Signed-off-by: Ziyue Zhang <quic_ziyuzhan@quicinc.com>
> ---
> Have follwing changes:
> 	- Document the QMP PCIe PHY on the QCS8300 platform.
> 	- Add dedicated schema for the PCIe controllers found on QCS8300.
> 	- Add compatible for qcs8300 platform.
> 	- Add configurations in devicetree for PCIe0, including registers, clocks, interrupts and phy setting sequence.
> 	- Add configurations in devicetree for PCIe1, including registers, clocks, interrupts and phy setting sequence.
> 
> Changes in v2:
> - Fix some format comments
> - Add global interrupt for PCIe0 and PCIe1
> - split the soc dtsi and the platform dts into two changes
> - Link to v1: https://lore.kernel.org/all/20241114095409.2682558-1-quic_ziyuzhan@quicinc.com/
> 
> Ziyue Zhang (8):
>   dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Document the QCS8300 QMP
>     PCIe PHY Gen4 x2
>   phy: qcom-qmp-pcie: add dual lane PHY support for QCS8300
>   dt-bindings: PCI: qcom,pcie-sa8775p: document qcs8300
>   PCI: qcom: Add QCS8300 PCIe support
>   arm64: dts: qcom: qcs8300: enable pcie0 for qcs8300 platform
>   arm64: dts: qcom: qcs8300: enable pcie0 for qcs8300 soc
>   arm64: dts: qcom: qcs8300: enable pcie1 for qcs8300 soc
>   arm64: dts: qcom: qcs8300: enable pcie1 for qcs8300 platform
> 
>  .../bindings/pci/qcom,pcie-sa8775p.yaml       |   7 +-
>  .../phy/qcom,sc8280xp-qmp-pcie-phy.yaml       |   2 +
>  arch/arm64/boot/dts/qcom/qcs8300-ride.dts     |  86 ++++-
>  arch/arm64/boot/dts/qcom/qcs8300.dtsi         | 352 ++++++++++++++++++
>  drivers/pci/controller/dwc/pcie-qcom.c        |   1 +
>  drivers/phy/qualcomm/phy-qcom-qmp-pcie.c      |  89 +++++
>  6 files changed, 534 insertions(+), 3 deletions(-)
> 
> 
> base-commit: eb6a0b56032c62351a59a12915a89428bce68d1d
> -- 
> 2.34.1
>