From: Pekka Pessi <ppessi@nvidia.com>

Some clients depend on mailbox being empty before processing the
message. On RT kernel, the thread processing the message may be on
different CPU or running with higher priority than the interrupt
handler thread and they may act on the message before mailbox is
emptied.

Signed-off-by: Pekka Pessi <ppessi@nvidia.com>
Signed-off-by: Kartik Rajput <kkartik@nvidia.com>
---
 drivers/mailbox/tegra-hsp.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/mailbox/tegra-hsp.c b/drivers/mailbox/tegra-hsp.c
index 8d5e2d7dc03b..9c09858edee7 100644
--- a/drivers/mailbox/tegra-hsp.c
+++ b/drivers/mailbox/tegra-hsp.c
@@ -388,7 +388,6 @@ static void tegra_hsp_sm_recv32(struct tegra_hsp_channel *channel)
 	value = tegra_hsp_channel_readl(channel, HSP_SM_SHRD_MBOX);
 	value &= ~HSP_SM_SHRD_MBOX_FULL;
 	msg = (void *)(unsigned long)value;
-	mbox_chan_received_data(channel->chan, msg);
 
 	/*
 	 * Need to clear all bits here since some producers, such as TCU, depend
@@ -398,6 +397,8 @@ static void tegra_hsp_sm_recv32(struct tegra_hsp_channel *channel)
 	 * explicitly, so we have to make sure we cover all possible cases.
 	 */
 	tegra_hsp_channel_writel(channel, 0x0, HSP_SM_SHRD_MBOX);
+
+	mbox_chan_received_data(channel->chan, msg);
 }
 
 static const struct tegra_hsp_sm_ops tegra_hsp_sm_32bit_ops = {
-- 
2.47.0

On 27/11/2024 06:20, Kartik Rajput wrote:
> From: Pekka Pessi <ppessi@nvidia.com>
> 
> Some clients depend on mailbox being empty before processing the
> message. On RT kernel, the thread processing the message may be on
> different CPU or running with higher priority than the interrupt
> handler thread and they may act on the message before mailbox is
> emptied.
> 
> Signed-off-by: Pekka Pessi <ppessi@nvidia.com>
> Signed-off-by: Kartik Rajput <kkartik@nvidia.com>

We should include a fixes tag here. I believe that this would be a good 
candidate for stable too and so worth CC stable on this.

Thanks!
Jon

-- 
nvpublic