From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Enable USB support (host, device, USB PHYs).
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
---
Changes in v2:
- this was patch 15/16 in v1:
- dropped sysc enablement as it is now done in SoC dtsi file
arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi | 57 ++++++++++++++++++++
1 file changed, 57 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi
index 4509151344c4..84523e771ebf 100644
--- a/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi
@@ -64,12 +64,35 @@ vccq_sdhi1: regulator-vccq-sdhi1 {
};
};
+&ehci0 {
+ dr_mode = "otg";
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&hsusb {
+ dr_mode = "otg";
+ status = "okay";
+};
+
&i2c0 {
status = "okay";
clock-frequency = <1000000>;
};
+&ohci0 {
+ dr_mode = "otg";
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
&pinctrl {
key-1-gpio-hog {
gpio-hog;
@@ -128,6 +151,27 @@ cd {
pinmux = <RZG2L_PORT_PINMUX(0, 2, 1)>; /* SD1_CD */
};
};
+
+ usb0_pins: usb0 {
+ peri {
+ pinmux = <RZG2L_PORT_PINMUX(5, 0, 1)>, /* VBUS */
+ <RZG2L_PORT_PINMUX(5, 2, 1)>; /* OVC */
+ };
+
+ otg {
+ pinmux = <RZG2L_PORT_PINMUX(5, 3, 1)>; /* OTG_ID */
+ bias-pull-up;
+ };
+ };
+
+ usb1_pins: usb1 {
+ pinmux = <RZG2L_PORT_PINMUX(5, 4, 5)>, /* OVC */
+ <RZG2L_PORT_PINMUX(6, 0, 1)>; /* VBUS */
+ };
+};
+
+&phyrst {
+ status = "okay";
};
&scif0 {
@@ -148,3 +192,16 @@ &sdhi1 {
max-frequency = <125000000>;
status = "okay";
};
+
+&usb2_phy0 {
+ pinctrl-0 = <&usb0_pins>;
+ pinctrl-names = "default";
+ vbus-supply = <&usb0_vbus_otg>;
+ status = "okay";
+};
+
+&usb2_phy1 {
+ pinctrl-0 = <&usb1_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+};
--
2.39.2