On Fri, Nov 22, 2024 at 10:33:14AM +0800, Ziyue Zhang wrote:
"arm64: dts: qcom: qcs615-ride: Enable PCIe interface"
Regards,
Bjorn
> From: Krishna chaitanya chundru <quic_krichai@quicinc.com>
>
> Add platform configurations in devicetree for PCIe, board related
> gpios, PMIC regulators, etc.
>
> Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com>
> Signed-off-by: Ziyue Zhang <quic_ziyuzhan@quicinc.com>
> ---
> arch/arm64/boot/dts/qcom/qcs615-ride.dts | 42 ++++++++++++++++++++++++
> 1 file changed, 42 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/qcs615-ride.dts b/arch/arm64/boot/dts/qcom/qcs615-ride.dts
> index ee6cab3924a6..18f131ae9e07 100644
> --- a/arch/arm64/boot/dts/qcom/qcs615-ride.dts
> +++ b/arch/arm64/boot/dts/qcom/qcs615-ride.dts
> @@ -202,6 +202,23 @@ &gcc {
> <&sleep_clk>;
> };
>
> +&pcie {
> + perst-gpios = <&tlmm 101 GPIO_ACTIVE_LOW>;
> + wake-gpios = <&tlmm 100 GPIO_ACTIVE_HIGH>;
> +
> + pinctrl-0 = <&pcie_default_state>;
> + pinctrl-names = "default";
> +
> + status = "okay";
> +};
> +
> +&pcie_phy {
> + vdda-phy-supply = <&vreg_l5a>;
> + vdda-pll-supply = <&vreg_l12a>;
> +
> + status = "okay";
> +};
> +
> &qupv3_id_0 {
> status = "okay";
> };
> @@ -210,6 +227,31 @@ &rpmhcc {
> clocks = <&xo_board_clk>;
> };
>
> +&tlmm {
> + pcie_default_state: pcie-default-state {
> + clkreq-pins {
> + pins = "gpio90";
> + function = "pcie_clk_req";
> + drive-strength = <2>;
> + bias-pull-up;
> + };
> +
> + perst-pins {
> + pins = "gpio101";
> + function = "gpio";
> + drive-strength = <2>;
> + bias-pull-down;
> + };
> +
> + wake-pins {
> + pins = "gpio100";
> + function = "gpio";
> + drive-strength = <2>;
> + bias-pull-up;
> + };
> + };
> +};
> +
> &uart0 {
> status = "okay";
> };
> --
> 2.34.1
>