From: Shiju Jose <shiju.jose@huawei.com>
Add Component Identifier formatting for CXL spec rev 3.1, Section
8.2.9.2.1, Table 8-44.
Add helper function to print component ID, parse and log PLDM entity ID
and resource ID.
Signed-off-by: Shiju Jose <shiju.jose@huawei.com>
---
ras-cxl-handler.c | 41 +++++++++++++++++++++++++++++++++++++++++
ras-record.h | 3 +++
2 files changed, 44 insertions(+)
diff --git a/ras-cxl-handler.c b/ras-cxl-handler.c
index d16eaef..80afa9f 100644
--- a/ras-cxl-handler.c
+++ b/ras-cxl-handler.c
@@ -573,6 +573,47 @@ int ras_cxl_overflow_event_handler(struct trace_seq *s,
return 0;
}
+/*
+ * Component ID Format
+ * CXL 3.1 section 8.2.9.2.1; Table 8-44
+ */
+#define CXL_PLDM_COMPONENT_ID_ENTITY_VALID BIT(0)
+#define CXL_PLDM_COMPONENT_ID_RES_VALID BIT(1)
+static const struct cxl_event_flags cxl_pldm_comp_id_flags[] = {
+ { .bit = CXL_PLDM_COMPONENT_ID_ENTITY_VALID, .flag = "PLDM Entity ID" },
+ { .bit = CXL_PLDM_COMPONENT_ID_RES_VALID, .flag = "Resource ID" },
+};
+
+static int ras_cxl_print_component_id(struct trace_seq *s, uint8_t *comp_id,
+ uint8_t *entity_id, uint8_t *res_id)
+{
+ int i;
+
+ if (comp_id[0] & CXL_PLDM_COMPONENT_ID_ENTITY_VALID) {
+ if (trace_seq_printf(s, "PLDM Entity ID:") <= 0)
+ return -1;
+ for (i = 1; i < 7; i++) {
+ if (trace_seq_printf(s, "%02x ", comp_id[i]) <= 0)
+ return -1;
+ }
+ if (entity_id)
+ memcpy(entity_id, &comp_id[1], CXL_PLDM_ENTITY_ID_LEN);
+ }
+
+ if (comp_id[0] & CXL_PLDM_COMPONENT_ID_RES_VALID) {
+ if (trace_seq_printf(s, "Resource ID:") <= 0)
+ return -1;
+ for (i = 7; i < 11; i++) {
+ if (trace_seq_printf(s, "%02x ", comp_id[i]) <= 0)
+ return -1;
+ }
+ if (res_id)
+ memcpy(res_id, &comp_id[7], CXL_PLDM_RES_ID_LEN);
+ }
+
+ return 0;
+}
+
/*
* Common Event Record Format
* CXL 3.1 section 8.2.9.2.1; Table 8-43
diff --git a/ras-record.h b/ras-record.h
index 2a0124a..a3a88eb 100644
--- a/ras-record.h
+++ b/ras-record.h
@@ -137,6 +137,9 @@ struct ras_cxl_poison_event {
#define CXL_EVENT_GEN_MED_COMP_ID_SIZE 0x10
#define CXL_EVENT_DER_CORRECTION_MASK_SIZE 0x20
+#define CXL_PLDM_ENTITY_ID_LEN 6
+#define CXL_PLDM_RES_ID_LEN 4
+
struct ras_cxl_aer_ue_event {
char timestamp[64];
const char *memdev;
--
2.43.0