The IPQ5424 SoC has both USB2.0 and USB3.0 controllers. The USB3.0
can connect to either of USB2.0 or USB3.0 phy and operate in the
respective mode.
Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
---
v3: Regulator node names, labels and 'regulator-name' changed per review suggestions
Stray newline removed
v2: Add dm/dp_hs_phy_irq to usb3@8a00000 node
Add u1/u2-entry quirks to usb@8a00000 node
---
arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts | 66 ++++++++
arch/arm64/boot/dts/qcom/ipq5424.dtsi | 159 ++++++++++++++++++++
2 files changed, 225 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts
index d4d31026a026..859e15befb3f 100644
--- a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts
+++ b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts
@@ -16,12 +16,70 @@ / {
aliases {
serial0 = &uart1;
};
+
+ vreg_misc_3p3: regulator-3300000 {
+ compatible = "regulator-fixed";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-name = "usb_hs_vdda_3p3";
+ };
+
+ vreg_misc_1p8: regulator-1800000 {
+ compatible = "regulator-fixed";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-name = "vdda_1p8_usb";
+ };
+
+ vreg_misc_0p925: regulator-0925000 {
+ compatible = "regulator-fixed";
+ regulator-min-microvolt = <925000>;
+ regulator-max-microvolt = <925000>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-name = "vdd_core_usb";
+ };
+};
+
+&dwc_0 {
+ dr_mode = "host";
+};
+
+&dwc_1 {
+ dr_mode = "host";
+};
+
+&qusb_phy_0 {
+ vdd-supply = <&vreg_misc_0p925>;
+ vdda-pll-supply = <&vreg_misc_1p8>;
+ vdda-phy-dpdm-supply = <&vreg_misc_3p3>;
+
+ status = "okay";
+};
+
+&qusb_phy_1 {
+ vdd-supply = <&vreg_misc_0p925>;
+ vdda-pll-supply = <&vreg_misc_1p8>;
+ vdda-phy-dpdm-supply = <&vreg_misc_3p3>;
+
+ status = "okay";
};
&sleep_clk {
clock-frequency = <32000>;
};
+&ssphy_0 {
+ vdda-pll-supply = <&vreg_misc_1p8>;
+ vdda-phy-supply = <&vreg_misc_0p925>;
+
+ status = "okay";
+};
+
&tlmm {
sdc_default_state: sdc-default-state {
clk-pins {
@@ -53,6 +111,14 @@ &uart1 {
status = "okay";
};
+&usb2 {
+ status = "okay";
+};
+
+&usb3 {
+ status = "okay";
+};
+
&xo_board {
clock-frequency = <24000000>;
};
diff --git a/arch/arm64/boot/dts/qcom/ipq5424.dtsi b/arch/arm64/boot/dts/qcom/ipq5424.dtsi
index 5e219f900412..f8afd6f0412d 100644
--- a/arch/arm64/boot/dts/qcom/ipq5424.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5424.dtsi
@@ -233,6 +233,165 @@ intc: interrupt-controller@f200000 {
msi-controller;
};
+ qusb_phy_1: phy@71000 {
+ compatible = "qcom,ipq5424-qusb2-phy";
+ reg = <0 0x00071000 0 0x180>;
+ #phy-cells = <0>;
+
+ clocks = <&gcc GCC_USB1_PHY_CFG_AHB_CLK>,
+ <&xo_board>;
+ clock-names = "cfg_ahb", "ref";
+
+ resets = <&gcc GCC_QUSB2_1_PHY_BCR>;
+ status = "disabled";
+ };
+
+ usb2: usb2@1e00000 {
+ compatible = "qcom,ipq5424-dwc3", "qcom,dwc3";
+ reg = <0 0x01ef8800 0 0x400>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ clocks = <&gcc GCC_USB1_MASTER_CLK>,
+ <&gcc GCC_USB1_SLEEP_CLK>,
+ <&gcc GCC_USB1_MOCK_UTMI_CLK>,
+ <&gcc GCC_USB1_PHY_CFG_AHB_CLK>,
+ <&gcc GCC_CNOC_USB_CLK>;
+
+ clock-names = "core",
+ "sleep",
+ "mock_utmi",
+ "iface",
+ "cfg_noc";
+
+ assigned-clocks = <&gcc GCC_USB1_MASTER_CLK>,
+ <&gcc GCC_USB1_MOCK_UTMI_CLK>;
+ assigned-clock-rates = <200000000>,
+ <24000000>;
+
+ interrupts-extended = <&intc GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>,
+ <&intc GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>,
+ <&intc GIC_SPI 387 IRQ_TYPE_LEVEL_HIGH>,
+ <&intc GIC_SPI 388 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "pwr_event",
+ "qusb2_phy",
+ "dm_hs_phy_irq",
+ "dp_hs_phy_irq";
+
+ resets = <&gcc GCC_USB1_BCR>;
+ qcom,select-utmi-as-pipe-clk;
+ status = "disabled";
+
+ dwc_1: usb@1e00000 {
+ compatible = "snps,dwc3";
+ reg = <0 0x01e00000 0 0xe000>;
+ clocks = <&gcc GCC_USB1_MOCK_UTMI_CLK>;
+ clock-names = "ref";
+ interrupts = <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>;
+ phys = <&qusb_phy_1>;
+ phy-names = "usb2-phy";
+ tx-fifo-resize;
+ snps,is-utmi-l1-suspend;
+ snps,hird-threshold = /bits/ 8 <0x0>;
+ snps,dis_u2_susphy_quirk;
+ snps,dis_u3_susphy_quirk;
+ };
+ };
+
+ qusb_phy_0: phy@7b000 {
+ compatible = "qcom,ipq5424-qusb2-phy";
+ reg = <0 0x0007b000 0 0x180>;
+ #phy-cells = <0>;
+
+ clocks = <&gcc GCC_USB0_PHY_CFG_AHB_CLK>,
+ <&xo_board>;
+ clock-names = "cfg_ahb", "ref";
+
+ resets = <&gcc GCC_QUSB2_0_PHY_BCR>;
+ status = "disabled";
+ };
+
+ ssphy_0: phy@7d000 {
+ compatible = "qcom,ipq5424-qmp-usb3-phy";
+ reg = <0 0x0007d000 0 0xa00>;
+ #phy-cells = <0>;
+
+ clocks = <&gcc GCC_USB0_AUX_CLK>,
+ <&xo_board>,
+ <&gcc GCC_USB0_PHY_CFG_AHB_CLK>,
+ <&gcc GCC_USB0_PIPE_CLK>;
+ clock-names = "aux",
+ "ref",
+ "cfg_ahb",
+ "pipe";
+
+ resets = <&gcc GCC_USB0_PHY_BCR>,
+ <&gcc GCC_USB3PHY_0_PHY_BCR>;
+ reset-names = "phy",
+ "phy_phy";
+
+ #clock-cells = <0>;
+ clock-output-names = "usb0_pipe_clk";
+
+ status = "disabled";
+ };
+
+ usb3: usb3@8a00000 {
+ compatible = "qcom,ipq5424-dwc3", "qcom,dwc3";
+ reg = <0 0x08af8800 0 0x400>;
+
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ clocks = <&gcc GCC_USB0_MASTER_CLK>,
+ <&gcc GCC_USB0_SLEEP_CLK>,
+ <&gcc GCC_USB0_MOCK_UTMI_CLK>,
+ <&gcc GCC_USB0_PHY_CFG_AHB_CLK>,
+ <&gcc GCC_CNOC_USB_CLK>;
+
+ clock-names = "core",
+ "sleep",
+ "mock_utmi",
+ "iface",
+ "cfg_noc";
+
+ assigned-clocks = <&gcc GCC_USB0_MASTER_CLK>,
+ <&gcc GCC_USB0_MOCK_UTMI_CLK>;
+ assigned-clock-rates = <200000000>,
+ <24000000>;
+
+ interrupts-extended = <&intc GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>,
+ <&intc GIC_SPI 414 IRQ_TYPE_LEVEL_HIGH>,
+ <&intc GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
+ <&intc GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "pwr_event",
+ "qusb2_phy",
+ "dm_hs_phy_irq",
+ "dp_hs_phy_irq";
+
+ resets = <&gcc GCC_USB_BCR>;
+ status = "disabled";
+
+ dwc_0: usb@8a00000 {
+ compatible = "snps,dwc3";
+ reg = <0 0x08a00000 0 0xcd00>;
+ clocks = <&gcc GCC_USB0_MOCK_UTMI_CLK>;
+ clock-names = "ref";
+ interrupts = <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>;
+ phys = <&qusb_phy_0>, <&ssphy_0>;
+ phy-names = "usb2-phy", "usb3-phy";
+ tx-fifo-resize;
+ snps,is-utmi-l1-suspend;
+ snps,hird-threshold = /bits/ 8 <0x0>;
+ snps,dis_u2_susphy_quirk;
+ snps,dis_u3_susphy_quirk;
+ snps,dis-u1-entry-quirk;
+ snps,dis-u2-entry-quirk;
+ };
+ };
+
timer@f420000 {
compatible = "arm,armv7-timer-mem";
reg = <0 0xf420000 0 0x1000>;
--
2.34.1On Thu, 14 Nov 2024 at 09:48, Varadarajan Narayanan
<quic_varada@quicinc.com> wrote:
>
> The IPQ5424 SoC has both USB2.0 and USB3.0 controllers. The USB3.0
> can connect to either of USB2.0 or USB3.0 phy and operate in the
> respective mode.
>
> Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
> ---
> v3: Regulator node names, labels and 'regulator-name' changed per review suggestions
> Stray newline removed
>
> v2: Add dm/dp_hs_phy_irq to usb3@8a00000 node
> Add u1/u2-entry quirks to usb@8a00000 node
> ---
> arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts | 66 ++++++++
> arch/arm64/boot/dts/qcom/ipq5424.dtsi | 159 ++++++++++++++++++++
> 2 files changed, 225 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts
> index d4d31026a026..859e15befb3f 100644
> --- a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts
> +++ b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts
> @@ -16,12 +16,70 @@ / {
> aliases {
> serial0 = &uart1;
> };
> +
> + vreg_misc_3p3: regulator-3300000 {
Technically these names are correct. However they don't match the
approach that Qualcomm DT files have been using up to now.
You can compare your data with the output of `git grep :.regulator-
arch/arm64/boot/dts/qcom/`
> + compatible = "regulator-fixed";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-boot-on;
> + regulator-always-on;
> + regulator-name = "usb_hs_vdda_3p3";
> + };
> +
> + vreg_misc_1p8: regulator-1800000 {
> + compatible = "regulator-fixed";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-boot-on;
> + regulator-always-on;
> + regulator-name = "vdda_1p8_usb";
> + };
> +
> + vreg_misc_0p925: regulator-0925000 {
> + compatible = "regulator-fixed";
> + regulator-min-microvolt = <925000>;
> + regulator-max-microvolt = <925000>;
> + regulator-boot-on;
> + regulator-always-on;
> + regulator-name = "vdd_core_usb";
> + };
> +};
> +
> +&dwc_0 {
> + dr_mode = "host";
> +};
> +
> +&dwc_1 {
> + dr_mode = "host";
> +};
> +
> +&qusb_phy_0 {
> + vdd-supply = <&vreg_misc_0p925>;
> + vdda-pll-supply = <&vreg_misc_1p8>;
> + vdda-phy-dpdm-supply = <&vreg_misc_3p3>;
> +
> + status = "okay";
> +};
> +
> +&qusb_phy_1 {
> + vdd-supply = <&vreg_misc_0p925>;
> + vdda-pll-supply = <&vreg_misc_1p8>;
> + vdda-phy-dpdm-supply = <&vreg_misc_3p3>;
> +
> + status = "okay";
> };
>
> &sleep_clk {
> clock-frequency = <32000>;
> };
>
> +&ssphy_0 {
> + vdda-pll-supply = <&vreg_misc_1p8>;
> + vdda-phy-supply = <&vreg_misc_0p925>;
> +
> + status = "okay";
> +};
> +
> &tlmm {
> sdc_default_state: sdc-default-state {
> clk-pins {
> @@ -53,6 +111,14 @@ &uart1 {
> status = "okay";
> };
>
> +&usb2 {
> + status = "okay";
> +};
> +
> +&usb3 {
> + status = "okay";
> +};
> +
> &xo_board {
> clock-frequency = <24000000>;
> };
> diff --git a/arch/arm64/boot/dts/qcom/ipq5424.dtsi b/arch/arm64/boot/dts/qcom/ipq5424.dtsi
> index 5e219f900412..f8afd6f0412d 100644
> --- a/arch/arm64/boot/dts/qcom/ipq5424.dtsi
> +++ b/arch/arm64/boot/dts/qcom/ipq5424.dtsi
> @@ -233,6 +233,165 @@ intc: interrupt-controller@f200000 {
> msi-controller;
> };
>
> + qusb_phy_1: phy@71000 {
> + compatible = "qcom,ipq5424-qusb2-phy";
> + reg = <0 0x00071000 0 0x180>;
> + #phy-cells = <0>;
> +
> + clocks = <&gcc GCC_USB1_PHY_CFG_AHB_CLK>,
> + <&xo_board>;
> + clock-names = "cfg_ahb", "ref";
> +
> + resets = <&gcc GCC_QUSB2_1_PHY_BCR>;
> + status = "disabled";
> + };
> +
> + usb2: usb2@1e00000 {
> + compatible = "qcom,ipq5424-dwc3", "qcom,dwc3";
> + reg = <0 0x01ef8800 0 0x400>;
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> +
> + clocks = <&gcc GCC_USB1_MASTER_CLK>,
> + <&gcc GCC_USB1_SLEEP_CLK>,
> + <&gcc GCC_USB1_MOCK_UTMI_CLK>,
> + <&gcc GCC_USB1_PHY_CFG_AHB_CLK>,
> + <&gcc GCC_CNOC_USB_CLK>;
> +
> + clock-names = "core",
> + "sleep",
> + "mock_utmi",
> + "iface",
> + "cfg_noc";
> +
> + assigned-clocks = <&gcc GCC_USB1_MASTER_CLK>,
> + <&gcc GCC_USB1_MOCK_UTMI_CLK>;
> + assigned-clock-rates = <200000000>,
> + <24000000>;
> +
> + interrupts-extended = <&intc GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>,
> + <&intc GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>,
> + <&intc GIC_SPI 387 IRQ_TYPE_LEVEL_HIGH>,
> + <&intc GIC_SPI 388 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "pwr_event",
> + "qusb2_phy",
> + "dm_hs_phy_irq",
> + "dp_hs_phy_irq";
> +
> + resets = <&gcc GCC_USB1_BCR>;
> + qcom,select-utmi-as-pipe-clk;
> + status = "disabled";
> +
> + dwc_1: usb@1e00000 {
> + compatible = "snps,dwc3";
> + reg = <0 0x01e00000 0 0xe000>;
> + clocks = <&gcc GCC_USB1_MOCK_UTMI_CLK>;
> + clock-names = "ref";
> + interrupts = <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>;
> + phys = <&qusb_phy_1>;
> + phy-names = "usb2-phy";
> + tx-fifo-resize;
> + snps,is-utmi-l1-suspend;
> + snps,hird-threshold = /bits/ 8 <0x0>;
> + snps,dis_u2_susphy_quirk;
> + snps,dis_u3_susphy_quirk;
> + };
> + };
> +
> + qusb_phy_0: phy@7b000 {
> + compatible = "qcom,ipq5424-qusb2-phy";
> + reg = <0 0x0007b000 0 0x180>;
> + #phy-cells = <0>;
> +
> + clocks = <&gcc GCC_USB0_PHY_CFG_AHB_CLK>,
> + <&xo_board>;
> + clock-names = "cfg_ahb", "ref";
> +
> + resets = <&gcc GCC_QUSB2_0_PHY_BCR>;
> + status = "disabled";
> + };
> +
> + ssphy_0: phy@7d000 {
> + compatible = "qcom,ipq5424-qmp-usb3-phy";
> + reg = <0 0x0007d000 0 0xa00>;
> + #phy-cells = <0>;
> +
> + clocks = <&gcc GCC_USB0_AUX_CLK>,
> + <&xo_board>,
> + <&gcc GCC_USB0_PHY_CFG_AHB_CLK>,
> + <&gcc GCC_USB0_PIPE_CLK>;
> + clock-names = "aux",
> + "ref",
> + "cfg_ahb",
> + "pipe";
> +
> + resets = <&gcc GCC_USB0_PHY_BCR>,
> + <&gcc GCC_USB3PHY_0_PHY_BCR>;
> + reset-names = "phy",
> + "phy_phy";
> +
> + #clock-cells = <0>;
> + clock-output-names = "usb0_pipe_clk";
> +
> + status = "disabled";
> + };
> +
> + usb3: usb3@8a00000 {
> + compatible = "qcom,ipq5424-dwc3", "qcom,dwc3";
> + reg = <0 0x08af8800 0 0x400>;
> +
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> +
> + clocks = <&gcc GCC_USB0_MASTER_CLK>,
> + <&gcc GCC_USB0_SLEEP_CLK>,
> + <&gcc GCC_USB0_MOCK_UTMI_CLK>,
> + <&gcc GCC_USB0_PHY_CFG_AHB_CLK>,
> + <&gcc GCC_CNOC_USB_CLK>;
> +
> + clock-names = "core",
> + "sleep",
> + "mock_utmi",
> + "iface",
> + "cfg_noc";
> +
> + assigned-clocks = <&gcc GCC_USB0_MASTER_CLK>,
> + <&gcc GCC_USB0_MOCK_UTMI_CLK>;
> + assigned-clock-rates = <200000000>,
> + <24000000>;
> +
> + interrupts-extended = <&intc GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>,
> + <&intc GIC_SPI 414 IRQ_TYPE_LEVEL_HIGH>,
> + <&intc GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
> + <&intc GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "pwr_event",
> + "qusb2_phy",
> + "dm_hs_phy_irq",
> + "dp_hs_phy_irq";
> +
> + resets = <&gcc GCC_USB_BCR>;
> + status = "disabled";
> +
> + dwc_0: usb@8a00000 {
> + compatible = "snps,dwc3";
> + reg = <0 0x08a00000 0 0xcd00>;
> + clocks = <&gcc GCC_USB0_MOCK_UTMI_CLK>;
> + clock-names = "ref";
> + interrupts = <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>;
> + phys = <&qusb_phy_0>, <&ssphy_0>;
> + phy-names = "usb2-phy", "usb3-phy";
> + tx-fifo-resize;
> + snps,is-utmi-l1-suspend;
> + snps,hird-threshold = /bits/ 8 <0x0>;
> + snps,dis_u2_susphy_quirk;
> + snps,dis_u3_susphy_quirk;
> + snps,dis-u1-entry-quirk;
> + snps,dis-u2-entry-quirk;
> + };
> + };
> +
> timer@f420000 {
> compatible = "arm,armv7-timer-mem";
> reg = <0 0xf420000 0 0x1000>;
> --
> 2.34.1
>
--
With best wishes
Dmitry
On Thu, Nov 14, 2024 at 03:28:36PM +0200, Dmitry Baryshkov wrote:
> On Thu, 14 Nov 2024 at 09:48, Varadarajan Narayanan
> <quic_varada@quicinc.com> wrote:
> >
> > The IPQ5424 SoC has both USB2.0 and USB3.0 controllers. The USB3.0
> > can connect to either of USB2.0 or USB3.0 phy and operate in the
> > respective mode.
> >
> > Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
> > ---
> > v3: Regulator node names, labels and 'regulator-name' changed per review suggestions
> > Stray newline removed
> >
> > v2: Add dm/dp_hs_phy_irq to usb3@8a00000 node
> > Add u1/u2-entry quirks to usb@8a00000 node
> > ---
> > arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts | 66 ++++++++
> > arch/arm64/boot/dts/qcom/ipq5424.dtsi | 159 ++++++++++++++++++++
> > 2 files changed, 225 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts
> > index d4d31026a026..859e15befb3f 100644
> > --- a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts
> > +++ b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts
> > @@ -16,12 +16,70 @@ / {
> > aliases {
> > serial0 = &uart1;
> > };
> > +
> > + vreg_misc_3p3: regulator-3300000 {
>
> Technically these names are correct. However they don't match the
> approach that Qualcomm DT files have been using up to now.
> You can compare your data with the output of `git grep :.regulator-
> arch/arm64/boot/dts/qcom/`
Dmitry,
This name was suggested by Rob Herring [1]. Shall I rename them as follows
regulator-usb-3p3
regulator-usb-1p8
regulator-usb-0p925
Thanks
Varada
1 - https://lore.kernel.org/linux-arm-msm/20241113181138.GA1011553-robh@kernel.org/
> > + compatible = "regulator-fixed";
> > + regulator-min-microvolt = <3300000>;
> > + regulator-max-microvolt = <3300000>;
> > + regulator-boot-on;
> > + regulator-always-on;
> > + regulator-name = "usb_hs_vdda_3p3";
> > + };
> > +
> > + vreg_misc_1p8: regulator-1800000 {
> > + compatible = "regulator-fixed";
> > + regulator-min-microvolt = <1800000>;
> > + regulator-max-microvolt = <1800000>;
> > + regulator-boot-on;
> > + regulator-always-on;
> > + regulator-name = "vdda_1p8_usb";
> > + };
> > +
> > + vreg_misc_0p925: regulator-0925000 {
> > + compatible = "regulator-fixed";
> > + regulator-min-microvolt = <925000>;
> > + regulator-max-microvolt = <925000>;
> > + regulator-boot-on;
> > + regulator-always-on;
> > + regulator-name = "vdd_core_usb";
> > + };
> > +};
[. . .]
On Fri, Nov 15, 2024 at 10:46:10AM +0530, Varadarajan Narayanan wrote:
> On Thu, Nov 14, 2024 at 03:28:36PM +0200, Dmitry Baryshkov wrote:
> > On Thu, 14 Nov 2024 at 09:48, Varadarajan Narayanan
> > <quic_varada@quicinc.com> wrote:
> > >
> > > The IPQ5424 SoC has both USB2.0 and USB3.0 controllers. The USB3.0
> > > can connect to either of USB2.0 or USB3.0 phy and operate in the
> > > respective mode.
> > >
> > > Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
> > > ---
> > > v3: Regulator node names, labels and 'regulator-name' changed per review suggestions
> > > Stray newline removed
> > >
> > > v2: Add dm/dp_hs_phy_irq to usb3@8a00000 node
> > > Add u1/u2-entry quirks to usb@8a00000 node
> > > ---
> > > arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts | 66 ++++++++
> > > arch/arm64/boot/dts/qcom/ipq5424.dtsi | 159 ++++++++++++++++++++
> > > 2 files changed, 225 insertions(+)
> > >
> > > diff --git a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts
> > > index d4d31026a026..859e15befb3f 100644
> > > --- a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts
> > > +++ b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts
> > > @@ -16,12 +16,70 @@ / {
> > > aliases {
> > > serial0 = &uart1;
> > > };
> > > +
> > > + vreg_misc_3p3: regulator-3300000 {
> >
> > Technically these names are correct. However they don't match the
> > approach that Qualcomm DT files have been using up to now.
> > You can compare your data with the output of `git grep :.regulator-
> > arch/arm64/boot/dts/qcom/`
>
> Dmitry,
>
> This name was suggested by Rob Herring [1]. Shall I rename them as follows
>
> regulator-usb-3p3
> regulator-usb-1p8
> regulator-usb-0p925
I'd say so. Rob clearly stated that this is not a strict rule. It's
always better to follow the customs of the particular platform, it helps
other developers. Also in _many_ cases just defining the voltage is not
enough, usually there are multiple networks providing 0.925 V or 1.8 V.
>
> Thanks
> Varada
>
> 1 - https://lore.kernel.org/linux-arm-msm/20241113181138.GA1011553-robh@kernel.org/
>
> > > + compatible = "regulator-fixed";
> > > + regulator-min-microvolt = <3300000>;
> > > + regulator-max-microvolt = <3300000>;
> > > + regulator-boot-on;
> > > + regulator-always-on;
> > > + regulator-name = "usb_hs_vdda_3p3";
> > > + };
> > > +
> > > + vreg_misc_1p8: regulator-1800000 {
> > > + compatible = "regulator-fixed";
> > > + regulator-min-microvolt = <1800000>;
> > > + regulator-max-microvolt = <1800000>;
> > > + regulator-boot-on;
> > > + regulator-always-on;
> > > + regulator-name = "vdda_1p8_usb";
> > > + };
> > > +
> > > + vreg_misc_0p925: regulator-0925000 {
> > > + compatible = "regulator-fixed";
> > > + regulator-min-microvolt = <925000>;
> > > + regulator-max-microvolt = <925000>;
> > > + regulator-boot-on;
> > > + regulator-always-on;
> > > + regulator-name = "vdd_core_usb";
> > > + };
> > > +};
>
> [. . .]
--
With best wishes
Dmitry
On Fri, Nov 15, 2024 at 08:54:47AM +0200, Dmitry Baryshkov wrote:
> On Fri, Nov 15, 2024 at 10:46:10AM +0530, Varadarajan Narayanan wrote:
> > On Thu, Nov 14, 2024 at 03:28:36PM +0200, Dmitry Baryshkov wrote:
> > > On Thu, 14 Nov 2024 at 09:48, Varadarajan Narayanan
> > > <quic_varada@quicinc.com> wrote:
> > > >
> > > > The IPQ5424 SoC has both USB2.0 and USB3.0 controllers. The USB3.0
> > > > can connect to either of USB2.0 or USB3.0 phy and operate in the
> > > > respective mode.
> > > >
> > > > Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
> > > > ---
> > > > v3: Regulator node names, labels and 'regulator-name' changed per review suggestions
> > > > Stray newline removed
> > > >
> > > > v2: Add dm/dp_hs_phy_irq to usb3@8a00000 node
> > > > Add u1/u2-entry quirks to usb@8a00000 node
> > > > ---
> > > > arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts | 66 ++++++++
> > > > arch/arm64/boot/dts/qcom/ipq5424.dtsi | 159 ++++++++++++++++++++
> > > > 2 files changed, 225 insertions(+)
> > > >
> > > > diff --git a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts
> > > > index d4d31026a026..859e15befb3f 100644
> > > > --- a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts
> > > > +++ b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts
> > > > @@ -16,12 +16,70 @@ / {
> > > > aliases {
> > > > serial0 = &uart1;
> > > > };
> > > > +
> > > > + vreg_misc_3p3: regulator-3300000 {
> > >
> > > Technically these names are correct. However they don't match the
> > > approach that Qualcomm DT files have been using up to now.
> > > You can compare your data with the output of `git grep :.regulator-
> > > arch/arm64/boot/dts/qcom/`
> >
> > Dmitry,
> >
> > This name was suggested by Rob Herring [1]. Shall I rename them as follows
> >
> > regulator-usb-3p3
> > regulator-usb-1p8
> > regulator-usb-0p925
>
> I'd say so. Rob clearly stated that this is not a strict rule. It's
> always better to follow the customs of the particular platform, it helps
> other developers. Also in _many_ cases just defining the voltage is not
> enough, usually there are multiple networks providing 0.925 V or 1.8 V.
Dmitry,
Have posted v4 with above changes. Please review.
Thanks
Varada
> > 1 - https://lore.kernel.org/linux-arm-msm/20241113181138.GA1011553-robh@kernel.org/
> >
> > > > + compatible = "regulator-fixed";
> > > > + regulator-min-microvolt = <3300000>;
> > > > + regulator-max-microvolt = <3300000>;
> > > > + regulator-boot-on;
> > > > + regulator-always-on;
> > > > + regulator-name = "usb_hs_vdda_3p3";
> > > > + };
> > > > +
> > > > + vreg_misc_1p8: regulator-1800000 {
> > > > + compatible = "regulator-fixed";
> > > > + regulator-min-microvolt = <1800000>;
> > > > + regulator-max-microvolt = <1800000>;
> > > > + regulator-boot-on;
> > > > + regulator-always-on;
> > > > + regulator-name = "vdda_1p8_usb";
> > > > + };
> > > > +
> > > > + vreg_misc_0p925: regulator-0925000 {
> > > > + compatible = "regulator-fixed";
> > > > + regulator-min-microvolt = <925000>;
> > > > + regulator-max-microvolt = <925000>;
> > > > + regulator-boot-on;
> > > > + regulator-always-on;
> > > > + regulator-name = "vdd_core_usb";
> > > > + };
> > > > +};
> >
> > [. . .]
>
> --
> With best wishes
> Dmitry
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