As per design for power off mode, clear the wake enable register during
resume sequence.

Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com>
---
 drivers/soundwire/amd_manager.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/soundwire/amd_manager.c b/drivers/soundwire/amd_manager.c
index 5a4bfaef65fb..96a3aa6da711 100644
--- a/drivers/soundwire/amd_manager.c
+++ b/drivers/soundwire/amd_manager.c
@@ -1190,6 +1190,7 @@ static int __maybe_unused amd_resume_runtime(struct device *dev)
 	if (amd_manager->power_mode_mask & AMD_SDW_CLK_STOP_MODE) {
 		return amd_sdw_clock_stop_exit(amd_manager);
 	} else if (amd_manager->power_mode_mask & AMD_SDW_POWER_OFF_MODE) {
+		writel(0x00, amd_manager->acp_mmio + ACP_SW_WAKE_EN(amd_manager->instance));
 		val = readl(amd_manager->mmio + ACP_SW_CLK_RESUME_CTRL);
 		if (val) {
 			val |= AMD_SDW_CLK_RESUME_REQ;
-- 
2.34.1

On Wed, 13 Nov 2024 00:21:38 +0530, Vijendar Mukunda wrote:
> As per design for power off mode, clear the wake enable register during
> resume sequence.
> 
> 

Applied, thanks!

[1/1] soundwire: amd: clear wake enable register for power off mode
      commit: 74148bb59e2064b87eb1715d9eb109adccb75316

Best regards,
-- 
~Vinod

On 13/11/24 00:21, Vijendar Mukunda wrote:
> As per design for power off mode, clear the wake enable register during
> resume sequence.
Hi Vinod,

Could you please review the patch?

Thanks,
Vijendar
>
> Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com>
> ---
>  drivers/soundwire/amd_manager.c | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/drivers/soundwire/amd_manager.c b/drivers/soundwire/amd_manager.c
> index 5a4bfaef65fb..96a3aa6da711 100644
> --- a/drivers/soundwire/amd_manager.c
> +++ b/drivers/soundwire/amd_manager.c
> @@ -1190,6 +1190,7 @@ static int __maybe_unused amd_resume_runtime(struct device *dev)
>  	if (amd_manager->power_mode_mask & AMD_SDW_CLK_STOP_MODE) {
>  		return amd_sdw_clock_stop_exit(amd_manager);
>  	} else if (amd_manager->power_mode_mask & AMD_SDW_POWER_OFF_MODE) {
> +		writel(0x00, amd_manager->acp_mmio + ACP_SW_WAKE_EN(amd_manager->instance));
>  		val = readl(amd_manager->mmio + ACP_SW_CLK_RESUME_CTRL);
>  		if (val) {
>  			val |= AMD_SDW_CLK_RESUME_REQ;